static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
{
u32 val = 0;
struct pci_dev *pdev = adapter->pci_dev;
int retval;
DBG(1,"");
isac_init(&adapter->isac); // FIXME is this okay now
retval = -EBUSY;
if (!request_region(adapter->io, 32, "hisax_fcpcipnp"))
goto err;
switch (adapter->type) {
case AVM_FRITZ_PCIV2:
retval = request_irq(pdev->irq, fcpci2_irq, SA_SHIRQ,
"hisax_fcpcipnp", adapter);
break;
case AVM_FRITZ_PCI:
retval = request_irq(pdev->irq, fcpci_irq, SA_SHIRQ,
"hisax_fcpcipnp", adapter);
break;
case AVM_FRITZ_PNP:
retval = request_irq(pdev->irq, fcpci_irq, 0,
"hisax_fcpcipnp", adapter);
break;
}
if (retval)
goto err_region;
switch (adapter->type) {
case AVM_FRITZ_PCIV2:
case AVM_FRITZ_PCI:
val = inl(adapter->io);
break;
case AVM_FRITZ_PNP:
val = inb(adapter->io);
val |= inb(adapter->io + 1) << 8;
break;
}
DBG(1, "stat %#x Class %X Rev %d",
val, val & 0xff, (val>>8) & 0xff);
spin_lock_init(&adapter->hw_lock);
adapter->isac.priv = adapter;
switch (adapter->type) {
case AVM_FRITZ_PCIV2:
adapter->isac.read_isac = &fcpci2_read_isac;;
adapter->isac.write_isac = &fcpci2_write_isac;
adapter->isac.read_isac_fifo = &fcpci2_read_isac_fifo;
adapter->isac.write_isac_fifo = &fcpci2_write_isac_fifo;
adapter->read_hdlc_status = &fcpci2_read_hdlc_status;
adapter->write_ctrl = &fcpci2_write_ctrl;
break;
case AVM_FRITZ_PCI:
adapter->isac.read_isac = &fcpci_read_isac;;
adapter->isac.write_isac = &fcpci_write_isac;
adapter->isac.read_isac_fifo = &fcpci_read_isac_fifo;
adapter->isac.write_isac_fifo = &fcpci_write_isac_fifo;
adapter->read_hdlc_status = &fcpci_read_hdlc_status;
adapter->write_ctrl = &fcpci_write_ctrl;
break;
case AVM_FRITZ_PNP:
adapter->isac.read_isac = &fcpci_read_isac;;
adapter->isac.write_isac = &fcpci_write_isac;
adapter->isac.read_isac_fifo = &fcpci_read_isac_fifo;
adapter->isac.write_isac_fifo = &fcpci_write_isac_fifo;
adapter->read_hdlc_status = &fcpnp_read_hdlc_status;
adapter->write_ctrl = &fcpnp_write_ctrl;
break;
}
// Reset
outb(0, adapter->io + AVM_STATUS0);
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(50 * HZ / 1000); // 50 msec
outb(AVM_STATUS0_RESET, adapter->io + AVM_STATUS0);
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(50 * HZ / 1000); // 50 msec
outb(0, adapter->io + AVM_STATUS0);
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(10 * HZ / 1000); // 10 msec
switch (adapter->type) {
case AVM_FRITZ_PCIV2:
fcpci2_init(adapter);
isacsx_setup(&adapter->isac);
break;
case AVM_FRITZ_PCI:
case AVM_FRITZ_PNP:
fcpci_init(adapter);
isac_setup(&adapter->isac);
break;
}
val = adapter->read_hdlc_status(adapter, 0);
DBG(0x20, "HDLC A STA %x", val);
val = adapter->read_hdlc_status(adapter, 1);
DBG(0x20, "HDLC B STA %x", val);
adapter->bcs[0].mode = -1;
adapter->bcs[1].mode = -1;
modehdlc(&adapter->bcs[0], L1_MODE_NULL);
modehdlc(&adapter->bcs[1], L1_MODE_NULL);
return 0;
err_region:
release_region(adapter->io, 32);
err:
return retval;
}
static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
{
u32 val = 0;
int retval;
DBG(1,"");
isac_init(&adapter->isac);
retval = -EBUSY;
if (!request_region(adapter->io, 32, "fcpcipnp"))
goto err;
switch (adapter->type) {
case AVM_FRITZ_PCIV2:
case AVM_FRITZ_PCI:
val = inl(adapter->io);
break;
case AVM_FRITZ_PNP:
val = inb(adapter->io);
val |= inb(adapter->io + 1) << 8;
break;
}
DBG(1, "stat %#x Class %X Rev %d",
val, val & 0xff, (val>>8) & 0xff);
spin_lock_init(&adapter->hw_lock);
adapter->isac.priv = adapter;
switch (adapter->type) {
case AVM_FRITZ_PCIV2:
adapter->isac.read_isac = &fcpci2_read_isac;
adapter->isac.write_isac = &fcpci2_write_isac;
adapter->isac.read_isac_fifo = &fcpci2_read_isac_fifo;
adapter->isac.write_isac_fifo = &fcpci2_write_isac_fifo;
adapter->read_hdlc_status = &fcpci2_read_hdlc_status;
adapter->write_ctrl = &fcpci2_write_ctrl;
break;
case AVM_FRITZ_PCI:
adapter->isac.read_isac = &fcpci_read_isac;
adapter->isac.write_isac = &fcpci_write_isac;
adapter->isac.read_isac_fifo = &fcpci_read_isac_fifo;
adapter->isac.write_isac_fifo = &fcpci_write_isac_fifo;
adapter->read_hdlc_status = &fcpci_read_hdlc_status;
adapter->write_ctrl = &fcpci_write_ctrl;
break;
case AVM_FRITZ_PNP:
adapter->isac.read_isac = &fcpci_read_isac;
adapter->isac.write_isac = &fcpci_write_isac;
adapter->isac.read_isac_fifo = &fcpci_read_isac_fifo;
adapter->isac.write_isac_fifo = &fcpci_write_isac_fifo;
adapter->read_hdlc_status = &fcpnp_read_hdlc_status;
adapter->write_ctrl = &fcpnp_write_ctrl;
break;
}
// Reset
outb(0, adapter->io + AVM_STATUS0);
mdelay(10);
outb(AVM_STATUS0_RESET, adapter->io + AVM_STATUS0);
mdelay(10);
outb(0, adapter->io + AVM_STATUS0);
mdelay(10);
switch (adapter->type) {
case AVM_FRITZ_PCIV2:
retval = request_irq(adapter->irq, fcpci2_irq, IRQF_SHARED,
"fcpcipnp", adapter);
break;
case AVM_FRITZ_PCI:
retval = request_irq(adapter->irq, fcpci_irq, IRQF_SHARED,
"fcpcipnp", adapter);
break;
case AVM_FRITZ_PNP:
retval = request_irq(adapter->irq, fcpci_irq, 0,
"fcpcipnp", adapter);
break;
}
if (retval)
goto err_region;
switch (adapter->type) {
case AVM_FRITZ_PCIV2:
fcpci2_init(adapter);
isacsx_setup(&adapter->isac);
break;
case AVM_FRITZ_PCI:
case AVM_FRITZ_PNP:
fcpci_init(adapter);
isac_setup(&adapter->isac);
break;
}
val = adapter->read_hdlc_status(adapter, 0);
DBG(0x20, "HDLC A STA %x", val);
val = adapter->read_hdlc_status(adapter, 1);
DBG(0x20, "HDLC B STA %x", val);
adapter->bcs[0].mode = -1;
adapter->bcs[1].mode = -1;
modehdlc(&adapter->bcs[0], L1_MODE_NULL);
modehdlc(&adapter->bcs[1], L1_MODE_NULL);
return 0;
err_region:
release_region(adapter->io, 32);
err:
return retval;
}