struct pipe_context * fd2_context_create(struct pipe_screen *pscreen, void *priv) { struct fd2_context *fd2_ctx = CALLOC_STRUCT(fd2_context); struct pipe_context *pctx; if (!fd2_ctx) return NULL; pctx = &fd2_ctx->base.base; pctx->destroy = fd2_context_destroy; pctx->create_blend_state = fd2_blend_state_create; pctx->create_rasterizer_state = fd2_rasterizer_state_create; pctx->create_depth_stencil_alpha_state = fd2_zsa_state_create; fd2_draw_init(pctx); fd2_gmem_init(pctx); fd2_texture_init(pctx); fd2_prog_init(pctx); pctx = fd_context_init(&fd2_ctx->base, pscreen, priv); if (!pctx) return NULL; /* construct vertex state used for solid ops (clear, and gmem<->mem) */ fd2_ctx->solid_vertexbuf = create_solid_vertexbuf(pctx); fd2_emit_setup(&fd2_ctx->base); return pctx; }
struct pipe_context * fd4_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) { struct fd_screen *screen = fd_screen(pscreen); struct fd4_context *fd4_ctx = CALLOC_STRUCT(fd4_context); struct pipe_context *pctx; if (!fd4_ctx) return NULL; pctx = &fd4_ctx->base.base; fd4_ctx->base.dev = fd_device_ref(screen->dev); fd4_ctx->base.screen = fd_screen(pscreen); pctx->destroy = fd4_context_destroy; pctx->create_blend_state = fd4_blend_state_create; pctx->create_rasterizer_state = fd4_rasterizer_state_create; pctx->create_depth_stencil_alpha_state = fd4_zsa_state_create; fd4_draw_init(pctx); fd4_gmem_init(pctx); fd4_texture_init(pctx); fd4_prog_init(pctx); fd4_emit_init(pctx); pctx = fd_context_init(&fd4_ctx->base, pscreen, primtypes, priv); if (!pctx) return NULL; util_dynarray_init(&fd4_ctx->rbrc_patches); fd4_ctx->vs_pvt_mem = fd_bo_new(screen->dev, 0x2000, DRM_FREEDRENO_GEM_TYPE_KMEM); fd4_ctx->fs_pvt_mem = fd_bo_new(screen->dev, 0x2000, DRM_FREEDRENO_GEM_TYPE_KMEM); fd4_ctx->vsc_size_mem = fd_bo_new(screen->dev, 0x1000, DRM_FREEDRENO_GEM_TYPE_KMEM); fd4_ctx->solid_vbuf = create_solid_vertexbuf(pctx); fd4_ctx->blit_texcoord_vbuf = create_blit_texcoord_vertexbuf(pctx); /* setup solid_vbuf_state: */ fd4_ctx->solid_vbuf_state.vtx = pctx->create_vertex_elements_state( pctx, 1, (struct pipe_vertex_element[]){{ .vertex_buffer_index = 0, .src_offset = 0, .src_format = PIPE_FORMAT_R32G32B32_FLOAT, }});
struct pipe_context * fd4_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) { struct fd_screen *screen = fd_screen(pscreen); struct fd4_context *fd4_ctx = CALLOC_STRUCT(fd4_context); struct pipe_context *pctx; if (!fd4_ctx) return NULL; pctx = &fd4_ctx->base.base; pctx->screen = pscreen; fd4_ctx->base.dev = fd_device_ref(screen->dev); fd4_ctx->base.screen = fd_screen(pscreen); pctx->destroy = fd4_context_destroy; pctx->create_blend_state = fd4_blend_state_create; pctx->create_rasterizer_state = fd4_rasterizer_state_create; pctx->create_depth_stencil_alpha_state = fd4_zsa_state_create; fd4_draw_init(pctx); fd4_gmem_init(pctx); fd4_texture_init(pctx); fd4_prog_init(pctx); fd4_emit_init(pctx); pctx = fd_context_init(&fd4_ctx->base, pscreen, primtypes, priv, flags); if (!pctx) return NULL; fd_hw_query_init(pctx); fd4_ctx->vs_pvt_mem = fd_bo_new(screen->dev, 0x2000, DRM_FREEDRENO_GEM_TYPE_KMEM, "vs_pvt"); fd4_ctx->fs_pvt_mem = fd_bo_new(screen->dev, 0x2000, DRM_FREEDRENO_GEM_TYPE_KMEM, "fs_pvt"); fd4_ctx->vsc_size_mem = fd_bo_new(screen->dev, 0x1000, DRM_FREEDRENO_GEM_TYPE_KMEM, "vsc_size"); fd_context_setup_common_vbos(&fd4_ctx->base); fd4_query_context_init(pctx); fd4_ctx->border_color_uploader = u_upload_create(pctx, 4096, 0, PIPE_USAGE_STREAM, 0); return pctx; }
struct pipe_context * fd3_context_create(struct pipe_screen *pscreen, void *priv) { struct fd_screen *screen = fd_screen(pscreen); struct fd3_context *fd3_ctx = CALLOC_STRUCT(fd3_context); struct pipe_context *pctx; if (!fd3_ctx) return NULL; pctx = &fd3_ctx->base.base; fd3_ctx->base.dev = fd_device_ref(screen->dev); fd3_ctx->base.screen = fd_screen(pscreen); pctx->destroy = fd3_context_destroy; pctx->create_blend_state = fd3_blend_state_create; pctx->create_rasterizer_state = fd3_rasterizer_state_create; pctx->create_depth_stencil_alpha_state = fd3_zsa_state_create; fd3_draw_init(pctx); fd3_gmem_init(pctx); fd3_texture_init(pctx); fd3_prog_init(pctx); pctx = fd_context_init(&fd3_ctx->base, pscreen, primtypes, priv); if (!pctx) return NULL; util_dynarray_init(&fd3_ctx->rbrc_patches); fd3_ctx->vs_pvt_mem = fd_bo_new(screen->dev, 0x2000, DRM_FREEDRENO_GEM_TYPE_KMEM); fd3_ctx->fs_pvt_mem = fd_bo_new(screen->dev, 0x2000, DRM_FREEDRENO_GEM_TYPE_KMEM); fd3_ctx->vsc_size_mem = fd_bo_new(screen->dev, 0x1000, DRM_FREEDRENO_GEM_TYPE_KMEM); fd3_ctx->solid_vbuf = create_solid_vertexbuf(pctx); fd3_ctx->blit_texcoord_vbuf = create_blit_texcoord_vertexbuf(pctx); return pctx; }
struct pipe_context * fd2_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) { struct fd_screen *screen = fd_screen(pscreen); struct fd2_context *fd2_ctx = CALLOC_STRUCT(fd2_context); struct pipe_context *pctx; if (!fd2_ctx) return NULL; pctx = &fd2_ctx->base.base; pctx->screen = pscreen; fd2_ctx->base.dev = fd_device_ref(screen->dev); fd2_ctx->base.screen = fd_screen(pscreen); pctx->destroy = fd2_context_destroy; pctx->create_blend_state = fd2_blend_state_create; pctx->create_rasterizer_state = fd2_rasterizer_state_create; pctx->create_depth_stencil_alpha_state = fd2_zsa_state_create; fd2_draw_init(pctx); fd2_gmem_init(pctx); fd2_texture_init(pctx); fd2_prog_init(pctx); fd2_emit_init(pctx); pctx = fd_context_init(&fd2_ctx->base, pscreen, (screen->gpu_id >= 220) ? a22x_primtypes : a20x_primtypes, priv, flags); if (!pctx) return NULL; /* construct vertex state used for solid ops (clear, and gmem<->mem) */ fd2_ctx->solid_vertexbuf = create_solid_vertexbuf(pctx); fd2_query_context_init(pctx); return pctx; }