void ft_srio_setup(void *blob) { #ifdef CONFIG_SRIO1 if (!is_serdes_configured(SRIO1)) { fdt_del_node_and_alias(blob, "rio0"); } #else fdt_del_node_and_alias(blob, "rio0"); #endif #ifdef CONFIG_SRIO2 if (!is_serdes_configured(SRIO2)) { fdt_del_node_and_alias(blob, "rio1"); } #else fdt_del_node_and_alias(blob, "rio1"); #endif }
void ft_board_setup(void *blob, bd_t *bd) { phys_addr_t base; phys_size_t size; struct cpu_type *cpu; cpu = gd->arch.cpu; ft_cpu_setup(blob, bd); base = getenv_bootm_low(); size = getenv_bootm_size(); #if defined(CONFIG_PCI) FT_FSL_PCI_SETUP; #endif fdt_fixup_memory(blob, (u64)base, (u64)size); #if defined(CONFIG_HAS_FSL_DR_USB) fdt_fixup_dr_usb(blob, bd); #endif /* P1014 and it's derivatives don't support CAN and eTSEC3 */ if (cpu->soc_ver == SVR_P1014) { fdt_del_flexcan(blob); fdt_del_node_and_alias(blob, "ethernet2"); } #ifndef CONFIG_SDCARD /* disable sdhc due to sdhc bug */ fdt_del_sdhc(blob); if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "can")) { fdt_del_tdm(blob); fdt_del_spi_slic(blob); } else if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) { fdt_del_flexcan(blob); fdt_del_spi_flash(blob); fdt_disable_uart1(blob); } else { /* * If we don't set fsl_p1010mux:tdm_can to "can" or "tdm" * explicitly, defaultly spi_cs_sel to spi-flash instead of * to tdm/slic. */ fdt_del_tdm(blob); fdt_del_flexcan(blob); fdt_disable_uart1(blob); } #endif }
void fdt_fixup_crypto_node(void *blob, int sec_rev) { u8 era; if (!sec_rev) { fdt_del_node_and_alias(blob, "crypto"); return; } /* Add SEC ERA information in compatible */ era = caam_get_era(); if (era) { fdt_fixup_crypto_era(blob, era); } else { printf("WARNING: Unable to get ERA for CAAM rev: %d\n", sec_rev); } }
/* else we got called for possible uprev */ for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++) if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev) break; if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) { puts("warning: unknown SEC revision number\n"); return; } val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels); err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask); err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask); err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len); err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); val = 0; while (sec_idx >= 0) { p = compat_strlist + val; val += sprintf(p, "fsl,sec%d.%d", (sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8, sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1; sec_idx--; } err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); } #elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */ void fdt_fixup_crypto_node(void *blob, int sec_rev) { if (!sec_rev) fdt_del_node_and_alias(blob, "crypto"); }