void event_handler_init(void)
{
if (g_is_initialized)
{
/* may be called twice when in serial mode, can safely skip the second time */
return;
}
/* init event queues */
g_async_evt_fifo.array_len =RBC_MESH_INTERNAL_EVENT_QUEUE_LENGTH ;
g_async_evt_fifo.elem_array = g_async_evt_fifo_buffer;
g_async_evt_fifo.elem_size = sizeof(async_event_t);
g_async_evt_fifo.memcpy_fptr = NULL;
fifo_init(&g_async_evt_fifo);
g_async_evt_fifo_ts.array_len = RBC_MESH_INTERNAL_EVENT_QUEUE_LENGTH;
g_async_evt_fifo_ts.elem_array = g_async_evt_fifo_buffer_ts;
g_async_evt_fifo_ts.elem_size = sizeof(async_event_t);
g_async_evt_fifo_ts.memcpy_fptr = NULL;
fifo_init(&g_async_evt_fifo_ts);
NVIC_EnableIRQ(EVENT_HANDLER_IRQ);
#ifdef NRF51
NVIC_SetPriority(EVENT_HANDLER_IRQ, 3);
#else
NVIC_SetPriority(EVENT_HANDLER_IRQ, 6);
#endif
g_is_initialized = true;
}
// initialize usart
void usartInit(void) {
// save status register
uint8_t sreg = SREG;
// disable interrupts temporary
cli();
UBRR0 = USART_BAUD_CALC(USART_BAUD_RATE,F_CPU);
UCSR0A |= _BV(U2X0);
UCSR0B |= _BV(TXEN0) | _BV(RXEN0) | _BV(RXCIE0);
// flush buffer und clear transmit/receive complete flags
do { UDR0; } while (UCSR0A & _BV(RXC0));
UCSR0A |= _BV(RXC0) | _BV(TXC0);
// initialize fifo
fifo_init(&usartTxFifo,usartTxBuffer, USART_TXBUFFER);
fifo_init(&usartRxFifo,usartRxBuffer, USART_RXBUFFER);
// set usart to stdout
stdout = &usartFile;
stdin = &usartFile;
// restore status register
SREG = sreg;
usartLineReceived = 0;
}
int main()
{
FIFO_DATA_TYPE out_val;
fifo_init(&data_in_f, data_in, FIFO_SIZE);
fifo_init(&data_out_f, data_out, FIFO_SIZE);
fifo_push(&data_in_f, 1);
fifo_push(&data_in_f, 2);
fifo_push(&data_in_f, 3);
fifo_push(&data_in_f, 4);
fifo_push(&data_in_f, 5);
if (fifo_pop(&data_in_f, &out_val))
printf("Valore: %d\n", out_val);
if (fifo_pop(&data_in_f, &out_val))
printf("Valore: %d\n", out_val);
if (fifo_pop(&data_in_f, &out_val))
printf("Valore: %d\n", out_val);
if (fifo_pop(&data_in_f, &out_val))
printf("Valore: %d\n", out_val);
if (fifo_pop(&data_in_f, &out_val))
printf("Valore: %d\n", out_val);
//ft_init();
//ft_step();
return 0;
}
int main(void)
{
// init fifos
fifo_init (toRS232FIFO, toRS232Buf, 100);
fifo_init (toUSBFIFO, toUSBBuf, 100);
USBNCallbackFIFORX1(&FromPC);
//USBNCallbackFIFOTX2Ready(&USBtoRS232);
sei(); // activate global interrupts
UARTInit(); // only for debugging
// setup usbstack with your descriptors
USBNInit(usbrs232,usbrs232Conf);
_USBNAddStringDescriptor(""); //pseudo lang
_USBNAddStringDescriptor("Microchip Technology Inc.");
//_USBNAddStringDescriptor("abcdefgh");
_USBNAddStringDescriptor("PICkit 2 Microcontroller Programmer ");
//_USBNAddStringDescriptor("PICkit 2 Microcontroller Programmer");
//_USBNAddStringDescriptor("ijklmnop");
_USBNAddStringDescriptor("PIC18F2550");
//_USBNAddStringDescriptor("12345678");
_USBNCreateStringField();
USBNInitMC(); // start usb controller
USBNStart(); // start device stack
while(1);
}
void USBSerial_Init(void)
{
// initialise stack
USBInit();
// register descriptors
USBRegisterDescriptors(abDescriptors);
// register class request handler
USBRegisterRequestHandler(REQTYPE_TYPE_CLASS, HandleClassRequest, abClassReqData);
// register endpoint handlers
USBHwRegisterEPIntHandler(INT_IN_EP, NULL);
USBHwRegisterEPIntHandler(BULK_IN_EP, BulkIn);
USBHwRegisterEPIntHandler(BULK_OUT_EP, BulkOut);
// register frame handler
USBHwRegisterFrameHandler(USBFrameHandler);
// enable bulk-in interrupts on NAKs
USBHwNakIntEnable(INACK_BI);
// initialise VCOM
fifo_init(&rxfifo, rxbuf);
fifo_init(&txfifo, txbuf);
NVIC_SetPriority(USB_IRQn, 4); // set according to main.c
NVIC_EnableIRQ(USB_IRQn);
// connect to bus
USBHwConnect(TRUE);
}
bool app_openuart(void){
//Open a uart
uart_init(uart);
uart_setdevice(uart,"/dev/ttyS41");
if (!uart_configure(uart,B9600,false)){
//Failed to open.
printf_clr(CLR_YELLOW,"Try a different tty:?\n");
uint8_t newname[64];
fgets(newname,64,stdin);
//Remove \n
int len = strlen(newname);
newname[len-1] = 0;
uart_setdevice(uart,newname);
if (!uart_configure(uart,B9600,false)){
printf_clr(CLR_RED,"Nope.\n");
return false;
}
}
//Setup everything:
fifo_init(&txfifo,txbuffer,UART_BUFFER_SIZE);
fifo_init(&rxfifo,rxbuffer,UART_BUFFER_SIZE);
//Attach fifo's to uart.
uart->rxfifo = &rxfifo;
uart->txfifo = &txfifo;
printf("Attatching funcions to stream\n");
stream_init(stream,uart);
stream->write_start = &stream_writestart;
stream->write_stop = &stream_writestop;
bus_init(bus);
}
/*
* Initialises the bulk port.
*/
void bulk_init(void)
{
fifo_init(&bulk_txfifo, bulk_txdata);
fifo_init(&bulk_rxfifo, bulk_rxdata);
//fBulkInBusy = FALSE;
//fChainDone = TRUE;
}
/**
* Initialize a serial port.
*
* \param fd KFile Serial struct interface.
* \param unit Serial unit to open. Possible values are architecture dependant.
*/
static struct Serial *ser_open(struct Serial *fd, unsigned int unit)
{
ASSERT(unit < countof(ser_handles));
ser_handles[unit] = fd;
ASSERT(!fd->is_open);
DB(fd->is_open = true);
fd->unit = unit;
fd->hw = ser_hw_getdesc(unit);
/* Initialize circular buffers */
ASSERT(fd->hw->txbuffer);
ASSERT(fd->hw->rxbuffer);
fifo_init(&fd->txfifo, fd->hw->txbuffer, fd->hw->txbuffer_size);
fifo_init(&fd->rxfifo, fd->hw->rxbuffer, fd->hw->rxbuffer_size);
fd->hw->table->init(fd->hw, fd);
/* Set default values */
#if CONFIG_SER_RXTIMEOUT != -1 || CONFIG_SER_TXTIMEOUT != -1
ser_settimeouts(fd, CONFIG_SER_RXTIMEOUT, CONFIG_SER_TXTIMEOUT);
#endif
#if CONFIG_SER_DEFBAUDRATE
ser_setbaudrate(fd, CONFIG_SER_DEFBAUDRATE);
#endif
/* Clear error flags */
ser_setstatus(fd, 0);
return fd;
}
// we assume rx and tx is always supplied, so no check
void ser0_init(int baud, fifo_t * rx, fifo_t * tx)
{
rxfp0 = rx;
txfp0 = tx;
P3DIR &= ~BIT5; // Select P35 for input (UART0RX)
P3SEL |= BIT4 | BIT5; // P3.4,5 = USART0 TXD/RXD
P3DIR |= BIT4;
UCTL0 = SWRST | CHAR; /* 8-bit character, UART mode */
ME1 &= ~USPIE0; // USART1 SPI module disable
UTCTL0 = SSEL1; /* UCLK = MCLK */
setbaud0(baud);
ME1 &= ~USPIE0; /* USART1 SPI module disable */
ME1 |= (UTXE0 | URXE0); /* Enable USART1 TXD/RXD */
UCTL0 &= ~SWRST;
//U0TCTL |= URXSE; // XXX Clear pending interrupts before enable!!!
fifo_init(rx);
fifo_init(tx);
IE1 |= UTXIE0; // Enable USART0 TX interrupt
IE1 |= URXIE0; // Enable USART0 RX interrupt
P1DIR |= DSR | CTS;
P1OUT &= ~(DSR | CTS); // We are On and we are ready
}
void serial_handler_init(void)
{
has_pending_tx = false;
/* init packet queues */
tx_fifo.array_len = SERIAL_QUEUE_SIZE;
tx_fifo.elem_array = tx_fifo_buffer;
tx_fifo.elem_size = sizeof(serial_data_t);
tx_fifo.memcpy_fptr = NULL;
fifo_init(&tx_fifo);
rx_fifo.array_len = SERIAL_QUEUE_SIZE;
rx_fifo.elem_array = rx_fifo_buffer;
rx_fifo.elem_size = sizeof(serial_data_t);
rx_fifo.memcpy_fptr = NULL;
fifo_init(&rx_fifo);
nrf_gpio_cfg_output(PIN_RDYN);
nrf_gpio_pin_set(PIN_RDYN);
serial_state = SERIAL_STATE_IDLE;
spi_slave_config_t spi_config;
spi_config.bit_order = SPIM_LSB_FIRST;
spi_config.mode = SPI_MODE_0;
spi_config.def_tx_character = 0;
spi_config.orc_tx_character = 0;
spi_config.pin_csn = PIN_CSN;
spi_config.pin_miso = PIN_MISO;
spi_config.pin_mosi = PIN_MOSI;
spi_config.pin_sck = PIN_SCK;
APP_ERROR_CHECK(spi_slave_init(&spi_config));
APP_ERROR_CHECK(spi_slave_evt_handler_register(spi_event_handler));
gpiote_init();
/* set initial buffers, dummy in tx */
//prepare_rx();
#if 1
/* notify application controller of the restart */
serial_evt_t started_event;
started_event.length = 4;
started_event.opcode = SERIAL_EVT_OPCODE_DEVICE_STARTED;
started_event.params.device_started.operating_mode = OPERATING_MODE_STANDBY;
uint32_t reset_reason;
sd_power_reset_reason_get(&reset_reason);
started_event.params.device_started.hw_error = !!(reset_reason & (1 << 3));
started_event.params.device_started.data_credit_available = SERIAL_QUEUE_SIZE;
if (!serial_handler_event_send(&started_event))
{
APP_ERROR_CHECK(NRF_ERROR_INTERNAL);
}
#endif
}
void USBSerial_Init(void)
{
char serialnumber[10] = {0};
char *pmem117;
pmem117 = SECTOR_14_START;
int serialnumber_present = 0;
for (int i = 0; i < 10; i++) {
serialnumber[9 - i] = *pmem117;
pmem117++;
if(*pmem117 != 0xFF)
serialnumber_present = 1;
}
if(serialnumber_present == 1){
/*
* abDescriptors[112+i] -> 112 is the position where the Serial Number string is located in the USB Descriptor
*/
abDescriptors[SERIAL_ADD] = serialnumber[0];
abDescriptors[SERIAL_ADD+2] = serialnumber[1];
abDescriptors[SERIAL_ADD+4] = serialnumber[2];
abDescriptors[SERIAL_ADD+6] = serialnumber[3];
abDescriptors[SERIAL_ADD+8] = serialnumber[4];
abDescriptors[SERIAL_ADD+10] = serialnumber[5];
abDescriptors[SERIAL_ADD+12] = serialnumber[6];
abDescriptors[SERIAL_ADD+14] = serialnumber[7];
abDescriptors[SERIAL_ADD+16] = serialnumber[8];
abDescriptors[SERIAL_ADD+18] = serialnumber[9];
}
// initialise stack
USBInit();
// register descriptors
USBRegisterDescriptors(abDescriptors);
// register endpoint handlers
USBHwRegisterEPIntHandler(BULK_IN_EP, BulkIn);
USBHwRegisterEPIntHandler(BULK_OUT_EP, BulkOut);
// register frame handler
USBHwRegisterFrameHandler(USBFrameHandler);
// enable bulk-in interrupts on NAKs
USBHwNakIntEnable(INACK_BI); // é gerada uma interrupção sempre que o host tenta ler do EP IN mas este está vazio.
// initialise VCOM
fifo_init(&rxfifo, rxbuf);
fifo_init(&txfifo, txbuf);
NVIC_EnableIRQ(USB_IRQn);
// connect to bus
USBHwConnect(TRUE);
}
/******
对程序中使用的内存进行分配
*****/
void Mem_Init(void){
#if (0 != UART1_OPEN)
sysFifoRx1 = fifo_init(SYSFIFORX1_LEN);
sysFifoTx1 = fifo_init(SYSFIFOTX1_LEN);
#endif
#if (0 != UART2_OPEN)
sysFifoRx2 = fifo_init(SYSFIFORX2_LEN);
sysFifoTx2 = fifo_init(SYSFIFOTX2_LEN);
#endif
}
spi_p spi_new_instance(Spi * spi_base, uint8_t spi_chip_sel, uint32_t spi_freq, uint8_t spi_mode, uint8_t buffer_size, void(*handler_call_back )(spi_p, uint8_t))
{
_spi_base = spi_base;
if (!spi_is_enabled(_spi_base)) {
_spi_init_base(spi_base);
}
spi_p _spi = malloc(sizeof *_spi);
_spi->_call_back = handler_call_back;
_spi->_cs_pin = spi_chip_sel;
_spi->_spi_rx_fifo_desc = (fifo_desc_t *)malloc(sizeof(fifo_desc_t));
_spi->_spi_tx_fifo_desc = (fifo_desc_t *)malloc(sizeof(fifo_desc_t));
union spi_buffer_element *spi_tx_fifo_buffer = (union spi_buffer_element *)(malloc(sizeof(union spi_buffer_element) * buffer_size));
union spi_buffer_element *spi_rx_fifo_buffer = (union spi_buffer_element *)(malloc(sizeof(union spi_buffer_element) * buffer_size));
fifo_init(_spi->_spi_rx_fifo_desc, spi_rx_fifo_buffer, buffer_size);
fifo_init(_spi->_spi_tx_fifo_desc, spi_tx_fifo_buffer, buffer_size);
spi_set_peripheral_chip_select_value(spi_base, spi_get_pcs(spi_chip_sel));
switch (spi_mode)
{
case 0:
spi_set_clock_polarity(spi_base, spi_chip_sel,0);
spi_set_clock_phase(spi_base, spi_chip_sel, 1);
break;
case 1:
spi_set_clock_polarity(spi_base, spi_chip_sel, 0);
spi_set_clock_phase(spi_base, spi_chip_sel, 0);
break;
case 2:
spi_set_clock_polarity(spi_base, spi_chip_sel, 1);
spi_set_clock_phase(spi_base, spi_chip_sel, 1);
break;
case 3:
spi_set_clock_polarity(spi_base, spi_chip_sel, 1);
spi_set_clock_phase(spi_base, spi_chip_sel, 0);
break;
}
spi_set_bits_per_transfer(spi_base, spi_chip_sel, SPI_CSR_BITS_8_BIT);
spi_configure_cs_behavior(spi_base, spi_chip_sel, SPI_CS_KEEP_LOW);
spi_set_baudrate_div(spi_base, spi_chip_sel, (sysclk_get_peripheral_hz() / spi_freq));
spi_set_delay_between_chip_select(spi_base, 0x10);
spi_set_transfer_delay(spi_base, spi_chip_sel, 0x01, 0x10);
spi_enable(spi_base);
return _spi;
}
void serial_setup(void)
{
fifo_init(&gfifo);
SERIAL_TX_TRIS = 0;
SERIAL_RX_TRIS = 1;
/* for PORTC
*/
TXSTA = 0;
TXSTAbits.TXEN = 1;
RCSTA = 0;
RCSTAbits.SPEN = 1;
RCSTAbits.CREN = 1;
/* disable rx/tx ints
*/
PIR1bits.RCIF = 0;
PIR1bits.TXIF = 0;
PIE1bits.RCIE = 1;
PIE1bits.TXIE = 0;
/* 9600 bauds, 8n1
*/
SPBRG = 12;
TXSTA = 0x20;
BAUDCON = 0x00;
}
void app_initialize(void) {
static const UrosString turtle1 = { 7, "turtle1" };
static const UrosNodeConfig *const cfgp = &urosNode.config;
unsigned i;
/* Initialize the uROS system.*/
urosInit();
fifo_init(&rosoutQueue, 8);
/* Initialize the turtle slots.*/
urosMutexObjectInit(&turtleCanSpawnLock);
turtleCanSpawn = UROS_TRUE;
turtle_init_pools();
for (i = 0; i < MAX_TURTLES; ++i) {
turtle_init(&turtles[i], i);
}
/* Create the Node thread.*/
urosNodeCreateThread();
/* Spawn the first turtle.*/
turtle_spawn(&turtle1, 0.5f * SANDBOX_WIDTH, 0.5f * SANDBOX_HEIGHT, 0.0f);
}
void bootstrap()
{
DPRINT("Device booted at time: %d\n", timer_get_counter_value()); // TODO not printed for some reason, debug later
id = hw_get_unique_id();
hw_radio_init(&alloc_new_packet, &release_packet);
rx_cfg.channel_id = current_channel_id;
tx_cfg.channel_id = current_channel_id;
ubutton_register_callback(0, &userbutton_callback);
ubutton_register_callback(1, &userbutton_callback);
fifo_init(&uart_rx_fifo, uart_rx_buffer, sizeof(uart_rx_buffer));
uart_set_rx_interrupt_callback(&uart_rx_cb);
uart_rx_interrupt_enable(true);
sched_register_task(&start_rx);
sched_register_task(&transmit_packet);
sched_register_task(&start);
sched_register_task(&process_uart_rx_fifo);
current_state = STATE_CONFIG_DIRECTION;
sched_post_task(&start);
sched_post_task(&process_uart_rx_fifo);
}
/** Main program entry point. This routine contains the overall program flow, including initial
* setup of all components and the main program loop.
*/
int main(void)
{
uint32_t last = 0;
/* init fifo */
fifo_init(&fifo, fifo_buffer, sizeof(fifo_buffer));
/* setup hardware (button, LED, rtc...) */
SetupHardware();
/* enable interrupts */
sei();
/* main loop */
while(1)
{
/* if button pressed */
if (!(BUTTON_PIN & (1 << BUTTON)))
{
/* ignore if last button was pressed less than DELTA_T */
if(get_time() > (last+DELTA_T))
{
/* generate token and send it to host */
token();
last = get_time();
}
}
/* USB tasks */
HID_Device_USBTask(&Keyboard_HID_Interface);
USB_USBTask();
}
}
static int test_put_get(struct harness_t *harness)
{
struct fifo_t fifo;
BTASSERT(fifo_init(&fifo, 4) == 0);
/* Get from am empty fifo. */
BTASSERT(fifo_get(&fifo) == -1);
/* Put and get an element. */
BTASSERT(fifo_put(&fifo) == 0);
BTASSERT(fifo_get(&fifo) == 0);
/* Put and get an element. */
BTASSERT(fifo_put(&fifo) == 1);
BTASSERT(fifo_get(&fifo) == 1);
/* Put until the fifo is full. */
BTASSERT(fifo_put(&fifo) == 2);
BTASSERT(fifo_put(&fifo) == 3);
BTASSERT(fifo_put(&fifo) == 0);
BTASSERT(fifo_put(&fifo) == -1);
/* Get all elements. */
BTASSERT(fifo_get(&fifo) == 2);
BTASSERT(fifo_get(&fifo) == 3);
BTASSERT(fifo_get(&fifo) == 0);
BTASSERT(fifo_get(&fifo) == -1);
return (0);
}
/*
* initializes the LKM
* calls functions to create/init the following:
* the stats file in /proc
* the device node in /dev
* the fifo_queue is initialized
*/
static int __init fifo_mod_init(void)
{
int err;
err = fifo_init(&fifo, size);
if (err)
{
printk(KERN_INFO "--- %s: fifo_init failed!\n", mod_name);
return err;
}
proc_stats = proc_create(
"deeds_fifo_stats", 0444, 0, &stat_fops);
if (0 == proc_stats)
{
printk(KERN_INFO "--- %s: creation of /proc/deeds_fifo_stats failed!\n", mod_name);
fifo_destroy(&fifo);
return -1;
}
err = create_dev_node();
if (err)
{
printk(KERN_INFO "--- %s: cdev (and node) creation failed!\n", mod_name);
proc_remove(proc_stats);
fifo_destroy(&fifo);
return err;
}
printk(KERN_INFO "--- %s: is being loaded.\n", mod_name);
return err;
}
void bootstrap()
{
#ifdef HAS_LCD
lcd_write_string("NOISE");
#endif
#if NUM_USERBUTTONS > 1
ubutton_register_callback(0, &userbutton_callback);
ubutton_register_callback(1, &userbutton_callback);
#endif
prepare_channel_indexes();
hw_radio_init(NULL, NULL);
fifo_init(&uart_rx_fifo, uart_rx_buffer, sizeof(uart_rx_buffer));
console_set_rx_interrupt_callback(&uart_rx_cb);
console_rx_interrupt_enable(true);
sched_register_task(&read_rssi);
sched_register_task(&start_rx);
sched_register_task(&process_uart_rx_fifo);
timer_post_task_delay(&start_rx, TIMER_TICKS_PER_SEC * 3);
sched_register_task((&execute_sensor_measurement));
timer_post_task_delay(&execute_sensor_measurement, TEMPERATURE_PERIOD);
measureTemperature();
}
int main(int argc, char * argv[]) {
unsigned int i = 0;
char b[32];
int ret = 0;
fifo_t fifo;
fifo_init(&fifo);
for(i = 0; i < 2600; i++) {
if(!fifo_put(&fifo, i + 'a')) {
printf("buffer full at %d\n", i);
break;
}
}
unsigned int out = -1;
unsigned int in = out + 10;
printf("%u - %u = %u\n", in, out, in - out);
ret = fifo_out(&fifo, b, 7);
b[ret] = 0;
printf("%d - %s\n", ret, b);
}
uint32_t ut_init(ut_data_handler_t evt_handler)
{
uesb_config_t tmp_config = UESB_DEFAULT_CONFIG;
m_evt_handler = evt_handler;
memcpy(&m_uesb_config, &tmp_config, sizeof(uesb_config_t));
m_uesb_config.retransmit_count = 2;
m_uesb_config.event_handler = uesb_event_handler;
m_uesb_config.radio_irq_priority = 0; // Needs to match softdevice priority
fifo_init(&m_transmit_fifo);
// Using three avilable interrupt handlers for interrupt level management
// These can be any available IRQ as we're not using any of the hardware,
// simply triggering them through software
NVIC_ClearPendingIRQ(TIMESLOT_END_IRQn);
NVIC_SetPriority(TIMESLOT_END_IRQn, 1);
NVIC_EnableIRQ(TIMESLOT_END_IRQn);
NVIC_ClearPendingIRQ(TIMESLOT_BEGIN_IRQn);
NVIC_SetPriority(TIMESLOT_BEGIN_IRQn, 1);
NVIC_EnableIRQ(TIMESLOT_BEGIN_IRQn);
NVIC_ClearPendingIRQ(UESB_RX_HANDLE_IRQn);
NVIC_SetPriority(UESB_RX_HANDLE_IRQn, 1);
NVIC_EnableIRQ(UESB_RX_HANDLE_IRQn);
return NRF_SUCCESS;
}
void shackbus_init(void)
{
// Initialize MCP2515
can_init(BITRATE_125_KBPS);
#ifdef UART_DEBUG
uart_write("can_init(BITRATE_125_KBPS);");
#endif
// Load filters and masks
can_static_filter(can_filter);
#ifdef UART_DEBUG
uart_write("can_static_filter(can_filter);");
#endif
fifo_init (&can_outfifo, can_outbuf, 10);
framestorage_init();
// Create a test messsage
send_msg_blink_ret.id = ((3L<<26)+(4L<<22)+(6L<<14)+(5L<<6)+11L); //Absender = 2 Empfänger = 1
send_msg_blink_ret.flags.rtr = 0;
send_msg_blink_ret.flags.extended = 1;
send_msg_blink_ret.length = 3;
send_msg_blink_ret.data[0] = 0;
send_msg_blink_ret.data[1] = 0;
send_msg_blink_ret.data[2] = 0;
shackbus_startup_message();
}
/**
* Kernel entry point
*/
void kmain(struct multiboot_info* info, unsigned int magic) {
initMemoryMap(info);
mm_pagination_init();
setupGDT();
setupIDT();
stdin = STACK_TOP_MAPPING;
stdout = (STACK_TOP_MAPPING + sizeof(FILE));
stderr = (STACK_TOP_MAPPING + 2 * sizeof(FILE));
cache_init();
ata_init(info);
fs_load();
fifo_init();
scheduler_init();
struct Process* idleProcess = process_table_new(idle, "idle", NULL, 1, NO_TERMINAL, 0);
struct Process* shellProcess = process_table_new(tty_run, "tty", idleProcess, 1, NO_TERMINAL, 0);
struct Process* cacheProcess = process_table_new(cache_flush, "cache_flush",idleProcess, 1, NO_TERMINAL, 0);
yield();
while (1) {}
}
// initialize module (executed when using insmod)
static int __init fifo_mod_init(void)
{
int err;
// create the procfs entry
procfs_config = proc_create(
"fifo_config", 0666, 0, &config_fops);
// check for null-pointer
if (0 == procfs_config)
{
printk(KERN_INFO "--- %s: creation of proc/fifo_config failed!\n", mod_name);
return -1;
}
err = fifo_init(&dev, 1024);
if (err)
{
printk(KERN_INFO "--- %s: fifo_init failed!\n", mod_name);
proc_remove(procfs_config);
return err;
}
err = create_dev_nodes();
if (err)
{
printk(KERN_INFO "--- %s: cdev_node creation failed!\n", mod_name);
proc_remove(procfs_config);
fifo_destroy(&dev);
return err;
}
printk(KERN_INFO "--- %s: is being loaded.\n", mod_name);
return 0;
}
void server_run(server_context_t *c, void *(*popper_thread)(void *))
{
fifo_init(&c->fifo, c->fifo_size_in_bits, c->fifo_packet_size_in_bits);
c->server_thread_arg.fifo = &c->fifo;
c->popper_thread_arg.fifo = &c->fifo;
c->server_thread_arg.max_packet_size = 1 << c->fifo_packet_size_in_bits;
c->popper_thread_arg.max_packet_size = 1 << c->fifo_packet_size_in_bits;
c->server_thread_arg.sleep_usec = c->sleep_usec;
c->popper_thread_arg.sleep_usec = c->sleep_usec;
c->server_thread_arg.max_mbps = c->max_mbps;
c->popper_thread_arg.max_mbps = c->max_mbps;
socket_open(c);
pthread_create(&c->server_th, NULL, (void* (*)(void*))server_thread, &c->server_thread_arg);
pthread_create(&c->popper_th, NULL, popper_thread, &c->popper_thread_arg);
pthread_join(c->popper_th, NULL);
#ifdef __ANDROID__
// this is wrong, but android has no pthread_cancel
// see stack overflow for a better solution that uses a SIGUSR1 handler
// that I don't have time to implement right now
// http://stackoverflow.com/questions/4610086/pthread-cancel-alternatives-in-android-ndk
// pthread_kill(c->server_th, SIGUSR1);
#else
pthread_cancel(c->server_th);
#endif
socket_close(c);
fifo_delete(&c->fifo);
}
int acc_init() {
// Use SPI0, mode0 with lsb shifted as requested PLACE AT TOP
volatile uint32_t counter = 0;
spi_ba = spi_master_init(SPI0, SPI_MODE3, false);
if (spi_ba == 0) {
return -1;
}
//Put the ADXL345 into StandBy Mode by writing 0x00
// to the POWER_CTL register.
write_register(ADXL345_POWER_CTL, 0x00); //Standby mode
//Put the ADXL345 into +/- 4G range by writing the value 0x01
// to the DATA_FORMAT register.
write_register(ADXL345_DATA_FORMAT, 0x00);
// set up sampling rate of 50Hz
write_register(ADXL345_BW_RATE, 0x09);
fifo_init();
int_init();
//Put the ADXL345 into Measurement Mode by writing 0x08
// to the POWER_CTL register.
write_register(ADXL345_POWER_CTL, 0x08); //Measurement mode
return 0;
}
int
file_mknod(int fd, int driver_pid, struct file *files[], int dev,
struct memory_pool *memory_pool, struct event_monitor *event_monitor)
{
int result;
switch(dev) {
case S_IFIFO:
result = fifo_init(fd, driver_pid, files, memory_pool, event_monitor);
break;
case S_IMSGQ:
result = mq_init(fd, driver_pid, files, memory_pool, event_monitor);
break;
case S_IFBLK:
result = block_init(fd, driver_pid, files, memory_pool, event_monitor);
break;
case S_IFREG:
result = regfile_init(fd, driver_pid, files, memory_pool, event_monitor);
break;
default:
result = -1;
}
if (result == 0) {
files[fd]->fd = fd;
}
return result;
}
/**@brief Initialize services that will be used by the application.
*/
void bleApp_servicesInit() {
uint32_t err_code;
ble_vns_init_t vns_init;
vns_init.version = 0x0100;
err_code = ble_vns_init(&m_vns, &vns_init);
APP_ERROR_CHECK(err_code);
ble_sps_init_t sps_init;
fifo_init(&ble_sps_txFifo, ble_sps_txFifoData, sizeof(ble_sps_txFifoData));
fifo_init(&ble_sps_rxFifo, ble_sps_rxFifoData, sizeof(ble_sps_rxFifoData));
sps_init.p_txFifo = &ble_sps_txFifo;
sps_init.p_rxFifo = &ble_sps_rxFifo;
err_code = ble_sps_init(&m_sps, &sps_init);
APP_ERROR_CHECK(err_code);
}
static void
task_b_main(layer_t* win_layer_b)
{
fifo32_t fifo;
timer_t* timer_1s;
int data, count = 0, count1 = 0;
int fifobuf[128];
char buf[32];
fifo_init(&fifo, fifobuf, 128, 0);
timer_1s = timer_alloc();
timer_init(timer_1s, &fifo, 100);
timer_settimer(timer_1s, 100);
for ( ; ; ) {
++count;
io_cli();
if (0 == fifo_size(&fifo))
io_sti();
else {
data = fifo_get(&fifo);
io_sti();
if (100 == data) {
sprintf(buf, "%011d", count - count1);
drawstring_and_refresh(win_layer_b, 24, 28,
COLOR8_000000, COLOR8_C6C6C6, buf, 11);
count1 = count;
timer_settimer(timer_1s, 100);
}
}
}
}