CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr) { CORE_ADDR func_addr = find_function_addr (function, NULL); struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); /* By this stage in the proceedings, SP has been decremented by "red zone size" + "struct return size". Fetch the stack-pointer from before this and use that as the BACK_CHAIN. */ const CORE_ADDR back_chain = read_sp (); /* See for-loop comment below. */ int write_pass; /* Size of the Altivec's vector parameter region, the final value is computed in the for-loop below. */ LONGEST vparam_size = 0; /* Size of the general parameter region, the final value is computed in the for-loop below. */ LONGEST gparam_size = 0; /* Kevin writes ... I don't mind seeing tdep->wordsize used in the calls to align_up(), align_down(), etc. because this makes it easier to reuse this code (in a copy/paste sense) in the future, but it is a 64-bit ABI and asserting that the wordsize is 8 bytes at some point makes it easier to verify that this function is correct without having to do a non-local analysis to figure out the possible values of tdep->wordsize. */ gdb_assert (tdep->wordsize == 8); /* Go through the argument list twice. Pass 1: Compute the function call's stack space and register requirements. Pass 2: Replay the same computation but this time also write the values out to the target. */ for (write_pass = 0; write_pass < 2; write_pass++) { int argno; /* Next available floating point register for float and double arguments. */ int freg = 1; /* Next available general register for non-vector (but possibly float) arguments. */ int greg = 3; /* Next available vector register for vector arguments. */ int vreg = 2; /* The address, at which the next general purpose parameter (integer, struct, float, ...) should be saved. */ CORE_ADDR gparam; /* Address, at which the next Altivec vector parameter should be saved. */ CORE_ADDR vparam; if (!write_pass) { /* During the first pass, GPARAM and VPARAM are more like offsets (start address zero) than addresses. That way the accumulate the total stack space each region requires. */ gparam = 0; vparam = 0; } else { /* Decrement the stack pointer making space for the Altivec and general on-stack parameters. Set vparam and gparam to their corresponding regions. */ vparam = align_down (sp - vparam_size, 16); gparam = align_down (vparam - gparam_size, 16); /* Add in space for the TOC, link editor double word, compiler double word, LR save area, CR save area. */ sp = align_down (gparam - 48, 16); } /* If the function is returning a `struct', then there is an extra hidden parameter (which will be passed in r3) containing the address of that struct.. In that case we should advance one word and start from r4 register to copy parameters. This also consumes one on-stack parameter slot. */ if (struct_return) { if (write_pass) regcache_cooked_write_signed (regcache, tdep->ppc_gp0_regnum + greg, struct_addr); greg++; gparam = align_up (gparam + tdep->wordsize, tdep->wordsize); } for (argno = 0; argno < nargs; argno++) { struct value *arg = args[argno]; struct type *type = check_typedef (value_type (arg)); const bfd_byte *val = value_contents (arg); if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8) { /* Floats and Doubles go in f1 .. f13. They also consume a left aligned GREG,, and can end up in memory. */ if (write_pass) { if (ppc_floating_point_unit_p (current_gdbarch) && freg <= 13) { gdb_byte regval[MAX_REGISTER_SIZE]; struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); convert_typed_floating (val, type, regval, regtype); regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg, regval); } if (greg <= 10) { /* The ABI states "Single precision floating point values are mapped to the first word in a single doubleword" and "... floating point values mapped to the first eight doublewords of the parameter save area are also passed in general registers"). This code interprets that to mean: store it, left aligned, in the general register. */ gdb_byte regval[MAX_REGISTER_SIZE]; memset (regval, 0, sizeof regval); memcpy (regval, val, TYPE_LENGTH (type)); regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + greg, regval); } write_memory (gparam, val, TYPE_LENGTH (type)); } /* Always consume parameter stack space. */ freg++; greg++; gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); } else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type) && TYPE_CODE (type) == TYPE_CODE_ARRAY && tdep->ppc_vr0_regnum >= 0) { /* In the Altivec ABI, vectors go in the vector registers v2 .. v13, or when that runs out, a vector annex which goes above all the normal parameters. NOTE: cagney/2003-09-21: This is a guess based on the PowerOpen Altivec ABI. */ if (vreg <= 13) { if (write_pass) regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + vreg, val); vreg++; } else { if (write_pass) write_memory (vparam, val, TYPE_LENGTH (type)); vparam = align_up (vparam + TYPE_LENGTH (type), 16); } } else if ((TYPE_CODE (type) == TYPE_CODE_INT || TYPE_CODE (type) == TYPE_CODE_ENUM || TYPE_CODE (type) == TYPE_CODE_PTR) && TYPE_LENGTH (type) <= 8) { /* Scalars and Pointers get sign[un]extended and go in gpr3 .. gpr10. They can also end up in memory. */ if (write_pass) { /* Sign extend the value, then store it unsigned. */ ULONGEST word = unpack_long (type, val); /* Convert any function code addresses into descriptors. */ if (TYPE_CODE (type) == TYPE_CODE_PTR && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC) { CORE_ADDR desc = word; convert_code_addr_to_desc_addr (word, &desc); word = desc; } if (greg <= 10) regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + greg, word); write_memory_unsigned_integer (gparam, tdep->wordsize, word); } greg++; gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); } else { int byte; for (byte = 0; byte < TYPE_LENGTH (type); byte += tdep->wordsize) { if (write_pass && greg <= 10) { gdb_byte regval[MAX_REGISTER_SIZE]; int len = TYPE_LENGTH (type) - byte; if (len > tdep->wordsize) len = tdep->wordsize; memset (regval, 0, sizeof regval); /* WARNING: cagney/2003-09-21: As best I can tell, the ABI specifies that the value should be left aligned. Unfortunately, GCC doesn't do this - it instead right aligns even sized values and puts odd sized values on the stack. Work around that by putting both a left and right aligned value into the register (hopefully no one notices :-^). Arrrgh! */ /* Left aligned (8 byte values such as pointers fill the buffer). */ memcpy (regval, val + byte, len); /* Right aligned (but only if even). */ if (len == 1 || len == 2 || len == 4) memcpy (regval + tdep->wordsize - len, val + byte, len); regcache_cooked_write (regcache, greg, regval); } greg++; } if (write_pass) /* WARNING: cagney/2003-09-21: Strictly speaking, this isn't necessary, unfortunately, GCC appears to get "struct convention" parameter passing wrong putting odd sized structures in memory instead of in a register. Work around this by always writing the value to memory. Fortunately, doing this simplifies the code. */ write_memory (gparam, val, TYPE_LENGTH (type)); if (write_pass) /* WARNING: cagney/2004-06-20: It appears that GCC likes to put structures containing a single floating-point member in an FP register instead of general general purpose. */ /* Always consume parameter stack space. */ gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); } } if (!write_pass) { /* Save the true region sizes ready for the second pass. */ vparam_size = vparam; /* Make certain that the general parameter save area is at least the minimum 8 registers (or doublewords) in size. */ if (greg < 8) gparam_size = 8 * tdep->wordsize; else gparam_size = gparam; } } /* Update %sp. */ regcache_cooked_write_signed (regcache, SP_REGNUM, sp); /* Write the backchain (it occupies WORDSIZED bytes). */ write_memory_signed_integer (sp, tdep->wordsize, back_chain); /* Point the inferior function call's return address at the dummy's breakpoint. */ regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); /* Use the func_addr to find the descriptor, and use that to find the TOC. */ { CORE_ADDR desc_addr; if (convert_code_addr_to_desc_addr (func_addr, &desc_addr)) { /* The TOC is the second double word in the descriptor. */ CORE_ADDR toc = read_memory_unsigned_integer (desc_addr + tdep->wordsize, tdep->wordsize); regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 2, toc); } } return sp; }
static CORE_ADDR rs6000_lynx178_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr) { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); int ii; int len = 0; int argno; /* current argument number */ int argbytes; /* current argument byte */ gdb_byte tmp_buffer[50]; int f_argno = 0; /* current floating point argno */ int wordsize = gdbarch_tdep (gdbarch)->wordsize; CORE_ADDR func_addr = find_function_addr (function, NULL); struct value *arg = 0; struct type *type; ULONGEST saved_sp; /* The calling convention this function implements assumes the processor has floating-point registers. We shouldn't be using it on PPC variants that lack them. */ gdb_assert (ppc_floating_point_unit_p (gdbarch)); /* The first eight words of ther arguments are passed in registers. Copy them appropriately. */ ii = 0; /* If the function is returning a `struct', then the first word (which will be passed in r3) is used for struct return address. In that case we should advance one word and start from r4 register to copy parameters. */ if (struct_return) { regcache_raw_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, struct_addr); ii++; } /* Effectively indirect call... gcc does... return_val example( float, int); eabi: float in fp0, int in r3 offset of stack on overflow 8/16 for varargs, must go by type. power open: float in r3&r4, int in r5 offset of stack on overflow different both: return in r3 or f0. If no float, must study how gcc emulates floats; pay attention to arg promotion. User may have to cast\args to handle promotion correctly since gdb won't know if prototype supplied or not. */ for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii) { int reg_size = register_size (gdbarch, ii + 3); arg = args[argno]; type = check_typedef (value_type (arg)); len = TYPE_LENGTH (type); if (TYPE_CODE (type) == TYPE_CODE_FLT) { /* Floating point arguments are passed in fpr's, as well as gpr's. There are 13 fpr's reserved for passing parameters. At this point there is no way we would run out of them. Always store the floating point value using the register's floating-point format. */ const int fp_regnum = tdep->ppc_fp0_regnum + 1 + f_argno; gdb_byte reg_val[MAX_REGISTER_SIZE]; struct type *reg_type = register_type (gdbarch, fp_regnum); gdb_assert (len <= 8); convert_typed_floating (value_contents (arg), type, reg_val, reg_type); regcache_cooked_write (regcache, fp_regnum, reg_val); ++f_argno; } if (len > reg_size) { /* Argument takes more than one register. */ while (argbytes < len) { gdb_byte word[MAX_REGISTER_SIZE]; memset (word, 0, reg_size); memcpy (word, ((char *) value_contents (arg)) + argbytes, (len - argbytes) > reg_size ? reg_size : len - argbytes); regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3 + ii, word); ++ii, argbytes += reg_size; if (ii >= 8) goto ran_out_of_registers_for_arguments; } argbytes = 0; --ii; } else { /* Argument can fit in one register. No problem. */ int adj = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? reg_size - len : 0; gdb_byte word[MAX_REGISTER_SIZE]; memset (word, 0, reg_size); memcpy (word, value_contents (arg), len); regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3 +ii, word); } ++argno; } ran_out_of_registers_for_arguments: regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), &saved_sp); /* Location for 8 parameters are always reserved. */ sp -= wordsize * 8; /* Another six words for back chain, TOC register, link register, etc. */ sp -= wordsize * 6; /* Stack pointer must be quadword aligned. */ sp = align_down (sp, 16); /* If there are more arguments, allocate space for them in the stack, then push them starting from the ninth one. */ if ((argno < nargs) || argbytes) { int space = 0, jj; if (argbytes) { space += align_up (len - argbytes, 4); jj = argno + 1; } else jj = argno; for (; jj < nargs; ++jj) { struct value *val = args[jj]; space += align_up (TYPE_LENGTH (value_type (val)), 4); } /* Add location required for the rest of the parameters. */ space = align_up (space, 16); sp -= space; /* This is another instance we need to be concerned about securing our stack space. If we write anything underneath %sp (r1), we might conflict with the kernel who thinks he is free to use this area. So, update %sp first before doing anything else. */ regcache_raw_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); /* If the last argument copied into the registers didn't fit there completely, push the rest of it into stack. */ if (argbytes) { write_memory (sp + 24 + (ii * 4), value_contents (arg) + argbytes, len - argbytes); ++argno; ii += align_up (len - argbytes, 4) / 4; } /* Push the rest of the arguments into stack. */ for (; argno < nargs; ++argno) { arg = args[argno]; type = check_typedef (value_type (arg)); len = TYPE_LENGTH (type); /* Float types should be passed in fpr's, as well as in the stack. */ if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) { gdb_assert (len <= 8); regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + f_argno, value_contents (arg)); ++f_argno; } write_memory (sp + 24 + (ii * 4), value_contents (arg), len); ii += align_up (len, 4) / 4; } } /* Set the stack pointer. According to the ABI, the SP is meant to be set _before_ the corresponding stack space is used. On AIX, this even applies when the target has been completely stopped! Not doing this can lead to conflicts with the kernel which thinks that it still has control over this not-yet-allocated stack region. */ regcache_raw_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); /* Set back chain properly. */ store_unsigned_integer (tmp_buffer, wordsize, byte_order, saved_sp); write_memory (sp, tmp_buffer, wordsize); /* Point the inferior function call's return address at the dummy's breakpoint. */ regcache_raw_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); target_store_registers (regcache, -1); return sp; }
CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr) { CORE_ADDR func_addr = find_function_addr (function, NULL); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); ULONGEST back_chain; /* See for-loop comment below. */ int write_pass; /* Size of the Altivec's vector parameter region, the final value is computed in the for-loop below. */ LONGEST vparam_size = 0; /* Size of the general parameter region, the final value is computed in the for-loop below. */ LONGEST gparam_size = 0; /* Kevin writes ... I don't mind seeing tdep->wordsize used in the calls to align_up(), align_down(), etc. because this makes it easier to reuse this code (in a copy/paste sense) in the future, but it is a 64-bit ABI and asserting that the wordsize is 8 bytes at some point makes it easier to verify that this function is correct without having to do a non-local analysis to figure out the possible values of tdep->wordsize. */ gdb_assert (tdep->wordsize == 8); /* This function exists to support a calling convention that requires floating-point registers. It shouldn't be used on processors that lack them. */ gdb_assert (ppc_floating_point_unit_p (gdbarch)); /* By this stage in the proceedings, SP has been decremented by "red zone size" + "struct return size". Fetch the stack-pointer from before this and use that as the BACK_CHAIN. */ regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), &back_chain); /* Go through the argument list twice. Pass 1: Compute the function call's stack space and register requirements. Pass 2: Replay the same computation but this time also write the values out to the target. */ for (write_pass = 0; write_pass < 2; write_pass++) { int argno; /* Next available floating point register for float and double arguments. */ int freg = 1; /* Next available general register for non-vector (but possibly float) arguments. */ int greg = 3; /* Next available vector register for vector arguments. */ int vreg = 2; /* The address, at which the next general purpose parameter (integer, struct, float, ...) should be saved. */ CORE_ADDR gparam; /* Address, at which the next Altivec vector parameter should be saved. */ CORE_ADDR vparam; if (!write_pass) { /* During the first pass, GPARAM and VPARAM are more like offsets (start address zero) than addresses. That way they accumulate the total stack space each region requires. */ gparam = 0; vparam = 0; } else { /* Decrement the stack pointer making space for the Altivec and general on-stack parameters. Set vparam and gparam to their corresponding regions. */ vparam = align_down (sp - vparam_size, 16); gparam = align_down (vparam - gparam_size, 16); /* Add in space for the TOC, link editor double word, compiler double word, LR save area, CR save area. */ sp = align_down (gparam - 48, 16); } /* If the function is returning a `struct', then there is an extra hidden parameter (which will be passed in r3) containing the address of that struct.. In that case we should advance one word and start from r4 register to copy parameters. This also consumes one on-stack parameter slot. */ if (struct_return) { if (write_pass) regcache_cooked_write_signed (regcache, tdep->ppc_gp0_regnum + greg, struct_addr); greg++; gparam = align_up (gparam + tdep->wordsize, tdep->wordsize); } for (argno = 0; argno < nargs; argno++) { struct value *arg = args[argno]; struct type *type = check_typedef (value_type (arg)); const bfd_byte *val = value_contents (arg); if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8) { /* Floats and Doubles go in f1 .. f13. They also consume a left aligned GREG,, and can end up in memory. */ if (write_pass) { gdb_byte regval[MAX_REGISTER_SIZE]; const gdb_byte *p; /* Version 1.7 of the 64-bit PowerPC ELF ABI says: "Single precision floating point values are mapped to the first word in a single doubleword." And version 1.9 says: "Single precision floating point values are mapped to the second word in a single doubleword." GDB then writes single precision floating point values at both words in a doubleword, to support both ABIs. */ if (TYPE_LENGTH (type) == 4) { memcpy (regval, val, 4); memcpy (regval + 4, val, 4); p = regval; } else p = val; /* Write value in the stack's parameter save area. */ write_memory (gparam, p, 8); if (freg <= 13) { struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); convert_typed_floating (val, type, regval, regtype); regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg, regval); } if (greg <= 10) regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + greg, regval); } freg++; greg++; /* Always consume parameter stack space. */ gparam = align_up (gparam + 8, tdep->wordsize); } else if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 16 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double)) { /* IBM long double stored in two doublewords of the parameter save area and corresponding registers. */ if (write_pass) { if (!tdep->soft_float && freg <= 13) { regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg, val); if (freg <= 12) regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg + 1, val + 8); } if (greg <= 10) { regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + greg, val); if (greg <= 9) regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + greg + 1, val + 8); } write_memory (gparam, val, TYPE_LENGTH (type)); } freg += 2; greg += 2; gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); } else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) <= 8) { /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can end up in memory. */ if (write_pass) { gdb_byte regval[MAX_REGISTER_SIZE]; const gdb_byte *p; /* 32-bit decimal floats are right aligned in the doubleword. */ if (TYPE_LENGTH (type) == 4) { memcpy (regval + 4, val, 4); p = regval; } else p = val; /* Write value in the stack's parameter save area. */ write_memory (gparam, p, 8); if (freg <= 13) regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg, p); } freg++; greg++; /* Always consume parameter stack space. */ gparam = align_up (gparam + 8, tdep->wordsize); } else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 16) { /* 128-bit decimal floats go in f2 .. f12, always in even/odd pairs. They can end up in memory, using two doublewords. */ if (write_pass) { if (freg <= 12) { /* Make sure freg is even. */ freg += freg & 1; regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg, val); regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg + 1, val + 8); } write_memory (gparam, val, TYPE_LENGTH (type)); } freg += 2; greg += 2; gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); } else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type) && TYPE_CODE (type) == TYPE_CODE_ARRAY && tdep->ppc_vr0_regnum >= 0) { /* In the Altivec ABI, vectors go in the vector registers v2 .. v13, or when that runs out, a vector annex which goes above all the normal parameters. NOTE: cagney/2003-09-21: This is a guess based on the PowerOpen Altivec ABI. */ if (vreg <= 13) { if (write_pass) regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + vreg, val); vreg++; } else { if (write_pass) write_memory (vparam, val, TYPE_LENGTH (type)); vparam = align_up (vparam + TYPE_LENGTH (type), 16); } } else if ((TYPE_CODE (type) == TYPE_CODE_INT || TYPE_CODE (type) == TYPE_CODE_ENUM || TYPE_CODE (type) == TYPE_CODE_BOOL || TYPE_CODE (type) == TYPE_CODE_CHAR || TYPE_CODE (type) == TYPE_CODE_PTR || TYPE_CODE (type) == TYPE_CODE_REF) && TYPE_LENGTH (type) <= 8) { /* Scalars and Pointers get sign[un]extended and go in gpr3 .. gpr10. They can also end up in memory. */ if (write_pass) { /* Sign extend the value, then store it unsigned. */ ULONGEST word = unpack_long (type, val); /* Convert any function code addresses into descriptors. */ if (TYPE_CODE (type) == TYPE_CODE_PTR || TYPE_CODE (type) == TYPE_CODE_REF) { struct type *target_type; target_type = check_typedef (TYPE_TARGET_TYPE (type)); if (TYPE_CODE (target_type) == TYPE_CODE_FUNC || TYPE_CODE (target_type) == TYPE_CODE_METHOD) { CORE_ADDR desc = word; convert_code_addr_to_desc_addr (word, &desc); word = desc; } } if (greg <= 10) regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + greg, word); write_memory_unsigned_integer (gparam, tdep->wordsize, byte_order, word); } greg++; gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); } else { int byte; for (byte = 0; byte < TYPE_LENGTH (type); byte += tdep->wordsize) { if (write_pass && greg <= 10) { gdb_byte regval[MAX_REGISTER_SIZE]; int len = TYPE_LENGTH (type) - byte; if (len > tdep->wordsize) len = tdep->wordsize; memset (regval, 0, sizeof regval); /* The ABI (version 1.9) specifies that values smaller than one doubleword are right-aligned and those larger are left-aligned. GCC versions before 3.4 implemented this incorrectly; see <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */ if (byte == 0) memcpy (regval + tdep->wordsize - len, val + byte, len); else memcpy (regval, val + byte, len); regcache_cooked_write (regcache, greg, regval); } greg++; } if (write_pass) { /* WARNING: cagney/2003-09-21: Strictly speaking, this isn't necessary, unfortunately, GCC appears to get "struct convention" parameter passing wrong putting odd sized structures in memory instead of in a register. Work around this by always writing the value to memory. Fortunately, doing this simplifies the code. */ int len = TYPE_LENGTH (type); if (len < tdep->wordsize) write_memory (gparam + tdep->wordsize - len, val, len); else write_memory (gparam, val, len); } if (freg <= 13 && TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1 && TYPE_LENGTH (type) <= 16) { /* The ABI (version 1.9) specifies that structs containing a single floating-point value, at any level of nesting of single-member structs, are passed in floating-point registers. */ while (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) type = check_typedef (TYPE_FIELD_TYPE (type, 0)); if (TYPE_CODE (type) == TYPE_CODE_FLT) { if (TYPE_LENGTH (type) <= 8) { if (write_pass) { gdb_byte regval[MAX_REGISTER_SIZE]; struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); convert_typed_floating (val, type, regval, regtype); regcache_cooked_write (regcache, (tdep->ppc_fp0_regnum + freg), regval); } freg++; } else if (TYPE_LENGTH (type) == 16 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double)) { if (write_pass) { regcache_cooked_write (regcache, (tdep->ppc_fp0_regnum + freg), val); if (freg <= 12) regcache_cooked_write (regcache, (tdep->ppc_fp0_regnum + freg + 1), val + 8); } freg += 2; } } } /* Always consume parameter stack space. */ gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); } } if (!write_pass) { /* Save the true region sizes ready for the second pass. */ vparam_size = vparam; /* Make certain that the general parameter save area is at least the minimum 8 registers (or doublewords) in size. */ if (greg < 8) gparam_size = 8 * tdep->wordsize; else gparam_size = gparam; } } /* Update %sp. */ regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); /* Write the backchain (it occupies WORDSIZED bytes). */ write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain); /* Point the inferior function call's return address at the dummy's breakpoint. */ regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); /* Use the func_addr to find the descriptor, and use that to find the TOC. If we're calling via a function pointer, the pointer itself identifies the descriptor. */ { struct type *ftype = check_typedef (value_type (function)); CORE_ADDR desc_addr = value_as_address (function); if (TYPE_CODE (ftype) == TYPE_CODE_PTR || convert_code_addr_to_desc_addr (func_addr, &desc_addr)) { /* The TOC is the second double word in the descriptor. */ CORE_ADDR toc = read_memory_unsigned_integer (desc_addr + tdep->wordsize, tdep->wordsize, byte_order); regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 2, toc); } } return sp; }