static void
s390_store_tdb (struct regcache *regcache, const void *buf)
{
int tdb0 = find_regno (regcache->tdesc, "tdb0");
int tr0 = find_regno (regcache->tdesc, "tr0");
int i;
for (i = 0; i < 4; i++)
supply_register (regcache, tdb0 + i, (const char *) buf + 8 * i);
for (i = 0; i < 16; i++)
supply_register (regcache, tr0 + i, (const char *) buf + 8 * (16 + i));
}
static void
xtensa_fill_gregset (void *buf)
{
elf_greg_t* rset = (elf_greg_t*)buf;
int ar0_regnum;
char *ptr;
int i;
/* Take care of AR registers. */
ar0_regnum = find_regno ("ar0");
ptr = (char*)&rset[R_A0];
for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
{
collect_register (i, ptr);
ptr += register_size(i);
}
/* Loop registers, if hardware has it. */
#if XCHAL_HAVE_LOOP
collect_register_by_name ("lbeg", (char*)&rset[R_LBEG]);
collect_register_by_name ("lend", (char*)&rset[R_LEND]);
collect_register_by_name ("lcount", (char*)&rset[R_LCOUNT]);
#endif
collect_register_by_name ("sar", (char*)&rset[R_SAR]);
collect_register_by_name ("pc", (char*)&rset[R_PC]);
collect_register_by_name ("ps", (char*)&rset[R_PS]);
collect_register_by_name ("windowbase", (char*)&rset[R_WB]);
collect_register_by_name ("windowstart", (char*)&rset[R_WS]);
}
static void
xtensa_fill_gregset (struct regcache *regcache, void *buf)
{
elf_greg_t* rset = (elf_greg_t*)buf;
const struct target_desc *tdesc = regcache->tdesc;
int ar0_regnum;
char *ptr;
int i;
/* Take care of AR registers. */
ar0_regnum = find_regno (tdesc, "ar0");
ptr = (char*)&rset[R_A0];
for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
{
collect_register (regcache, i, ptr);
ptr += register_size (tdesc, i);
}
/* Loop registers, if hardware has it. */
#if XCHAL_HAVE_LOOPS
collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
#endif
collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
}
static int
ppc_cannot_store_register (int regno)
{
#ifndef __powerpc64__
/* Some kernels do not allow us to store fpscr. */
if (!(ppc_hwcap & PPC_FEATURE_HAS_SPE) && regno == find_regno ("fpscr"))
return 2;
#endif
/* Some kernels do not allow us to store orig_r3 or trap. */
if (regno == find_regno ("orig_r3")
|| regno == find_regno ("trap"))
return 2;
return 0;
}
static void
xtensa_store_gregset (struct regcache *regcache, const void *buf)
{
const elf_greg_t* rset = (const elf_greg_t*)buf;
int ar0_regnum;
char *ptr;
int i;
/* Take care of AR registers. */
ar0_regnum = find_regno ("ar0");
ptr = (char *)&rset[R_A0];
for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
{
supply_register (regcache, i, ptr);
ptr += register_size(i);
}
/* Loop registers, if hardware has it. */
#if XCHAL_HAVE_LOOP
supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
#endif
supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
}
static void
mips_fill_gregset (struct regcache *regcache, void *buf)
{
union mips_register *regset = buf;
int i, use_64bit;
use_64bit = (register_size (0) == 8);
for (i = 1; i < 32; i++)
mips_collect_register (regcache, use_64bit, i, regset + i);
mips_collect_register (regcache, use_64bit,
find_regno ("lo"), regset + 32);
mips_collect_register (regcache, use_64bit,
find_regno ("hi"), regset + 33);
mips_collect_register (regcache, use_64bit,
find_regno ("pc"), regset + 34);
mips_collect_register (regcache, use_64bit,
find_regno ("badvaddr"), regset + 35);
mips_collect_register (regcache, use_64bit,
find_regno ("status"), regset + 36);
mips_collect_register (regcache, use_64bit,
find_regno ("cause"), regset + 37);
mips_collect_register (regcache, use_64bit,
find_regno ("restart"), regset + 0);
}
static void
s390_store_vxrs_low (struct regcache *regcache, const void *buf)
{
int v0 = find_regno (regcache->tdesc, "v0l");
int i;
for (i = 0; i < 16; i++)
supply_register (regcache, v0 + i, (const char *) buf + 8 * i);
}
static void
s390_fill_vxrs_high (struct regcache *regcache, void *buf)
{
int v16 = find_regno (regcache->tdesc, "v16");
int i;
for (i = 0; i < 16; i++)
collect_register (regcache, v16 + i, (char *) buf + 16 * i);
}
static void
s390_store_vxrs_high (struct regcache *regcache, const void *buf)
{
int v16 = find_regno (regcache->tdesc, "v16");
int i;
for (i = 0; i < 16; i++)
supply_register (regcache, v16 + i, (const char *) buf + 16 * i);
}
static int
ppc_cannot_store_register (int regno)
{
/* Some kernels do not allow us to store fpscr. */
if (regno == find_regno ("fpscr"))
return 2;
return 0;
}
static void
s390_fill_vxrs_low (struct regcache *regcache, void *buf)
{
int v0 = find_regno (regcache->tdesc, "v0l");
int i;
for (i = 0; i < 16; i++)
collect_register (regcache, v0 + i, (char *) buf + 8 * i);
}
static int
mips_cannot_store_register (int regno)
{
if (mips_regmap[regno] == -1)
return 1;
if (find_regno ("zero") == regno)
return 1;
if (find_regno ("cause") == regno)
return 1;
if (find_regno ("bad") == regno)
return 1;
if (find_regno ("fir") == regno)
return 1;
return 0;
}
static int
mips_cannot_fetch_register (int regno)
{
if (mips_regmap[regno] == -1)
return 1;
if (find_regno ("zero") == regno)
return 1;
return 0;
}
static int
nios2_cannot_store_register (int regno)
{
if (nios2_regmap[regno] == -1)
return 1;
if (find_regno ("r0") == regno)
return 1;
return 0;
}
static int
mips_cannot_store_register (int regno)
{
if (the_low_target.regmap[regno] == -1)
return 1;
if (find_regno ("r0") == regno)
return 1;
if (find_regno ("cause") == regno)
return 1;
if (find_regno ("badvaddr") == regno)
return 1;
if (find_regno ("fir") == regno)
return 1;
return 0;
}
static int
mips_cannot_fetch_register (int regno)
{
if (the_low_target.regmap[regno] == -1)
return 1;
if (find_regno ("r0") == regno)
return 1;
return 0;
}
static void
sparc_fill_gregset_to_stack (struct regcache *regcache, const void *buf)
{
int i;
CORE_ADDR addr = 0;
unsigned char tmp_reg_buf[8];
const int l0_regno = find_regno("l0");
const int i7_regno = l0_regno + 15;
/* These registers have to be stored in the stack. */
memcpy(&addr, ((char *) buf) + sparc_regmap[find_regno("sp")], sizeof(addr));
addr += BIAS;
for (i = l0_regno; i <= i7_regno; i++)
{
collect_register (regcache, i, tmp_reg_buf);
(*the_target->write_memory) (addr, tmp_reg_buf, sizeof(tmp_reg_buf));
addr += sizeof(tmp_reg_buf);
}
}
static void
sparc_store_gregset_from_stack (struct regcache *regcache, const void *buf)
{
int i;
CORE_ADDR addr = 0;
unsigned char tmp_reg_buf[8];
const int l0_regno = find_regno("l0");
const int i7_regno = l0_regno + 15;
/* These registers have to be obtained from the stack. */
memcpy(&addr, ((char *) buf) + sparc_regmap[find_regno("sp")], sizeof(addr));
addr += BIAS;
for (i = l0_regno; i <= i7_regno; i++)
{
(*the_target->read_memory) (addr, tmp_reg_buf, sizeof(tmp_reg_buf));
supply_register (regcache, i, tmp_reg_buf);
addr += sizeof(tmp_reg_buf);
}
}
void
arm_store_vfpregset_num (struct regcache *regcache, const void *buf, int num)
{
int i, base;
gdb_assert (num == 16 || num == 32);
base = find_regno (regcache->tdesc, "d0");
for (i = 0; i < num; i++)
supply_register (regcache, base + i, (char *) buf + i * 8);
supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
}
static void
ppc_fill_vsxregset (void *buf)
{
int i, base;
char *regset = buf;
if (!(ppc_hwcap & PPC_FEATURE_HAS_VSX))
return;
base = find_regno ("vs0h");
for (i = 0; i < 32; i++)
collect_register (base + i, ®set[i * 8]);
}
static void
ppc_store_vsxregset (const void *buf)
{
int i, base;
const char *regset = buf;
if (!(ppc_hwcap & PPC_FEATURE_HAS_VSX))
return;
base = find_regno ("vs0h");
for (i = 0; i < 32; i++)
supply_register (base + i, ®set[i * 8]);
}
static void
mips_store_fpregset (struct regcache *regcache, const void *buf)
{
const union mips_register *regset = buf;
int i, use_64bit, first_fp, big_endian;
use_64bit = (register_size (0) == 8);
first_fp = find_regno ("f0");
big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
/* See GDB for a discussion of this peculiar layout. */
for (i = 0; i < 32; i++)
if (use_64bit)
supply_register (regcache, first_fp + i, regset[i].buf);
else
supply_register (regcache, first_fp + i,
regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
mips_supply_register_32bit (regcache, use_64bit,
find_regno ("fcsr"), regset[32].buf);
mips_supply_register_32bit (regcache, use_64bit, find_regno ("fir"),
regset[32].buf + 4);
}
static void
ppc_store_vrregset (const void *buf)
{
int i, base;
const char *regset = buf;
if (!(ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC))
return;
base = find_regno ("vr0");
for (i = 0; i < 32; i++)
supply_register (base + i, ®set[i * 16]);
supply_register_by_name ("vscr", ®set[32 * 16 + 12]);
supply_register_by_name ("vrsave", ®set[33 * 16]);
}
static void
ppc_store_evrregset (const void *buf)
{
int i, ev0;
const struct gdb_evrregset_t *regset = buf;
if (!(ppc_hwcap & PPC_FEATURE_HAS_SPE))
return;
ev0 = find_regno ("ev0h");
for (i = 0; i < 32; i++)
supply_register (ev0 + i, ®set->evr[i]);
supply_register_by_name ("acc", ®set->acc);
supply_register_by_name ("spefscr", ®set->spefscr);
}
static void
arm_store_vfpregset (struct regcache *regcache, const void *buf)
{
int i, num, base;
if (!(arm_hwcap & HWCAP_VFP))
return;
if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
num = 32;
else
num = 16;
base = find_regno ("d0");
for (i = 0; i < num; i++)
supply_register (regcache, base + i, (char *) buf + i * 8);
supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
}
static void
arm_fill_vfpregset (void *buf)
{
int i, num, base;
if (!(arm_hwcap & HWCAP_VFP))
return;
if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
num = 32;
else
num = 16;
base = find_regno ("d0");
for (i = 0; i < num; i++)
collect_register (base + i, (char *) buf + i * 8);
collect_register_by_name ("fpscr", (char *) buf + 32 * 8);
}
void
collect_register_by_name (struct regcache *regcache,
const char *name, void *buf)
{
collect_register (regcache, find_regno (regcache->tdesc, name), buf);
}
void
supply_register_by_name (struct regcache *regcache,
const char *name, const void *buf)
{
supply_register (regcache, find_regno (regcache->tdesc, name), buf);
}
static void
s390_arch_setup (void)
{
const struct target_desc *tdesc;
struct regset_info *regset;
/* Check whether the kernel supports extra register sets. */
int pid = pid_of (get_thread_lwp (current_inferior));
int have_regset_last_break
= s390_check_regset (pid, NT_S390_LAST_BREAK, 8);
int have_regset_system_call
= s390_check_regset (pid, NT_S390_SYSTEM_CALL, 4);
int have_regset_tdb = s390_check_regset (pid, NT_S390_TDB, 256);
/* Update target_regsets according to available register sets. */
for (regset = s390_regsets; regset->fill_function != NULL; regset++)
if (regset->get_request == PTRACE_GETREGSET)
switch (regset->nt_type)
{
case NT_S390_LAST_BREAK:
regset->size = have_regset_last_break? 8 : 0;
break;
case NT_S390_SYSTEM_CALL:
regset->size = have_regset_system_call? 4 : 0;
break;
case NT_S390_TDB:
regset->size = have_regset_tdb ? 256 : 0;
default:
break;
}
/* Assume 31-bit inferior process. */
if (have_regset_system_call)
tdesc = tdesc_s390_linux32v2;
else if (have_regset_last_break)
tdesc = tdesc_s390_linux32v1;
else
tdesc = tdesc_s390_linux32;
/* On a 64-bit host, check the low bit of the (31-bit) PSWM
-- if this is one, we actually have a 64-bit inferior. */
#ifdef __s390x__
{
unsigned int pswm;
struct regcache *regcache = new_register_cache (tdesc);
fetch_inferior_registers (regcache, find_regno (tdesc, "pswm"));
collect_register_by_name (regcache, "pswm", &pswm);
free_register_cache (regcache);
if (pswm & 1)
{
if (have_regset_tdb)
tdesc = tdesc_s390x_te_linux64;
if (have_regset_system_call)
tdesc = tdesc_s390x_linux64v2;
else if (have_regset_last_break)
tdesc = tdesc_s390x_linux64v1;
else
tdesc = tdesc_s390x_linux64;
}
/* For a 31-bit inferior, check whether the kernel supports
using the full 64-bit GPRs. */
else if (s390_get_hwcap (tdesc) & HWCAP_S390_HIGH_GPRS)
{
have_hwcap_s390_high_gprs = 1;
if (have_regset_tdb)
tdesc = tdesc_s390_te_linux64;
else if (have_regset_system_call)
tdesc = tdesc_s390_linux64v2;
else if (have_regset_last_break)
tdesc = tdesc_s390_linux64v1;
else
tdesc = tdesc_s390_linux64;
}
}
#endif
current_process ()->tdesc = tdesc;
}
void
collect_register_by_name(const char *name, void *buf)
{
collect_register(find_regno(name), buf);
}
