static int amd_flash_write_cfibuffer(struct flash_info *info, unsigned long dest,
const u8 *cp, int len)
{
flash_sect_t sector;
int cnt;
void *src = (void *)cp;
void *dst = (void *)dest;
cfiword_t cword;
sector = find_sector (info, dest);
flash_unlock_seq(info);
flash_make_cmd (info, AMD_CMD_WRITE_TO_BUFFER, &cword);
flash_write_word(info, cword, (void *)dest);
if (bankwidth_is_1(info)) {
cnt = len;
flash_write_cmd(info, sector, 0, (u32)cnt - 1);
while (cnt-- > 0) {
flash_write8(flash_read8(src), dst);
src += 1, dst += 1;
}
} else if (bankwidth_is_2(info)) {
cnt = len >> 1;
flash_write_cmd(info, sector, 0, (u32)cnt - 1);
while (cnt-- > 0) {
flash_write16(flash_read16(src), dst);
src += 2, dst += 2;
}
} else if (bankwidth_is_4(info)) {
/* Internal: retrieve intel protection data */
__ramtext
static int get_intel_protection(void *base_addr,
uint16_t * lockp, uint8_t protp[8])
{
int i;
/* check args */
if (!lockp) {
return -EINVAL;
}
if (!protp) {
return -EINVAL;
}
/* enter read id mode */
flash_write_cmd(base_addr, CFI_CMD_READ_ID);
/* get lock */
*lockp = flash_read16(base_addr, CFI_OFFSET_INTEL_PROTECTION);
/* get data */
for (i = 0; i < 8; i++) {
protp[i] = flash_read16(base_addr, CFI_OFFSET_INTEL_PROTECTION + 1 + i);
}
/* leave read id mode */
flash_write_cmd(base_addr, CFI_CMD_RESET);
return 0;
}
/*-----------------------------------------------------------------------
*/
int flash_real_protect(flash_info_t * info, long sector, int prot)
{
int retcode = 0;
flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
if (prot)
flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
else
flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
if ((retcode =
flash_full_status_check(info, sector, info->erase_blk_tout,
prot ? "protect" : "unprotect")) == 0) {
info->protect[sector] = prot;
/* Intel's unprotect unprotects all locking */
if (prot == 0) {
int i;
for (i = 0; i < info->sector_count; i++) {
if (info->protect[i])
flash_real_protect(info, i, 1);
}
}
}
return retcode;
}
static int amd_flash_write_cfibuffer (struct flash_info *info, ulong dest, const uchar * cp,
int len)
{
flash_sect_t sector;
int cnt;
int retcode;
volatile cfiptr_t src;
volatile cfiptr_t dst;
cfiword_t cword;
src.cp = (uchar *)cp;
dst.cp = (uchar *) dest;
sector = find_sector (info, dest);
flash_unlock_seq(info);
flash_make_cmd (info, AMD_CMD_WRITE_TO_BUFFER, &cword);
flash_write_word(info, cword, (void *)dest);
if (bankwidth_is_1(info)) {
cnt = len;
flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) *dst.cp++ = *src.cp++;
} else if (bankwidth_is_2(info)) {
cnt = len >> 1;
flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) *dst.wp++ = *src.wp++;
} else if (bankwidth_is_4(info)) {
static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp,
int len)
{
int sector;
int cnt;
int retcode;
volatile cfiptr_t src;
volatile cfiptr_t dst;
src.cp = cp;
dst.cp = (uchar *) dest;
sector = find_sector(info, dest);
flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
if ((retcode = flash_status_check(info, sector, info->buffer_write_tout,
"write to buffer")) == ERR_OK) {
switch (info->portwidth) {
case FLASH_CFI_8BIT:
cnt = len;
break;
case FLASH_CFI_16BIT:
cnt = len >> 1;
break;
case FLASH_CFI_32BIT:
cnt = len >> 2;
break;
default:
return ERR_INVAL;
break;
}
flash_write_cmd(info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) {
switch (info->portwidth) {
case FLASH_CFI_8BIT:
*dst.cp++ = *src.cp++;
break;
case FLASH_CFI_16BIT:
*dst.wp++ = *src.wp++;
break;
case FLASH_CFI_32BIT:
*dst.lp++ = *src.lp++;
break;
default:
return ERR_INVAL;
break;
}
}
flash_write_cmd(info, sector, 0,
FLASH_CMD_WRITE_BUFFER_CONFIRM);
retcode =
flash_full_status_check(info, sector,
info->buffer_write_tout,
"buffer write");
}
flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
return retcode;
}
static int amd_flash_erase_one(struct flash_info *info, long sect)
{
flash_unlock_seq(info);
flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_ERASE_START);
flash_unlock_seq(info);
flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
return flash_status_check(info, sect, info->erase_blk_tout, "erase");
}
/* Internal: retrieve manufacturer and device id from id space */
__ramtext
static int get_id(void *base_addr,
uint16_t * manufacturer_id, uint16_t * device_id)
{
flash_write_cmd(base_addr, CFI_CMD_READ_ID);
*manufacturer_id = flash_read16(base_addr, CFI_OFFSET_MANUFACTURER_ID);
*device_id = flash_read16(base_addr, CFI_OFFSET_DEVICE_ID);
flash_write_cmd(base_addr, CFI_CMD_RESET);
return 0;
}
/*-----------------------------------------------------------------------
*/
static int flash_write_cfiword(flash_info_t * info, ulong dest, cfiword_t cword)
{
cfiptr_t ctladdr;
cfiptr_t cptr;
int flag;
ctladdr.cp = flash_make_addr(info, 0, 0);
cptr.cp = (uchar *) dest;
/* Check if Flash is (sufficiently) erased */
switch (info->portwidth) {
case FLASH_CFI_8BIT:
flag = ((cptr.cp[0] & cword.c) == cword.c);
break;
case FLASH_CFI_16BIT:
flag = ((cptr.wp[0] & cword.w) == cword.w);
break;
case FLASH_CFI_32BIT:
flag = ((cptr.lp[0] & cword.l) == cword.l);
break;
default:
return 2;
}
if (!flag)
return 2;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
switch (info->portwidth) {
case FLASH_CFI_8BIT:
cptr.cp[0] = cword.c;
break;
case FLASH_CFI_16BIT:
cptr.wp[0] = cword.w;
break;
case FLASH_CFI_32BIT:
cptr.lp[0] = cword.l;
break;
}
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
return flash_full_status_check(info, 0, info->write_tout, "write");
}
__ramtext
int flash_block_erase(flash_t * flash, uint32_t block_offset)
{
const void *base_addr = flash->f_base;
if (block_offset >= flash->f_size) {
return -EINVAL;
}
if (flash_protected(block_offset)) {
return -EPERM;
}
printf("Erasing block 0x%08lx...", block_offset);
void *block_addr = ((uint8_t *) base_addr) + block_offset;
flash_write_cmd(base_addr, CFI_CMD_CLEAR_STATUS);
flash_write_cmd(block_addr, CFI_CMD_BLOCK_ERASE);
flash_write_cmd(block_addr, CFI_CMD_ERASE_CONFIRM);
flash_write_cmd(base_addr, CFI_CMD_READ_STATUS);
uint16_t status;
do {
status = flash_read16(base_addr, 0);
} while (!(status & CFI_STATUS_READY));
int res = 0;
if (status & CFI_STATUS_ERASE_ERROR) {
puts("error: ");
if (status & CFI_STATUS_VPP_LOW) {
puts("vpp insufficient\n");
res = -EFAULT;
} else if (status & CFI_STATUS_LOCKED_ERROR) {
puts("block is lock-protected\n");
res = -EPERM;
} else {
puts("unknown fault\n");
res = -EFAULT;
}
} else {
puts("done\n");
}
flash_write_cmd(base_addr, CFI_CMD_RESET);
return res;
}
/*-----------------------------------------------------------------------
* Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
* This routine sets the flash to read-array mode.
*/
static int flash_full_status_check(flash_info_t * info, ulong sector,
ulong tout, char *prompt)
{
int retcode;
retcode = flash_status_check(info, sector, tout, prompt);
if ((retcode == ERR_OK)
&& !flash_isequal(info, sector, 0, FLASH_STATUS_DONE)) {
retcode = ERR_INVAL;
printf("Flash %s error at address %lx\n", prompt,
info->start[sector]);
if (flash_isset
(info, sector, 0,
FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
printf("Command Sequence Error.\n");
} else if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)) {
printf("Block Erase Error.\n");
retcode = ERR_NOT_ERASED;
} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
printf("Locking Error\n");
}
if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
printf("Block locked.\n");
retcode = ERR_PROTECTED;
}
if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
printf("Vpp Low Error.\n");
}
flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
return retcode;
}
__ramtext
int flash_block_lockdown(flash_t * flash, uint32_t block_offset)
{
const void *base_addr = flash->f_base;
if (block_offset >= flash->f_size) {
return -EINVAL;
}
printf("Locking down block at 0x%08lx\n", block_offset);
flash_write_cmd(base_addr, CFI_CMD_PROTECT);
flash_write_cmd(base_addr + block_offset, CFI_PROT_LOCKDOWN);
flash_write_cmd(base_addr, CFI_CMD_RESET);
return 0;
}
/*-----------------------------------------------------------------------
*/
int flash_erase(flash_info_t * info, int s_first, int s_last)
{
int rcode = 0;
int prot;
int sect;
if (info->flash_id != FLASH_MAN_CFI) {
printf("Can't erase unknown flash type - aborted\n");
return 1;
}
if ((s_first < 0) || (s_first > s_last)) {
printf("- no sectors to erase\n");
return 1;
}
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf("- Warning: %d protected sectors will not be erased!\n",
prot);
} else {
printf("\n");
}
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
if (flash_full_status_check
(info, sect, info->erase_blk_tout, "erase")) {
rcode = 1;
} else
printf(".");
}
}
printf(" done\n");
return rcode;
}
/*
* read jedec ids from device and set corresponding fields in info struct
*
* Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
*
*/
static void amd_read_jedec_ids(struct flash_info *info)
{
info->cmd_reset = AMD_CMD_RESET;
info->manufacturer_id = 0;
info->device_id = 0;
info->device_id2 = 0;
/* calculate command offsets as in the Linux driver */
info->addr_unlock1 = 0x555;
info->addr_unlock2 = 0x2AA;
/*
* modify the unlock address if we are in compatibility mode
*/
if ( /* x8/x16 in x8 mode */
((info->chipwidth == FLASH_CFI_BY8) &&
(info->interface == FLASH_CFI_X8X16)) ||
/* x16/x32 in x16 mode */
((info->chipwidth == FLASH_CFI_BY16) &&
(info->interface == FLASH_CFI_X16X32)))
{
info->addr_unlock1 = 0xaaa;
info->addr_unlock2 = 0x555;
}
flash_write_cmd(info, 0, 0, info->cmd_reset);
flash_unlock_seq(info);
flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
udelay(1000); /* some flash are slow to respond */
info->manufacturer_id = jedec_read_mfr(info);
info->device_id = flash_read_uchar(info,
FLASH_OFFSET_DEVICE_ID);
if (info->device_id == 0x7E) {
/* AMD 3-byte (expanded) device ids */
info->device_id2 = flash_read_uchar(info,
FLASH_OFFSET_DEVICE_ID2);
info->device_id2 <<= 8;
info->device_id2 |= flash_read_uchar(info,
FLASH_OFFSET_DEVICE_ID3);
}
flash_write_cmd(info, 0, 0, info->cmd_reset);
}
__ramtext
flash_lock_t flash_block_getlock(flash_t * flash, uint32_t block_offset)
{
const void *base_addr = flash->f_base;
uint8_t lockstate;
flash_write_cmd(base_addr, CFI_CMD_READ_ID);
lockstate =
flash_read16(base_addr,
(block_offset >> 1) + CFI_OFFSET_BLOCK_LOCKSTATE);
flash_write_cmd(base_addr, CFI_CMD_RESET);
if (lockstate & 0x2) {
return FLASH_LOCKED_DOWN;
} else if (lockstate & 0x01) {
return FLASH_LOCKED;
} else {
return FLASH_UNLOCKED;
}
}
/*-----------------------------------------------------------------------
* detect if flash is compatible with the Common Flash Interface (CFI)
* http://www.jedec.org/download/search/jesd68.pdf
*
*/
static int flash_detect_cfi(flash_info_t * info)
{
for (info->portwidth = FLASH_CFI_8BIT;
info->portwidth <= FLASH_CFI_32BIT; info->portwidth <<= 1) {
for (info->chipwidth = FLASH_CFI_BY8;
info->chipwidth <= info->portwidth;
info->chipwidth <<= 1) {
flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
flash_write_cmd(info, 0, FLASH_OFFSET_CFI,
FLASH_CMD_CFI);
if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
&& flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1,
'R')
&& flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2,
'Y'))
return 1;
}
}
return 0;
}
/*
* simple test: dump all contents of built-in cartridge
*/
void flash_test( void )
{
uint8_t i = 0;
long size = 2048L * 264L;
flash_write_cmd( AT_CAR, 0 );
flash_clocks( 32 );
while( --size >= 0 && usb_peek() != 3 )
{
printf( "%02x%c", flash_read_byte(), ++i % 16 ? ' ' : '\n' );
}
cs_high( );
}
__ramtext
int flash_block_unlock(flash_t * flash, uint32_t block_offset)
{
const void *base_addr = flash->f_base;
if (block_offset >= flash->f_size) {
return -EINVAL;
}
if (flash_protected(block_offset)) {
return -EPERM;
}
printf("Unlocking block at 0x%08lx, meaning %p\n",
block_offset, base_addr + block_offset);
flash_write_cmd(base_addr, CFI_CMD_PROTECT);
flash_write_cmd(base_addr + block_offset, CFI_PROT_UNLOCK);
flash_write_cmd(base_addr, CFI_CMD_RESET);
return 0;
}
/* Internal: retrieve cfi query response data */
__ramtext
static int get_query(void *base_addr, struct cfi_query *query)
{
int res = 0;
unsigned int i;
flash_write_cmd(base_addr, CFI_CMD_CFI);
for (i = 0; i < sizeof(struct cfi_query); i++) {
uint16_t byte =
flash_read16(base_addr, CFI_OFFSET_CFI_RESP + i);
*(((volatile unsigned char *)query) + i) = byte;
}
if (query->qry[0] != 'Q' || query->qry[1] != 'R' || query->qry[2] != 'Y') {
res = -ENOENT;
}
flash_write_cmd(base_addr, CFI_CMD_RESET);
return res;
}
/*
* read jedec ids from device and set corresponding fields in info struct
*
* Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
*
*/
static void amd_read_jedec_ids (struct flash_info *info)
{
info->manufacturer_id = 0;
info->device_id = 0;
info->device_id2 = 0;
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
flash_unlock_seq(info);
flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
udelay(1000); /* some flash are slow to respond */
info->manufacturer_id = flash_read_uchar (info,
FLASH_OFFSET_MANUFACTURER_ID);
info->device_id = flash_read_uchar (info,
FLASH_OFFSET_DEVICE_ID);
if (info->device_id == 0x7E) {
/* AMD 3-byte (expanded) device ids */
info->device_id2 = flash_read_uchar (info,
FLASH_OFFSET_DEVICE_ID2);
info->device_id2 <<= 8;
info->device_id2 |= flash_read_uchar (info,
FLASH_OFFSET_DEVICE_ID3);
}
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
}
/*-----------------------------------------------------------------------
* wait for XSR.7 to be set. Time out with an error if it does not.
* This routine does not set the flash to read-array mode.
*/
static int flash_status_check(flash_info_t * info, ulong sector, ulong tout,
char *prompt)
{
ulong start;
/* Wait for command completion */
start = get_timer(0);
while (!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
if (get_timer(start) > info->erase_blk_tout) {
printf("Flash %s timeout at address %lx\n", prompt,
info->start[sector]);
flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
return ERR_TIMOUT;
}
}
return ERR_OK;
}
static int32_t flash_status_check_orig(flash_info_t * info, cfiptr_t cptr, cfiword_t * cword,
uint32_t tout, char *prompt)
{
uint32_t start;
/* Wait for command completion */
start = get_timer(0);
while (flash_is_busy(info, cptr, cword)) {
if ((flash_time_out(info, cptr)) || ((get_timer(start)) > tout * CFG_HZ)) {
if (flash_is_busy(info, cptr, cword)) {
printf("Flash %s timeout at address %x data %x\n",
prompt, (uint32_t) cptr.cp, cword->l);
flash_write_cmd(info, 0, 0, info->cmd_reset);
return ERR_TIMOUT;
}
}
}
return ERR_OK;
}
static int32_t flash_full_status_check(flash_info_t * info, cfiptr_t cptr, cfiword_t * cword,
uint32_t tout, char *prompt)
{
int32_t retcode;
retcode = flash_status_check(info, cptr, cword, tout, prompt);
switch (info->vendor) {
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
if ((retcode != ERR_OK)
&& !flash_isequal(info, cptr, FLASH_STATUS_DONE)) {
retcode = ERR_INVAL;
printf("Flash %s error at address %8x\n", prompt, (uint32_t) cptr.cp);
if (flash_isset(info, cptr, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
printf("Command Sequence Error.\n");
} else if (flash_isset(info, cptr, FLASH_STATUS_ECLBS)) {
printf("Block Erase Error.\n");
retcode = ERR_NOT_ERASED;
} else if (flash_isset(info, cptr, FLASH_STATUS_PSLBS)) {
printf("Locking Error\n");
}
if (flash_isset(info, cptr, FLASH_STATUS_DPS)) {
printf("Block locked.\n");
retcode = ERR_PROTECTED;
}
if (flash_isset(info, cptr, FLASH_STATUS_VPENS))
printf("Vpp Low Error.\n");
}
break;
case CFI_CMDSET_AMD_STANDARD:
case CFI_CMDSET_AMD_EXTENDED:
if (retcode != ERR_OK)
printf("\nError flash status \n");
break;
default:
break;
}
flash_write_cmd(info, 0, 0, info->cmd_reset);
return retcode;
}
static int32_t flash_detect_cfi(flash_info_t * info)
{
cfiptr_t cptr1, cptr2, cptr3;
for (info->portwidth = FLASH_CFI_8BIT;
info->portwidth <= FLASH_CFI_16BIT; info->portwidth <<= 1) {
for (info->chipwidth = FLASH_CFI_BY8;
info->chipwidth <= info->portwidth; info->chipwidth <<= 1) {
cptr1.cp = flash_make_addr(info, 0, FLASH_OFFSET_CFI_RESP);
cptr2.cp = flash_make_addr(info, 0, FLASH_OFFSET_CFI_RESP + 1);
cptr3.cp = flash_make_addr(info, 0, FLASH_OFFSET_CFI_RESP + 2);
flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
if (flash_isequal(info, cptr1, 'Q')
&& flash_isequal(info, cptr2, 'R')
&& flash_isequal(info, cptr3, 'Y')) {
info->interface = flash_read_uint16_t(info, 0, FLASH_OFFSET_INTERFACE);
return 1;
}
}
}
printf("Error: CFI flah not found\n");
return 0;
}
/*
* The M29W128GH needs a specail reset command function,
* details see the doc/README.cfi file
*/
void flash_cmd_reset(flash_info_t *info)
{
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
}
__ramtext
int flash_program(flash_t * flash, uint32_t dst, void *src, uint32_t nbytes)
{
const void *base_addr = flash->f_base;
int res = 0;
uint32_t i;
/* check destination bounds */
if (dst >= flash->f_size) {
return -EINVAL;
}
if (dst + nbytes > flash->f_size) {
return -EINVAL;
}
/* check alignments */
if (((uint32_t) src) % 2) {
return -EINVAL;
}
if (dst % 2) {
return -EINVAL;
}
if (nbytes % 2) {
return -EINVAL;
}
/* check permissions */
if (flash_protected(dst)) {
return -EPERM;
}
/* say something */
printf("Programming %lu bytes to 0x%08lx from 0x%p...", nbytes, dst, src);
/* clear status register */
flash_write_cmd(base_addr, CFI_CMD_CLEAR_STATUS);
/* write the words */
puts("writing...");
for (i = 0; i < nbytes; i += 2) {
uint16_t *src_addr = (uint16_t *) (src + i);
uint16_t *dst_addr = (uint16_t *) (base_addr + dst + i);
uint16_t data = *src_addr;
flash_write_cmd(dst_addr, CFI_CMD_WRITE);
flash_write_cmd(dst_addr, data);
flash_write_cmd(base_addr, CFI_CMD_READ_STATUS);
uint16_t status;
do {
status = flash_read16(base_addr, 0);
} while (!(status & CFI_STATUS_READY));
if (status & CFI_STATUS_PROGRAM_ERROR) {
puts("error: ");
if (status & CFI_STATUS_VPP_LOW) {
puts("vpp insufficient");
res = -EFAULT;
} else if (status & CFI_STATUS_LOCKED_ERROR) {
puts("block is lock-protected");
res = -EPERM;
} else {
puts("unknown fault");
res = -EFAULT;
}
goto err_reset;
}
}
flash_write_cmd(base_addr, CFI_CMD_RESET);
/* verify the result */
puts("verifying...");
for (i = 0; i < nbytes; i += 2) {
uint16_t *src_addr = (uint16_t *) (src + i);
uint16_t *dst_addr = (uint16_t *) (base_addr + dst + i);
if (*src_addr != *dst_addr) {
puts("error: verification failed");
res = -EFAULT;
goto err;
}
}
puts("done\n");
return res;
err_reset:
flash_write_cmd(base_addr, CFI_CMD_RESET);
err:
printf(" at offset 0x%lx\n", i);
return res;
}
static void flash_unlock_seq(struct flash_info *info)
{
flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_UNLOCK_START);
flash_write_cmd (info, 0, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
}
static void amd_flash_prepare_write(struct flash_info *info)
{
flash_unlock_seq(info);
flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
}
static void amd_flash_prepare_write(struct flash_info *info)
{
flash_unlock_seq(info);
flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
}
static void flash_unlock_seq(flash_info_t * info, int32_t sect)
{
flash_write_cmd(info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
flash_write_cmd(info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
}
/*
* The following code cannot be run from FLASH!
*
*/
static ulong flash_get_size(ulong base, int banknum)
{
flash_info_t *info = &flash_info[banknum];
int i, j;
int sect_cnt;
unsigned long sector;
unsigned long tmp;
int size_ratio = 0;
uchar num_erase_regions;
int erase_region_size;
int erase_region_count;
info->start[0] = base;
#if 0
invalidate_dcache_range(base, base + 0x400);
#endif
if (flash_detect_cfi(info)) {
size_ratio = info->portwidth / info->chipwidth;
num_erase_regions =
flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
sect_cnt = 0;
sector = base;
for (i = 0; i < num_erase_regions; i++) {
if (i > NUM_ERASE_REGIONS) {
printf("%d erase regions found, only %d used\n",
num_erase_regions, NUM_ERASE_REGIONS);
break;
}
tmp =
flash_read_long(info, 0,
FLASH_OFFSET_ERASE_REGIONS);
erase_region_size =
(tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
tmp >>= 16;
erase_region_count = (tmp & 0xffff) + 1;
for (j = 0; j < erase_region_count; j++) {
info->start[sect_cnt] = sector;
sector += (erase_region_size * size_ratio);
info->protect[sect_cnt] =
flash_isset(info, sect_cnt,
FLASH_OFFSET_PROTECT,
FLASH_STATUS_PROTECT);
sect_cnt++;
}
}
info->sector_count = sect_cnt;
/* multiply the size by the number of chips */
info->size =
(1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) *
size_ratio;
info->buffer_size =
(1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
info->erase_blk_tout =
(tmp *
(1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
info->buffer_write_tout =
(tmp *
(1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
info->write_tout =
(tmp *
(1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT))) /
1000;
info->flash_id = FLASH_MAN_CFI;
}
flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
#ifdef DEBUG_FLASH
printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
#endif
#ifdef DEBUG_FLASH
printf("found %d erase regions\n", num_erase_regions);
#endif
#ifdef DEBUG_FLASH
printf("size=%08x sectors=%08x \n", info->size, info->sector_count);
#endif
return (info->size);
}