/* 0F 0F /r 1D */ void BX_CPP_AttrRegparmN(1) BX_CPU_C::PF2ID_PqQq(bxInstruction_c *i) { BxPackedMmxRegister result, op; BX_CPU_THIS_PTR prepareMMX(); /* op is a register or memory reference */ if (i->modC0()) { op = BX_READ_MMX_REG(i->rm()); } else { BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); /* pointer, segment address pair */ MMXUQ(op) = read_virtual_qword(i->seg(), RMAddr(i)); } float_status_t status_word; prepare_softfloat_status_word(status_word, float_round_to_zero); MMXSD0(result) = float32_to_int32_round_to_zero(MMXUD0(op), status_word); MMXSD1(result) = float32_to_int32_round_to_zero(MMXUD1(op), status_word); /* now write result back to destination */ BX_WRITE_MMX_REG(i->nnn(), result); }
uint32_t helper_ftrc_FT(CPUSH4State *env, float32 t0) { uint32_t ret; set_float_exception_flags(0, &env->fp_status); ret = float32_to_int32_round_to_zero(t0, &env->fp_status); update_fpscr(env, GETPC()); return ret; }
uint32_t helper_ftrc_FT(uint32_t t0) { CPU_FloatU f; f.l = t0; return float32_to_int32_round_to_zero(f.f, &env->fp_status); }
int __fixsfsi(float32 A) { return float32_to_int32_round_to_zero(A); }
int __aeabi_f2iz(float32 a) { return float32_to_int32_round_to_zero(a); }