/*******************************************************************************
**
** gckGALDEVICE_Construct
**
** Constructor.
**
** INPUT:
**
** OUTPUT:
**
** gckGALDEVICE * Device
** Pointer to a variable receiving the gckGALDEVICE object pointer on
** success.
*/
gceSTATUS
gckGALDEVICE_Construct(
IN gctINT IrqLine,
IN gctUINT32 RegisterMemBase,
IN gctSIZE_T RegisterMemSize,
IN gctINT IrqLine2D,
IN gctUINT32 RegisterMemBase2D,
IN gctSIZE_T RegisterMemSize2D,
IN gctINT IrqLineVG,
IN gctUINT32 RegisterMemBaseVG,
IN gctSIZE_T RegisterMemSizeVG,
IN gctUINT32 ContiguousBase,
IN gctSIZE_T ContiguousSize,
IN gctSIZE_T BankSize,
IN gctINT FastClear,
IN gctINT Compression,
IN gctUINT32 PhysBaseAddr,
IN gctUINT32 PhysSize,
IN gctINT Signal,
OUT gckGALDEVICE *Device
)
{
gctUINT32 internalBaseAddress = 0, internalAlignment = 0;
gctUINT32 externalBaseAddress = 0, externalAlignment = 0;
gctUINT32 horizontalTileSize, verticalTileSize;
struct resource* mem_region;
gctUINT32 physAddr;
gctUINT32 physical;
gckGALDEVICE device;
gceSTATUS status;
gctINT32 i;
gceHARDWARE_TYPE type;
gckDB sharedDB = gcvNULL;
gcmkHEADER_ARG("IrqLine=%d RegisterMemBase=0x%08x RegisterMemSize=%u "
"IrqLine2D=%d RegisterMemBase2D=0x%08x RegisterMemSize2D=%u "
"IrqLineVG=%d RegisterMemBaseVG=0x%08x RegisterMemSizeVG=%u "
"ContiguousBase=0x%08x ContiguousSize=%lu BankSize=%lu "
"FastClear=%d Compression=%d PhysBaseAddr=0x%x PhysSize=%d Signal=%d",
IrqLine, RegisterMemBase, RegisterMemSize,
IrqLine2D, RegisterMemBase2D, RegisterMemSize2D,
IrqLineVG, RegisterMemBaseVG, RegisterMemSizeVG,
ContiguousBase, ContiguousSize, BankSize, FastClear, Compression,
PhysBaseAddr, PhysSize, Signal);
/* Allocate device structure. */
device = kmalloc(sizeof(struct _gckGALDEVICE), GFP_KERNEL | __GFP_NOWARN);
if (!device)
{
gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
}
memset(device, 0, sizeof(struct _gckGALDEVICE));
if (IrqLine != -1)
{
device->requestedRegisterMemBases[gcvCORE_MAJOR] = RegisterMemBase;
device->requestedRegisterMemSizes[gcvCORE_MAJOR] = RegisterMemSize;
}
if (IrqLine2D != -1)
{
device->requestedRegisterMemBases[gcvCORE_2D] = RegisterMemBase2D;
device->requestedRegisterMemSizes[gcvCORE_2D] = RegisterMemSize2D;
}
if (IrqLineVG != -1)
{
device->requestedRegisterMemBases[gcvCORE_VG] = RegisterMemBaseVG;
device->requestedRegisterMemSizes[gcvCORE_VG] = RegisterMemSizeVG;
}
device->requestedContiguousBase = 0;
device->requestedContiguousSize = 0;
for (i = 0; i < gcdCORE_COUNT; i++)
{
physical = device->requestedRegisterMemBases[i];
/* Set up register memory region. */
if (physical != 0)
{
mem_region = request_mem_region(
physical, device->requestedRegisterMemSizes[i], "galcore register region"
);
#if 0
if (mem_region == gcvNULL)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Failed to claim %lu bytes @ 0x%08X\n",
__FUNCTION__, __LINE__,
physical, device->requestedRegisterMemSizes[i]
);
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
#endif
device->registerBases[i] = (gctPOINTER) ioremap_nocache(
physical, device->requestedRegisterMemSizes[i]);
if (device->registerBases[i] == gcvNULL)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Unable to map %ld bytes @ 0x%08X\n",
__FUNCTION__, __LINE__,
physical, device->requestedRegisterMemSizes[i]
);
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
physical += device->requestedRegisterMemSizes[i];
}
else
{
device->registerBases[i] = gcvNULL;
}
}
/* Set the base address */
device->baseAddress = PhysBaseAddr;
/* Construct the gckOS object. */
gcmkONERROR(gckOS_Construct(device, &device->os));
if (IrqLine != -1)
{
/* Construct the gckKERNEL object. */
gcmkONERROR(gckKERNEL_Construct(
device->os, gcvCORE_MAJOR, device,
gcvNULL, &device->kernels[gcvCORE_MAJOR]));
sharedDB = device->kernels[gcvCORE_MAJOR]->db;
/* Initialize core mapping */
for (i = 0; i < 8; i++)
{
device->coreMapping[i] = gcvCORE_MAJOR;
}
/* Setup the ISR manager. */
gcmkONERROR(gckHARDWARE_SetIsrManager(
device->kernels[gcvCORE_MAJOR]->hardware,
(gctISRMANAGERFUNC) gckGALDEVICE_Setup_ISR,
(gctISRMANAGERFUNC) gckGALDEVICE_Release_ISR,
device
));
gcmkONERROR(gckHARDWARE_SetFastClear(
device->kernels[gcvCORE_MAJOR]->hardware, FastClear, Compression
));
#if COMMAND_PROCESSOR_VERSION == 1
/* Start the command queue. */
gcmkONERROR(gckCOMMAND_Start(device->kernels[gcvCORE_MAJOR]->command));
#endif
}
else
{
device->kernels[gcvCORE_MAJOR] = gcvNULL;
}
if (IrqLine2D != -1)
{
gcmkONERROR(gckKERNEL_Construct(
device->os, gcvCORE_2D, device,
sharedDB, &device->kernels[gcvCORE_2D]));
if (sharedDB == gcvNULL) sharedDB = device->kernels[gcvCORE_2D]->db;
/* Verify the hardware type */
gcmkONERROR(gckHARDWARE_GetType(device->kernels[gcvCORE_2D]->hardware, &type));
if (type != gcvHARDWARE_2D)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Unexpected hardware type: %d\n",
__FUNCTION__, __LINE__,
type
);
gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
}
/* Initialize core mapping */
if (device->kernels[gcvCORE_MAJOR] == gcvNULL)
{
for (i = 0; i < 8; i++)
{
device->coreMapping[i] = gcvCORE_2D;
}
}
else
{
device->coreMapping[gcvHARDWARE_2D] = gcvCORE_2D;
}
/* Setup the ISR manager. */
gcmkONERROR(gckHARDWARE_SetIsrManager(
device->kernels[gcvCORE_2D]->hardware,
(gctISRMANAGERFUNC) gckGALDEVICE_Setup_ISR_2D,
(gctISRMANAGERFUNC) gckGALDEVICE_Release_ISR_2D,
device
));
#if COMMAND_PROCESSOR_VERSION == 1
/* Start the command queue. */
gcmkONERROR(gckCOMMAND_Start(device->kernels[gcvCORE_2D]->command));
#endif
}
else
{
device->kernels[gcvCORE_2D] = gcvNULL;
}
if (IrqLineVG != -1)
{
#if gcdENABLE_VG
gcmkONERROR(gckKERNEL_Construct(
device->os, gcvCORE_VG, device,
sharedDB, &device->kernels[gcvCORE_VG]));
/* Initialize core mapping */
if (device->kernels[gcvCORE_MAJOR] == gcvNULL
&& device->kernels[gcvCORE_2D] == gcvNULL
)
{
for (i = 0; i < 8; i++)
{
device->coreMapping[i] = gcvCORE_VG;
}
}
else
{
device->coreMapping[gcvHARDWARE_VG] = gcvCORE_VG;
}
#endif
}
else
{
device->kernels[gcvCORE_VG] = gcvNULL;
}
/* Initialize the ISR. */
device->irqLines[gcvCORE_MAJOR] = IrqLine;
device->irqLines[gcvCORE_2D] = IrqLine2D;
device->irqLines[gcvCORE_VG] = IrqLineVG;
/* Initialize the kernel thread semaphores. */
for (i = 0; i < gcdCORE_COUNT; i++)
{
if (device->irqLines[i] != -1) sema_init(&device->semas[i], 0);
}
device->signal = Signal;
for (i = 0; i < gcdCORE_COUNT; i++)
{
if (device->kernels[i] != gcvNULL) break;
}
if (i == gcdCORE_COUNT) gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
#if gcdENABLE_VG
if (i == gcvCORE_VG)
{
/* Query the ceiling of the system memory. */
gcmkONERROR(gckVGHARDWARE_QuerySystemMemory(
device->kernels[i]->vg->hardware,
&device->systemMemorySize,
&device->systemMemoryBaseAddress
));
/* query the amount of video memory */
gcmkONERROR(gckVGHARDWARE_QueryMemory(
device->kernels[i]->vg->hardware,
&device->internalSize, &internalBaseAddress, &internalAlignment,
&device->externalSize, &externalBaseAddress, &externalAlignment,
&horizontalTileSize, &verticalTileSize
));
}
else
#endif
{
/* Query the ceiling of the system memory. */
gcmkONERROR(gckHARDWARE_QuerySystemMemory(
device->kernels[i]->hardware,
&device->systemMemorySize,
&device->systemMemoryBaseAddress
));
/* query the amount of video memory */
gcmkONERROR(gckHARDWARE_QueryMemory(
device->kernels[i]->hardware,
&device->internalSize, &internalBaseAddress, &internalAlignment,
&device->externalSize, &externalBaseAddress, &externalAlignment,
&horizontalTileSize, &verticalTileSize
));
}
/* Set up the internal memory region. */
if (device->internalSize > 0)
{
status = gckVIDMEM_Construct(
device->os,
internalBaseAddress, device->internalSize, internalAlignment,
0, &device->internalVidMem
);
if (gcmIS_ERROR(status))
{
/* Error, disable internal heap. */
device->internalSize = 0;
}
else
{
/* Map internal memory. */
device->internalLogical
= (gctPOINTER) ioremap_nocache(physical, device->internalSize);
if (device->internalLogical == gcvNULL)
{
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
device->internalPhysical = (gctPHYS_ADDR) physical;
physical += device->internalSize;
}
}
if (device->externalSize > 0)
{
/* create the external memory heap */
status = gckVIDMEM_Construct(
device->os,
externalBaseAddress, device->externalSize, externalAlignment,
0, &device->externalVidMem
);
if (gcmIS_ERROR(status))
{
/* Error, disable internal heap. */
device->externalSize = 0;
}
else
{
/* Map external memory. */
device->externalLogical
= (gctPOINTER) ioremap_nocache(physical, device->externalSize);
if (device->externalLogical == gcvNULL)
{
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
device->externalPhysical = (gctPHYS_ADDR) physical;
physical += device->externalSize;
}
}
/* set up the contiguous memory */
device->contiguousSize = ContiguousSize;
if (ContiguousSize > 0)
{
if (ContiguousBase == 0)
{
while (device->contiguousSize > 0)
{
/* Allocate contiguous memory. */
status = _AllocateMemory(
device,
device->contiguousSize,
&device->contiguousBase,
&device->contiguousPhysical,
&physAddr
);
if (gcmIS_SUCCESS(status))
{
status = gckVIDMEM_Construct(
device->os,
physAddr | device->systemMemoryBaseAddress,
device->contiguousSize,
64,
BankSize,
&device->contiguousVidMem
);
if (gcmIS_SUCCESS(status))
{
break;
}
gcmkONERROR(_FreeMemory(
device,
device->contiguousBase,
device->contiguousPhysical
));
device->contiguousBase = gcvNULL;
device->contiguousPhysical = gcvNULL;
}
if (device->contiguousSize <= (4 << 20))
{
device->contiguousSize = 0;
}
else
{
device->contiguousSize -= (4 << 20);
}
}
}
else
{
/* Create the contiguous memory heap. */
status = gckVIDMEM_Construct(
device->os,
(ContiguousBase - device->baseAddress) | device->systemMemoryBaseAddress,
ContiguousSize,
64, BankSize,
&device->contiguousVidMem
);
if (gcmIS_ERROR(status))
{
/* Error, disable contiguous memory pool. */
device->contiguousVidMem = gcvNULL;
device->contiguousSize = 0;
}
else
{
mem_region = request_mem_region(
ContiguousBase, ContiguousSize, "galcore managed memory"
);
#if 0
if (mem_region == gcvNULL)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Failed to claim %ld bytes @ 0x%08X\n",
__FUNCTION__, __LINE__,
ContiguousSize, ContiguousBase
);
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
#endif
device->requestedContiguousBase = ContiguousBase;
device->requestedContiguousSize = ContiguousSize;
#if !gcdDYNAMIC_MAP_RESERVED_MEMORY && gcdENABLE_VG
if (gcmIS_CORE_PRESENT(device, gcvCORE_VG))
{
device->contiguousBase
#if gcdPAGED_MEMORY_CACHEABLE
= (gctPOINTER) ioremap_cached(ContiguousBase, ContiguousSize);
#else
= (gctPOINTER) ioremap_nocache(ContiguousBase, ContiguousSize);
#endif
if (device->contiguousBase == gcvNULL)
{
device->contiguousVidMem = gcvNULL;
device->contiguousSize = 0;
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
}
#endif
device->contiguousPhysical = (gctPHYS_ADDR) ContiguousBase;
device->contiguousSize = ContiguousSize;
device->contiguousMapped = gcvTRUE;
}
}
}
/*******************************************************************************
**
** gckGALDEVICE_Construct
**
** Constructor.
**
** INPUT:
**
** OUTPUT:
**
** gckGALDEVICE * Device
** Pointer to a variable receiving the gckGALDEVICE object pointer on
** success.
*/
gceSTATUS
gckGALDEVICE_Construct(
IN gctINT IrqLine,
IN gctUINT32 RegisterMemBase,
IN gctSIZE_T RegisterMemSize,
IN gctINT IrqLine2D,
IN gctUINT32 RegisterMemBase2D,
IN gctSIZE_T RegisterMemSize2D,
IN gctINT IrqLineVG,
IN gctUINT32 RegisterMemBaseVG,
IN gctSIZE_T RegisterMemSizeVG,
IN gctUINT32 ContiguousBase,
IN gctSIZE_T ContiguousSize,
IN gctSIZE_T BankSize,
IN gctINT FastClear,
IN gctINT Compression,
IN gctUINT32 PhysBaseAddr,
IN gctUINT32 PhysSize,
IN gctINT Signal,
IN gctUINT LogFileSize,
IN struct device *pdev,
IN gctINT PowerManagement,
OUT gckGALDEVICE *Device
)
{
gctUINT32 internalBaseAddress = 0, internalAlignment = 0;
gctUINT32 externalBaseAddress = 0, externalAlignment = 0;
gctUINT32 horizontalTileSize, verticalTileSize;
struct resource* mem_region;
gctUINT32 physAddr;
gctUINT32 physical;
gckGALDEVICE device;
gceSTATUS status;
gctINT32 i;
gceHARDWARE_TYPE type;
gckDB sharedDB = gcvNULL;
gckKERNEL kernel = gcvNULL;
gcmkHEADER_ARG("IrqLine=%d RegisterMemBase=0x%08x RegisterMemSize=%u "
"IrqLine2D=%d RegisterMemBase2D=0x%08x RegisterMemSize2D=%u "
"IrqLineVG=%d RegisterMemBaseVG=0x%08x RegisterMemSizeVG=%u "
"ContiguousBase=0x%08x ContiguousSize=%lu BankSize=%lu "
"FastClear=%d Compression=%d PhysBaseAddr=0x%x PhysSize=%d Signal=%d",
IrqLine, RegisterMemBase, RegisterMemSize,
IrqLine2D, RegisterMemBase2D, RegisterMemSize2D,
IrqLineVG, RegisterMemBaseVG, RegisterMemSizeVG,
ContiguousBase, ContiguousSize, BankSize, FastClear, Compression,
PhysBaseAddr, PhysSize, Signal);
/* Allocate device structure. */
device = kmalloc(sizeof(struct _gckGALDEVICE), GFP_KERNEL | __GFP_NOWARN);
if (!device)
{
gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
}
memset(device, 0, sizeof(struct _gckGALDEVICE));
device->dbgnode = gcvNULL;
if(LogFileSize != 0)
{
if(gckDebugFileSystemCreateNode(LogFileSize,PARENT_FILE,DEBUG_FILE,&(device->dbgnode)) != 0)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Failed to create the debug file system %s/%s \n",
__FUNCTION__, __LINE__,
PARENT_FILE, DEBUG_FILE
);
}
else
{
/*Everything is OK*/
gckDebugFileSystemSetCurrentNode(device->dbgnode);
}
}
#ifdef CONFIG_PM
/*Init runtime pm for gpu*/
pm_runtime_enable(pdev);
device->pmdev = pdev;
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
/*get gpu regulator*/
device->gpu_regulator = regulator_get(pdev, "cpu_vddgpu");
if (IS_ERR(device->gpu_regulator)) {
gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Failed to get gpu regulator %s/%s \n",
__FUNCTION__, __LINE__,
PARENT_FILE, DEBUG_FILE);
gcmkONERROR(gcvSTATUS_NOT_FOUND);
}
#endif
/*Initialize the clock structure*/
if (IrqLine != -1) {
device->clk_3d_core = clk_get(pdev, "gpu3d_clk");
if (!IS_ERR(device->clk_3d_core)) {
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
if (cpu_is_mx6q()) {
device->clk_3d_shader = clk_get(pdev, "gpu3d_shader_clk");
if (IS_ERR(device->clk_3d_shader)) {
IrqLine = -1;
clk_put(device->clk_3d_core);
device->clk_3d_core = NULL;
device->clk_3d_shader = NULL;
gckOS_Print("galcore: clk_get gpu3d_shader_clk failed, disable 3d!\n");
}
}
#else
device->clk_3d_axi = clk_get(pdev, "gpu3d_axi_clk");
device->clk_3d_shader = clk_get(pdev, "gpu3d_shader_clk");
if (IS_ERR(device->clk_3d_shader)) {
IrqLine = -1;
clk_put(device->clk_3d_core);
device->clk_3d_core = NULL;
device->clk_3d_shader = NULL;
gckOS_Print("galcore: clk_get gpu3d_shader_clk failed, disable 3d!\n");
}
#endif
} else {
IrqLine = -1;
device->clk_3d_core = NULL;
gckOS_Print("galcore: clk_get gpu3d_clk failed, disable 3d!\n");
}
}
if ((IrqLine2D != -1) || (IrqLineVG != -1)) {
device->clk_2d_core = clk_get(pdev, "gpu2d_clk");
if (IS_ERR(device->clk_2d_core)) {
IrqLine2D = -1;
IrqLineVG = -1;
device->clk_2d_core = NULL;
gckOS_Print("galcore: clk_get 2d core clock failed, disable 2d/vg!\n");
} else {
if (IrqLine2D != -1) {
device->clk_2d_axi = clk_get(pdev, "gpu2d_axi_clk");
if (IS_ERR(device->clk_2d_axi)) {
device->clk_2d_axi = NULL;
IrqLine2D = -1;
gckOS_Print("galcore: clk_get 2d axi clock failed, disable 2d\n");
}
}
if (IrqLineVG != -1) {
device->clk_vg_axi = clk_get(pdev, "openvg_axi_clk");
if (IS_ERR(device->clk_vg_axi)) {
IrqLineVG = -1;
device->clk_vg_axi = NULL;
gckOS_Print("galcore: clk_get vg clock failed, disable vg!\n");
}
}
}
}
if (IrqLine != -1)
{
device->requestedRegisterMemBases[gcvCORE_MAJOR] = RegisterMemBase;
device->requestedRegisterMemSizes[gcvCORE_MAJOR] = RegisterMemSize;
}
if (IrqLine2D != -1)
{
device->requestedRegisterMemBases[gcvCORE_2D] = RegisterMemBase2D;
device->requestedRegisterMemSizes[gcvCORE_2D] = RegisterMemSize2D;
}
if (IrqLineVG != -1)
{
device->requestedRegisterMemBases[gcvCORE_VG] = RegisterMemBaseVG;
device->requestedRegisterMemSizes[gcvCORE_VG] = RegisterMemSizeVG;
}
device->requestedContiguousBase = 0;
device->requestedContiguousSize = 0;
for (i = 0; i < gcdMAX_GPU_COUNT; i++)
{
physical = device->requestedRegisterMemBases[i];
/* Set up register memory region. */
if (physical != 0)
{
mem_region = request_mem_region(
physical, device->requestedRegisterMemSizes[i], "galcore register region"
);
if (mem_region == gcvNULL)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Failed to claim %lu bytes @ 0x%08X\n",
__FUNCTION__, __LINE__,
physical, device->requestedRegisterMemSizes[i]
);
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
device->registerBases[i] = (gctPOINTER) ioremap_nocache(
physical, device->requestedRegisterMemSizes[i]);
if (device->registerBases[i] == gcvNULL)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Unable to map %ld bytes @ 0x%08X\n",
__FUNCTION__, __LINE__,
physical, device->requestedRegisterMemSizes[i]
);
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
physical += device->requestedRegisterMemSizes[i];
}
else
{
device->registerBases[i] = gcvNULL;
}
}
/* Set the base address */
device->baseAddress = PhysBaseAddr;
/* Construct the gckOS object. */
gcmkONERROR(gckOS_Construct(device, &device->os));
if (IrqLine != -1)
{
/* Construct the gckKERNEL object. */
gcmkONERROR(gckKERNEL_Construct(
device->os, gcvCORE_MAJOR, device,
gcvNULL, &device->kernels[gcvCORE_MAJOR]));
sharedDB = device->kernels[gcvCORE_MAJOR]->db;
/* Initialize core mapping */
for (i = 0; i < 8; i++)
{
device->coreMapping[i] = gcvCORE_MAJOR;
}
/* Setup the ISR manager. */
gcmkONERROR(gckHARDWARE_SetIsrManager(
device->kernels[gcvCORE_MAJOR]->hardware,
(gctISRMANAGERFUNC) gckGALDEVICE_Setup_ISR,
(gctISRMANAGERFUNC) gckGALDEVICE_Release_ISR,
device
));
gcmkONERROR(gckHARDWARE_SetFastClear(
device->kernels[gcvCORE_MAJOR]->hardware, FastClear, Compression
));
gcmkONERROR(gckHARDWARE_SetPowerManagement(
device->kernels[gcvCORE_MAJOR]->hardware, PowerManagement
));
#if COMMAND_PROCESSOR_VERSION == 1
/* Start the command queue. */
gcmkONERROR(gckCOMMAND_Start(device->kernels[gcvCORE_MAJOR]->command));
#endif
}
else
{
device->kernels[gcvCORE_MAJOR] = gcvNULL;
}
if (IrqLine2D != -1)
{
gcmkONERROR(gckKERNEL_Construct(
device->os, gcvCORE_2D, device,
sharedDB, &device->kernels[gcvCORE_2D]));
if (sharedDB == gcvNULL) sharedDB = device->kernels[gcvCORE_2D]->db;
/* Verify the hardware type */
gcmkONERROR(gckHARDWARE_GetType(device->kernels[gcvCORE_2D]->hardware, &type));
if (type != gcvHARDWARE_2D)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Unexpected hardware type: %d\n",
__FUNCTION__, __LINE__,
type
);
gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
}
/* Initialize core mapping */
if (device->kernels[gcvCORE_MAJOR] == gcvNULL)
{
for (i = 0; i < 8; i++)
{
device->coreMapping[i] = gcvCORE_2D;
}
}
else
{
device->coreMapping[gcvHARDWARE_2D] = gcvCORE_2D;
}
/* Setup the ISR manager. */
gcmkONERROR(gckHARDWARE_SetIsrManager(
device->kernels[gcvCORE_2D]->hardware,
(gctISRMANAGERFUNC) gckGALDEVICE_Setup_ISR_2D,
(gctISRMANAGERFUNC) gckGALDEVICE_Release_ISR_2D,
device
));
gcmkONERROR(gckHARDWARE_SetPowerManagement(
device->kernels[gcvCORE_2D]->hardware, PowerManagement
));
#if COMMAND_PROCESSOR_VERSION == 1
/* Start the command queue. */
gcmkONERROR(gckCOMMAND_Start(device->kernels[gcvCORE_2D]->command));
#endif
}
else
{
device->kernels[gcvCORE_2D] = gcvNULL;
}
if (IrqLineVG != -1)
{
#if gcdENABLE_VG
gcmkONERROR(gckKERNEL_Construct(
device->os, gcvCORE_VG, device,
sharedDB, &device->kernels[gcvCORE_VG]));
/* Initialize core mapping */
if (device->kernels[gcvCORE_MAJOR] == gcvNULL
&& device->kernels[gcvCORE_2D] == gcvNULL
)
{
for (i = 0; i < 8; i++)
{
device->coreMapping[i] = gcvCORE_VG;
}
}
else
{
device->coreMapping[gcvHARDWARE_VG] = gcvCORE_VG;
}
gcmkONERROR(gckVGHARDWARE_SetPowerManagement(
device->kernels[gcvCORE_VG]->vg->hardware,
PowerManagement
));
#endif
}
else
{
device->kernels[gcvCORE_VG] = gcvNULL;
}
/* Initialize the ISR. */
device->irqLines[gcvCORE_MAJOR] = IrqLine;
device->irqLines[gcvCORE_2D] = IrqLine2D;
device->irqLines[gcvCORE_VG] = IrqLineVG;
/* Initialize the kernel thread semaphores. */
for (i = 0; i < gcdMAX_GPU_COUNT; i++)
{
if (device->irqLines[i] != -1) sema_init(&device->semas[i], 0);
}
device->signal = Signal;
for (i = 0; i < gcdMAX_GPU_COUNT; i++)
{
if (device->kernels[i] != gcvNULL) break;
}
if (i == gcdMAX_GPU_COUNT)
{
gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
}
#if gcdENABLE_VG
if (i == gcvCORE_VG)
{
/* Query the ceiling of the system memory. */
gcmkONERROR(gckVGHARDWARE_QuerySystemMemory(
device->kernels[i]->vg->hardware,
&device->systemMemorySize,
&device->systemMemoryBaseAddress
));
/* query the amount of video memory */
gcmkONERROR(gckVGHARDWARE_QueryMemory(
device->kernels[i]->vg->hardware,
&device->internalSize, &internalBaseAddress, &internalAlignment,
&device->externalSize, &externalBaseAddress, &externalAlignment,
&horizontalTileSize, &verticalTileSize
));
}
else
#endif
{
/* Query the ceiling of the system memory. */
gcmkONERROR(gckHARDWARE_QuerySystemMemory(
device->kernels[i]->hardware,
&device->systemMemorySize,
&device->systemMemoryBaseAddress
));
/* query the amount of video memory */
gcmkONERROR(gckHARDWARE_QueryMemory(
device->kernels[i]->hardware,
&device->internalSize, &internalBaseAddress, &internalAlignment,
&device->externalSize, &externalBaseAddress, &externalAlignment,
&horizontalTileSize, &verticalTileSize
));
}
/* Grab the first availiable kernel */
for (i = 0; i < gcdMAX_GPU_COUNT; i++)
{
if (device->irqLines[i] != -1)
{
kernel = device->kernels[i];
break;
}
}
/* Set up the internal memory region. */
if (device->internalSize > 0)
{
status = gckVIDMEM_Construct(
device->os,
internalBaseAddress, device->internalSize, internalAlignment,
0, &device->internalVidMem
);
if (gcmIS_ERROR(status))
{
/* Error, disable internal heap. */
device->internalSize = 0;
}
else
{
/* Map internal memory. */
device->internalLogical
= (gctPOINTER) ioremap_nocache(physical, device->internalSize);
if (device->internalLogical == gcvNULL)
{
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
device->internalPhysical = (gctPHYS_ADDR)(gctUINTPTR_T) physical;
device->internalPhysicalName = gcmPTR_TO_NAME(device->internalPhysical);
physical += device->internalSize;
}
}
if (device->externalSize > 0)
{
/* create the external memory heap */
status = gckVIDMEM_Construct(
device->os,
externalBaseAddress, device->externalSize, externalAlignment,
0, &device->externalVidMem
);
if (gcmIS_ERROR(status))
{
/* Error, disable internal heap. */
device->externalSize = 0;
}
else
{
/* Map external memory. */
device->externalLogical
= (gctPOINTER) ioremap_nocache(physical, device->externalSize);
if (device->externalLogical == gcvNULL)
{
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
device->externalPhysical = (gctPHYS_ADDR)(gctUINTPTR_T) physical;
device->externalPhysicalName = gcmPTR_TO_NAME(device->externalPhysical);
physical += device->externalSize;
}
}
/* set up the contiguous memory */
device->contiguousSize = ContiguousSize;
if (ContiguousSize > 0)
{
if (ContiguousBase == 0)
{
while (device->contiguousSize > 0)
{
/* Allocate contiguous memory. */
status = _AllocateMemory(
device,
device->contiguousSize,
&device->contiguousBase,
&device->contiguousPhysical,
&physAddr
);
if (gcmIS_SUCCESS(status))
{
device->contiguousPhysicalName = gcmPTR_TO_NAME(device->contiguousPhysical);
status = gckVIDMEM_Construct(
device->os,
physAddr | device->systemMemoryBaseAddress,
device->contiguousSize,
64,
BankSize,
&device->contiguousVidMem
);
if (gcmIS_SUCCESS(status))
{
break;
}
gcmkONERROR(_FreeMemory(
device,
device->contiguousBase,
device->contiguousPhysical
));
gcmRELEASE_NAME(device->contiguousPhysicalName);
device->contiguousBase = gcvNULL;
device->contiguousPhysical = gcvNULL;
}
if (device->contiguousSize <= (4 << 20))
{
device->contiguousSize = 0;
}
else
{
device->contiguousSize -= (4 << 20);
}
}
}
else
{
/* Create the contiguous memory heap. */
status = gckVIDMEM_Construct(
device->os,
ContiguousBase | device->systemMemoryBaseAddress,
ContiguousSize,
64, BankSize,
&device->contiguousVidMem
);
if (gcmIS_ERROR(status))
{
/* Error, disable contiguous memory pool. */
device->contiguousVidMem = gcvNULL;
device->contiguousSize = 0;
}
else
{
mem_region = request_mem_region(
ContiguousBase, ContiguousSize, "galcore managed memory"
);
if (mem_region == gcvNULL)
{
gcmkTRACE_ZONE(
gcvLEVEL_ERROR, gcvZONE_DRIVER,
"%s(%d): Failed to claim %ld bytes @ 0x%08X\n",
__FUNCTION__, __LINE__,
ContiguousSize, ContiguousBase
);
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
device->requestedContiguousBase = ContiguousBase;
device->requestedContiguousSize = ContiguousSize;
#if !gcdDYNAMIC_MAP_RESERVED_MEMORY && gcdENABLE_VG
if (gcmIS_CORE_PRESENT(device, gcvCORE_VG))
{
device->contiguousBase
#if gcdPAGED_MEMORY_CACHEABLE
= (gctPOINTER) ioremap_cached(ContiguousBase, ContiguousSize);
#else
= (gctPOINTER) ioremap_nocache(ContiguousBase, ContiguousSize);
#endif
if (device->contiguousBase == gcvNULL)
{
device->contiguousVidMem = gcvNULL;
device->contiguousSize = 0;
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
}
#endif
device->contiguousPhysical = gcvNULL;
device->contiguousPhysicalName = 0;
device->contiguousSize = ContiguousSize;
device->contiguousMapped = gcvTRUE;
}
}
}
gceSTATUS _power_on_gc(gckGALDEVICE device)
{
/* turn on gc */
if(device->kernel->hardware->chipPowerState != gcvPOWER_ON)
{
gceSTATUS status;
// enable clock and irq
{
gckOS_ClockOn(0);
gckOS_ResumeInterrupt(device->os);
}
// INITIALIZE
{
/* Initialize hardware. */
gcmkONERROR(
gckHARDWARE_InitializeHardware(device->kernel->hardware));
gcmkONERROR(
gckHARDWARE_SetFastClear(device->kernel->hardware,
device->kernel->hardware->allowFastClear,
device->kernel->hardware->allowCompression));
/* Force the command queue to reload the next context. */
device->kernel->command->currentContext = 0;
}
/* Sleep for 1ms, to make sure everything is powered on. */
// mdelay(1);//gcmVERIFY_OK(gcoOS_Delay(galDevice->os, 1));
// start
{
#if MUTEX_QUEUE
/* Release the command mutex queue. */
gcmkONERROR(
gckOS_ReleaseMutex(device->kernel->hardware->os,
device->kernel->command->mutexQueue));
#endif
/* Start the command processor. */
gcmkONERROR(
gckCOMMAND_Start(device->kernel->command));
}
// release_context
{
#if MUTEX_CONTEXT
/* Release the context switching mutex. */
gcmkVERIFY_OK(
gckOS_ReleaseMutex(device->kernel->hardware->os,
device->kernel->command->mutexContext));
#endif
}
printk("[%s]\t@%d\tC:0x%p\tQ:0x%p\n", __func__, __LINE__, device->kernel->command->mutexContext, device->kernel->command->mutexQueue);
device->kernel->hardware->chipPowerState = gcvPOWER_ON;
//galDevice->kernel->notifyIdle = gcvTRUE;
}
return gcvSTATUS_TRUE;
OnError:
printk("ERROR: %s has error \n",__func__);
return gcvSTATUS_FALSE;
}