/*
 * initialise the GDB stub I/O routines
 */
void __init gdbstub_io_init(void)
{
	uint16_t scxctr;
	int tmp;

	switch (gdbstub_port->clock_src) {
	case MNSCx_CLOCK_SRC_IOCLK:
		gdbstub_port->ioclk = MN10300_IOCLK;
		break;

#ifdef MN10300_IOBCLK
	case MNSCx_CLOCK_SRC_IOBCLK:
		gdbstub_port->ioclk = MN10300_IOBCLK;
		break;
#endif
	default:
		BUG();
	}

	/* set up the serial port */
	gdbstub_io_set_baud(115200);

	/* we want to get serial receive interrupts */
	set_intr_level(gdbstub_port->rx_irq, GxICR_LEVEL_0);
	set_intr_level(gdbstub_port->tx_irq, GxICR_LEVEL_0);
	set_intr_stub(EXCEP_IRQ_LEVEL0, gdbstub_io_rx_handler);

	*gdbstub_port->rx_icr |= GxICR_ENABLE;
	tmp = *gdbstub_port->rx_icr;

	/* enable the device */
	scxctr = SC01CTR_CLN_8BIT;	/* 1N8 */
	switch (gdbstub_port->div_timer) {
	case MNSCx_DIV_TIMER_16BIT:
		scxctr |= SC0CTR_CK_TM8UFLOW_8; /* == SC1CTR_CK_TM9UFLOW_8
						   == SC2CTR_CK_TM10UFLOW_8 */
		break;

	case MNSCx_DIV_TIMER_8BIT:
		scxctr |= SC0CTR_CK_TM2UFLOW_8;
		break;
	}

	scxctr |= SC01CTR_TXE | SC01CTR_RXE;

	*gdbstub_port->_control = scxctr;
	tmp = *gdbstub_port->_control;

	/* permit level 0 IRQs only */
	asm volatile(
		"	and %0,epsw	\n"
		"	or %1,epsw	\n"
		:
		: "i"(~EPSW_IM), "i"(EPSW_IE|EPSW_IM_1)
		);
}
예제 #2
0
/*
 * initialise the GDB stub I/O routines
 */
void __init gdbstub_io_init(void)
{
	uint16_t scxctr;
	int tmp;

	switch (gdbstub_port->clock_src) {
	case MNSCx_CLOCK_SRC_IOCLK:
		gdbstub_port->ioclk = MN10300_IOCLK;
		break;

#ifdef MN10300_IOBCLK
	case MNSCx_CLOCK_SRC_IOBCLK:
		gdbstub_port->ioclk = MN10300_IOBCLK;
		break;
#endif
	default:
		BUG();
	}

	/* set up the serial port */
	gdbstub_io_set_baud(115200);

	/* we want to get serial receive interrupts */
	set_intr_level(gdbstub_port->rx_irq,
		NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
	set_intr_level(gdbstub_port->tx_irq,
		NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
	set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL),
		gdbstub_io_rx_handler);

	*gdbstub_port->rx_icr |= GxICR_ENABLE;
	tmp = *gdbstub_port->rx_icr;

	/* enable the device */
	scxctr = SC01CTR_CLN_8BIT;	/* 1N8 */
	switch (gdbstub_port->div_timer) {
	case MNSCx_DIV_TIMER_16BIT:
		scxctr |= SC0CTR_CK_TM8UFLOW_8; /* == SC1CTR_CK_TM9UFLOW_8
						   == SC2CTR_CK_TM10UFLOW_8 */
		break;

	case MNSCx_DIV_TIMER_8BIT:
		scxctr |= SC0CTR_CK_TM2UFLOW_8;
		break;
	}

	scxctr |= SC01CTR_TXE | SC01CTR_RXE;

	*gdbstub_port->_control = scxctr;
	tmp = *gdbstub_port->_control;

	/* permit level 0 IRQs only */
	arch_local_change_intr_mask_level(
		NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
}
예제 #3
0
void __init gdbstub_io_init(void)
{
	uint16_t scxctr;
	int tmp;

	switch (gdbstub_port->clock_src) {
	case MNSCx_CLOCK_SRC_IOCLK:
		gdbstub_port->ioclk = MN10300_IOCLK;
		break;

#ifdef MN10300_IOBCLK
	case MNSCx_CLOCK_SRC_IOBCLK:
		gdbstub_port->ioclk = MN10300_IOBCLK;
		break;
#endif
	default:
		BUG();
	}

	
	gdbstub_io_set_baud(115200);

	
	set_intr_level(gdbstub_port->rx_irq,
		NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
	set_intr_level(gdbstub_port->tx_irq,
		NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
	set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL),
		gdbstub_io_rx_handler);

	*gdbstub_port->rx_icr |= GxICR_ENABLE;
	tmp = *gdbstub_port->rx_icr;

	
	scxctr = SC01CTR_CLN_8BIT;	
	switch (gdbstub_port->div_timer) {
	case MNSCx_DIV_TIMER_16BIT:
		scxctr |= SC0CTR_CK_TM8UFLOW_8; 
		break;

	case MNSCx_DIV_TIMER_8BIT:
		scxctr |= SC0CTR_CK_TM2UFLOW_8;
		break;
	}

	scxctr |= SC01CTR_TXE | SC01CTR_RXE;

	*gdbstub_port->_control = scxctr;
	tmp = *gdbstub_port->_control;

	
	arch_local_change_intr_mask_level(
		NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
}