static int dm9161_init (struct uec_mii_info *mii_info) { /* Reset the PHY */ uec_phy_write(mii_info, MII_BMCR, uec_phy_read(mii_info, MII_BMCR) | BMCR_RESET); /* PHY and MAC connect */ uec_phy_write(mii_info, MII_BMCR, uec_phy_read(mii_info, MII_BMCR) & ~BMCR_ISOLATE); uec_phy_write(mii_info, MII_DM9161_SCR, MII_DM9161_SCR_INIT); config_genmii_advert (mii_info); /* Start/restart aneg */ genmii_config_aneg (mii_info); return 0; }
static int dm9161_init (struct uec_mii_info *mii_info) { /* Reset the PHY */ phy_write (mii_info, PHY_BMCR, phy_read (mii_info, PHY_BMCR) | PHY_BMCR_RESET); /* PHY and MAC connect */ phy_write (mii_info, PHY_BMCR, phy_read (mii_info, PHY_BMCR) & ~PHY_BMCR_ISO); #ifdef CONFIG_RMII_MODE phy_write (mii_info, MII_DM9161_SCR, MII_DM9161_SCR_RMII_INIT); #else phy_write (mii_info, MII_DM9161_SCR, MII_DM9161_SCR_INIT); #endif config_genmii_advert (mii_info); /* Start/restart aneg */ genmii_config_aneg (mii_info); /* Delay to wait the aneg compeleted */ udelay (3000000); return 0; }
static int dm9161_init(struct ugeth_mii_info *mii_info) { struct dm9161_private *priv; ugphy_vdbg("%s: IN", __FUNCTION__); /* Allocate the private data structure */ priv = kmalloc(sizeof(struct dm9161_private), GFP_KERNEL); if (NULL == priv) return -ENOMEM; mii_info->priv = priv; /* Reset is not done yet */ priv->resetdone = 0; ucc_geth_phy_write(mii_info, MII_BMCR, ucc_geth_phy_read(mii_info, MII_BMCR) | BMCR_RESET); ucc_geth_phy_write(mii_info, MII_BMCR, ucc_geth_phy_read(mii_info, MII_BMCR) & ~BMCR_ISOLATE); config_genmii_advert(mii_info); /* Start/Restart aneg */ genmii_config_aneg(mii_info); /* Start a timer for DM9161_DELAY seconds to wait * for the PHY to be ready */ init_timer(&priv->timer); priv->timer.function = &dm9161_timer; priv->timer.data = (unsigned long)mii_info; mod_timer(&priv->timer, jiffies + DM9161_DELAY * HZ); return 0; }