static void setup_dplls(void) { const struct dpll_params *params; params = get_dpll_core_params(); do_setup_dpll(&dpll_core_regs, params); params = get_dpll_mpu_params(); do_setup_dpll(&dpll_mpu_regs, params); params = get_dpll_per_params(); do_setup_dpll(&dpll_per_regs, params); writel(0x300, &cmwkup->clkdcoldodpllper); params = get_dpll_ddr_params(); do_setup_dpll(&dpll_ddr_regs, params); }
void sdram_init(void) { const struct dpll_params *dpll = get_dpll_ddr_params(); /* * Here we are assuming PLL clock reveals the type of RAM. * DDR2 = 266 * DDR3 = 400 * Note that DDR3 is the default. */ if (dpll->m == 266) { config_ddr(dpll->m, &ioregs_ddr2, &ddr2_data, &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); } else if (dpll->m == 400) { config_ddr(dpll->m, &ioregs_ddr3, &ddr3_data, &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); } }
static void setup_dplls(void) { const struct dpll_params *params; params = get_dpll_core_params(); do_setup_dpll(&dpll_core_regs, params); params = get_dpll_mpu_params(); do_setup_dpll(&dpll_mpu_regs, params); params = get_dpll_per_params(); do_setup_dpll(&dpll_per_regs, params); writel(0x300, &cmwkup->clkdcoldodpllper); params = get_dpll_ddr_params(); printf(">>> %s vor do_setup_dpll\n", __func__); do_setup_dpll(&dpll_ddr_regs, params); printf(">>> %s nach do_setup_dpll\n", __func__); }