void setup_chromeos_gpios(void)
{
gpio_input(GPIO_WP);
gpio_input_pullup(GPIO_LID);
gpio_input(GPIO_POWER);
gpio_input_pullup(GPIO_RECOVERY);
}
void setup_chromeos_gpios(void)
{
gpio_input(GPIO_WP);
gpio_input(GPIO_POWER);
gpio_input_pullup(GPIO_RECOVERY_SERVO);
gpio_input_pullup(GPIO_RECOVERY_PUSHKEY);
}
/* set pins as inputs so we don't interfere with an external JTAG device */
void cpld_jtag_release(jtag_t* const jtag) {
scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
gpio_input(jtag->gpio->gpio_tdo);
gpio_input(jtag->gpio->gpio_tck);
gpio_input(jtag->gpio->gpio_tms);
gpio_input(jtag->gpio->gpio_tdi);
}
static void red_stack_spi_handle_reset(void) {
int slave;
stack_announce_disconnect(&_red_stack.base);
_red_stack.base.recipients.count = 0;
log_info("Starting reinitialization of SPI slaves");
// Someone pressed reset we have to wait until he stops pressing
while (gpio_input(_red_stack_reset_stack_pin) == 0) {
// Wait 100us and check again. We wait as long as the user presses the button
SLEEP_NS(0, 1000*100);
}
SLEEP_NS(1, 1000*1000*500); // Wait 1.5s so slaves can start properly
// Reinitialize slaves
_red_stack.slave_num = 0;
for (slave = 0; slave < RED_STACK_SPI_MAX_SLAVES; slave++) {
_red_stack.slaves[slave].stack_address = slave;
_red_stack.slaves[slave].status = RED_STACK_SLAVE_STATUS_ABSENT;
_red_stack.slaves[slave].sequence_number_master = 1;
_red_stack.slaves[slave].sequence_number_slave = 0;
_red_stack.slaves[slave].next_packet_empty = false;
// Unfortunately we have to discard all of the queued packets.
// we can't be sure that the packets are for the correct slave after a reset.
while (queue_peek(&_red_stack.slaves[slave].packet_to_spi_queue) != NULL) {
queue_pop(&_red_stack.slaves[slave].packet_to_spi_queue, NULL);
}
}
}
int gpio_base3_value(gpio_t gpio[], int num_gpio)
{
/*
* GPIOs which are tied to stronger external pull up or pull down
* will stay there regardless of the internal pull up or pull
* down setting.
*
* GPIOs which are floating will go to whatever level they're
* internally pulled to.
*/
static const char tristate_char[] = {[0] = '0', [1] = '1', [Z] = 'Z'};
int temp;
int index;
int result = 0;
char value[32];
assert(num_gpio <= 32);
/* Enable internal pull up */
for (index = 0; index < num_gpio; ++index)
gpio_input_pullup(gpio[index]);
/* Wait until signals become stable */
udelay(10);
/* Get gpio values at internal pull up */
for (index = 0; index < num_gpio; ++index)
value[index] = gpio_get(gpio[index]);
/* Enable internal pull down */
for (index = 0; index < num_gpio; ++index)
gpio_input_pulldown(gpio[index]);
/* Wait until signals become stable */
udelay(10);
/*
* Get gpio values at internal pull down.
* Compare with gpio pull up value and then
* determine a gpio final value/state:
* 0: pull down
* 1: pull up
* 2: floating
*/
printk(BIOS_DEBUG, "Reading tristate GPIOs: ");
for (index = num_gpio - 1; index >= 0; --index) {
temp = gpio_get(gpio[index]);
temp |= ((value[index] ^ temp) << 1);
printk(BIOS_DEBUG, "%c ", tristate_char[temp]);
result = (result * 3) + temp;
}
printk(BIOS_DEBUG, "= %d\n", result);
/* Disable pull up / pull down to conserve power */
for (index = 0; index < num_gpio; ++index)
gpio_input(gpio[index]);
return result;
}
void setup_chromeos_gpios(void)
{
gpio_input(GPIO_WP);
gpio_input_pullup(EC_IN_RW);
gpio_input_pullup(EC_IRQ);
gpio_input_pullup(CR50_IRQ);
gpio_output(GPIO_RESET, 0);
}
void setup_chromeos_gpios(void)
{
gpio_input(WRITE_PROTECT);
gpio_input_pullup(EC_IN_RW);
gpio_input_pullup(EC_IRQ);
gpio_input_pullup(LID);
gpio_input_pullup(POWER_BUTTON);
gpio_output(EC_SUSPEND_L, 1);
}
int gpio_base2_value(gpio_t gpio[], int num_gpio)
{
int i;
for (i = 0; i < num_gpio; i++)
gpio_input(gpio[i]);
return _gpio_base2_value(gpio, num_gpio);
}
void setup_chromeos_gpios(void)
{
gpio_input(WRITE_PROTECT);
gpio_input_pullup(EC_IN_RW);
gpio_input_pullup(EC_IRQ);
gpio_input_pullup(LID);
gpio_input_pullup(POWER_BUTTON);
if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 5)
gpio_output(EC_SUSPEND_L, 1);
}
static void configure_sdmmc(void)
{
write32(&rk3288_grf->iomux_sdmmc0, IOMUX_SDMMC0);
/* use sdmmc0 io, disable JTAG function */
write32(&rk3288_grf->soc_con0, RK_CLRBITS(1 << 12));
sdmmc_power_on();
gpio_input(GPIO(7, A, 5)); /* SDMMC_DET_L */
}
//-----------------------------------------------------------------------------
// Generate a 1-Wire reset, return 1 if no presence detect was found,
// return 0 otherwise.
// (NOTE: Does not handle alarm presence from DS2404/DS1994)
//
int OWTouchReset(unsigned char idx)
{
int result;
udelay(A);
drive_DQ_low(idx);
udelay(H); //tRSTL (reset low) 480-640us
release_the_bus(idx);
gpio_input(idx); //14may15 experiment
udelay(I); //tMSP (presence detect sample) 60-75us
result = sample_line(idx);
gpio_input(idx); //14may15 experiment
udelay(J); // Complete the reset sequence recovery 5-??us (no max?)
return result; // Return sample presence pulse result
}
static void configure_sdmmc(void)
{
writel(IOMUX_SDMMC0, &rk3288_grf->iomux_sdmmc0);
/* use sdmmc0 io, disable JTAG function */
writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
gpio_input(GPIO(7, A, 5)); /* SD_DET */
}
void bootblock_mainboard_init(void)
{
set_clock_sources();
clock_enable_clear_reset(CLK_L_CACHE2 | CLK_L_TMR,
CLK_H_I2C5 | CLK_H_APBDMA,
0, CLK_V_MSELECT, 0, 0);
// Board ID GPIOs, bits 0-3.
gpio_input(GPIO(Q3));
gpio_input(GPIO(T1));
gpio_input(GPIO(X1));
gpio_input(GPIO(X4));
// I2C5 (PMU) clock.
pinmux_set_config(PINMUX_PWR_I2C_SCL_INDEX,
PINMUX_PWR_I2C_SCL_FUNC_I2CPMU | PINMUX_INPUT_ENABLE);
// I2C5 (PMU) data.
pinmux_set_config(PINMUX_PWR_I2C_SDA_INDEX,
PINMUX_PWR_I2C_SDA_FUNC_I2CPMU | PINMUX_INPUT_ENABLE);
i2c_init(4);
pmic_init(4);
/* SPI4 data out (MOSI) */
pinmux_set_config(PINMUX_GPIO_PG6_INDEX,
PINMUX_GPIO_PG6_FUNC_SPI4 | PINMUX_INPUT_ENABLE |
PINMUX_PULL_UP);
/* SPI4 data in (MISO) */
pinmux_set_config(PINMUX_GPIO_PG7_INDEX,
PINMUX_GPIO_PG7_FUNC_SPI4 | PINMUX_INPUT_ENABLE |
PINMUX_PULL_UP);
/* SPI4 clock */
pinmux_set_config(PINMUX_GPIO_PG5_INDEX,
PINMUX_GPIO_PG5_FUNC_SPI4 | PINMUX_INPUT_ENABLE);
/* SPI4 chip select 0 */
pinmux_set_config(PINMUX_GPIO_PI3_INDEX,
PINMUX_GPIO_PI3_FUNC_SPI4 | PINMUX_INPUT_ENABLE);
tegra_spi_init(4);
}
static void configure_sdmmc(void)
{
write32(&rk3288_grf->iomux_sdmmc0, IOMUX_SDMMC0);
/* use sdmmc0 io, disable JTAG function */
write32(&rk3288_grf->soc_con0, RK_CLRBITS(1 << 12));
/* Note: these power rail definitions are copied in romstage.c */
rk808_configure_ldo(4, 3300); /* VCCIO_SD */
rk808_configure_ldo(5, 3300); /* VCC33_SD */
gpio_input(GPIO(7, A, 5)); /* SD_DET */
}
void pin_setup(void) {
/* Release CPLD JTAG pins */
scu_pinmux(SCU_PINMUX_TDO, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
scu_pinmux(SCU_PINMUX_TCK, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
gpio_input(&gpio_tdo);
gpio_input(&gpio_tck);
gpio_input(&gpio_tms);
gpio_input(&gpio_tdi);
/* Configure SCU Pin Mux as GPIO */
scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_NOPULL);
scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_NOPULL);
scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_NOPULL);
scu_pinmux(SCU_PINMUX_LED4, SCU_GPIO_NOPULL);
/* Configure all GPIO as Input (safe state) */
gpio_init();
gpio_output(&gpio_led[0]);
gpio_output(&gpio_led[1]);
gpio_output(&gpio_led[2]);
gpio_output(&gpio_led[3]);
/* enable input on SCL and SDA pins */
SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
/* Configure external clock in */
scu_pinmux(CLK0, SCU_CONF_FUNCTION1 | SCU_CLK_OUT);
/* Enable USB1 controller */
SCU_SFSUSB = 0x2;
scu_pinmux(SCU_PINMUX_USB1_EN, SCU_CONF_FUNCTION0);
gpio_output(&gpio_usb1_en);
gpio_set(&gpio_usb1_en);
}
int gpio_base2_value(gpio_t gpio[], int num_gpio)
{
int i, result = 0;
for (i = 0; i < num_gpio; i++)
gpio_input(gpio[i]);
/* Wait until signals become stable */
udelay(10);
for (i = 0; i < num_gpio; i++)
result |= gpio_get(gpio[i]) << i;
return result;
}
void blink(const ff_gpio *gpio)
{
int i;
printf("blink\n");
gpio_input(gpio);
gpio_output(gpio);
printf("Start loop\n");
for (i = 0; i < 10; ++i)
{
gpio_high(gpio);
sleep(1);
gpio_low(gpio);
sleep(1);
}
}
static void configure_vop(void)
{
write32(&rk3288_grf->iomux_lcdc, IOMUX_LCDC);
/* lcdc(vop) iodomain select 1.8V */
write32(&rk3288_grf->io_vsel, RK_SETBITS(1 << 0));
/*
* BL_EN gates VCC_LCD. This might be changed in future revisions
* of the board so that the display can be stablized before we
* turn on the backlight.
*
* To minimize display corruption, turn off LCDC_BL before
* powering on the backlight.
*/
switch (board_id()) {
case 0:
gpio_output(GPIO(7, A, 3), 1);
break;
default:
gpio_output(GPIO(7, A, 2), 1);
break;
}
gpio_output(GPIO_LCDC_BL, 0);
rk808_configure_switch(1, 1); /* VCC33_LCD */
/* EDP_HPD setup */
switch (board_id()) {
case 0:
/* not present */
break;
default:
/* Unlike other Veyrons, Danger has external pull resistors on
* EDP_HPD. Default for GPIO(7, B, 3) is pull-down, set to
* float.
*/
gpio_input(GPIO(7, B, 3));
write32(&rk3288_grf->iomux_edp_hotplug, IOMUX_EDP_HOTPLUG);
break;
}
}
static void configure_sdmmc(void)
{
writel(IOMUX_SDMMC0, &rk3288_grf->iomux_sdmmc0);
/* use sdmmc0 io, disable JTAG function */
writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
switch (board_id()) {
case 0:
rk808_configure_ldo(PMIC_BUS, 8, 3300); /* VCCIO_SD */
gpio_output(GPIO(7, C, 5), 1); /* SD_EN */
break;
default:
rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
break;
}
gpio_input(GPIO(7, A, 5)); /* SD_DET */
}
static void configure_sdmmc(void)
{
write32(&rk3288_grf->iomux_sdmmc0, IOMUX_SDMMC0);
/* use sdmmc0 io, disable JTAG function */
write32(&rk3288_grf->soc_con0, RK_CLRBITS(1 << 12));
/* Note: these power rail definitions are copied in romstage.c */
switch (board_id()) {
case 0:
rk808_configure_ldo(8, 3300); /* VCCIO_SD */
gpio_output(GPIO(7, C, 5), 1); /* SD_EN */
break;
default:
rk808_configure_ldo(4, 3300); /* VCCIO_SD */
rk808_configure_ldo(5, 3300); /* VCC33_SD */
break;
}
gpio_input(GPIO(7, A, 5)); /* SD_DET */
}
int _gpio_base3_value(gpio_t gpio[], int num_gpio, int binary_first)
{
/*
* GPIOs which are tied to stronger external pull up or pull down
* will stay there regardless of the internal pull up or pull
* down setting.
*
* GPIOs which are floating will go to whatever level they're
* internally pulled to.
*/
static const char tristate_char[] = {[0] = '0', [1] = '1', [Z] = 'Z'};
int temp;
int index;
int result = 0;
int has_z = 0;
int binary_below = 0;
char value[32];
assert(num_gpio <= 32);
/* Enable internal pull up */
for (index = 0; index < num_gpio; ++index)
gpio_input_pullup(gpio[index]);
/* Wait until signals become stable */
udelay(10);
/* Get gpio values at internal pull up */
for (index = 0; index < num_gpio; ++index)
value[index] = gpio_get(gpio[index]);
/* Enable internal pull down */
for (index = 0; index < num_gpio; ++index)
gpio_input_pulldown(gpio[index]);
/* Wait until signals become stable */
udelay(10);
/*
* Get gpio values at internal pull down.
* Compare with gpio pull up value and then
* determine a gpio final value/state:
* 0: pull down
* 1: pull up
* 2: floating
*/
printk(BIOS_DEBUG, "Reading tristate GPIOs: ");
for (index = num_gpio - 1; index >= 0; --index) {
temp = gpio_get(gpio[index]);
temp |= ((value[index] ^ temp) << 1);
printk(BIOS_DEBUG, "%c ", tristate_char[temp]);
result = (result * 3) + temp;
/*
* For binary_first we keep track of the normal ternary result
* and whether we found any pin that was a Z. We also determine
* the amount of numbers that can be represented with only
* binary digits (no Z) whose value in the normal ternary system
* is lower than the one we are parsing. Counting from the left,
* we add 2^i for any '1' digit to account for the binary
* numbers whose values would be below it if all following
* digits we parsed would be '0'. As soon as we find a '2' digit
* we can total the remaining binary numbers below as 2^(i+1)
* because we know that all binary representations counting only
* this and following digits must have values below our number
* (since 1xxx is always smaller than 2xxx).
*
* Example: 1 0 2 1 (counting from the left / most significant)
* '1' at 3^3: Add 2^3 = 8 to account for binaries 0000-0111
* '0' at 3^2: Ignore (not all binaries 1000-1100 are below us)
* '2' at 3^1: Add 2^(1+1) = 4 to account for binaries 1000-1011
* Stop adding for lower digits (3^0), all already accounted
* now. We know that there can be no binary numbers 1020-102X.
*/
if (binary_first && !has_z) {
switch(temp) {
case 0: /* Ignore '0' digits. */
break;
case 1: /* Account for binaries 0 to 2^index - 1. */
binary_below += 1 << index;
break;
case 2: /* Account for binaries 0 to 2^(index+1) - 1. */
binary_below += 1 << (index + 1);
has_z = 1;
}
}
}
if (binary_first) {
if (has_z)
result = result + (1 << num_gpio) - binary_below;
else /* binary_below is normal binary system value if !has_z. */
result = binary_below;
}
printk(BIOS_DEBUG, "= %d (%s base3 number system)\n", result,
binary_first ? "binary_first" : "standard");
/* Disable pull up / pull down to conserve power */
for (index = 0; index < num_gpio; ++index)
gpio_input(gpio[index]);
return result;
}
/*
* GPIO
*/
uint16_t gpio_test(uint8_t address)
{
uint8_t i, reg, bit_mask, gpio_mask = 0x1F;
uint16_t result = 0;
operacake_init();
scu_pinmux(SCU_PINMUX_GPIO3_8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_GPIO3_12, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_GPIO3_13, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_GPIO3_14, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_GPIO3_15, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
static struct gpio_t gpio_pins[] = {
GPIO(3, 8), // u1ctrl IO2
GPIO(3, 14), // u3ctrl0 IO3
GPIO(3, 15), // u3ctrl1 IO4
GPIO(3, 12), // u2ctrl0 IO5
GPIO(3, 13) // u2ctrl1 IO6
};
// Setup I2C to put it in GPIO mode
reg = (OPERACAKE_GPIO_ENABLE | OPERACAKE_EN_LEDS);
operacake_write_reg(oc_bus, address, OPERACAKE_REG_OUTPUT, reg);
operacake_write_reg(oc_bus, address, OPERACAKE_REG_CONFIG,
OPERACAKE_CONFIG_GPIO_INPUTS);
operacake_write_reg(oc_bus, address, OPERACAKE_REG_POLARITY,
OPERACAKE_POLARITY_NORMAL);
// clear state
for(i=0; i<5; i++) {
gpio_output(&gpio_pins[i]);
gpio_write(&gpio_pins[i], 0);
}
// Test each pin separately
for(i=0; i<5; i++) {
// Set pin high
gpio_write(&gpio_pins[i], 1);
// check input
reg = operacake_read_reg(oc_bus, address, OPERACAKE_REG_INPUT);
reg >>= 2;
reg &= gpio_mask;
bit_mask = 1 << i;
result <<= 1;
if(!(reg & bit_mask)) {
// Is the correct bit set?
result |= 1;
}
result <<= 1;
if(reg & ~bit_mask) {
// Are any other bits set?
result |= 1;
}
result <<= 1;
// set pin low
gpio_write(&gpio_pins[i], 0);
// check input
reg = operacake_read_reg(oc_bus, address, OPERACAKE_REG_INPUT);
reg >>= 2;
reg &= gpio_mask;
bit_mask = 1 << i;
if(reg & bit_mask) {
// Is the correct bit clear?
result |= 1;
}
}
// clean up
for(i=0; i<5; i++) {
gpio_input(&gpio_pins[i]);
}
// Put it back in to I2C mode and set default pins
operacake_write_reg(oc_bus, address, OPERACAKE_REG_CONFIG,
OPERACAKE_CONFIG_ALL_OUTPUT);
operacake_write_reg(oc_bus, address, OPERACAKE_REG_OUTPUT,
OPERACAKE_DEFAULT_OUTPUT);
return result;
}
void pin_setup(void) {
/* Release CPLD JTAG pins */
scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
gpio_input(&gpio_cpld_tdo);
gpio_input(&gpio_cpld_tck);
gpio_input(&gpio_cpld_tms);
gpio_input(&gpio_cpld_tdi);
/* Configure SCU Pin Mux as GPIO */
scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_NOPULL);
scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_NOPULL);
scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_NOPULL);
#ifdef RAD1O
scu_pinmux(SCU_PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
#endif
scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_NOPULL);
/* Configure USB indicators */
#ifdef JAWBREAKER
scu_pinmux(SCU_PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
scu_pinmux(SCU_PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
#endif
/* Configure all GPIO as Input (safe state) */
gpio_init();
gpio_output(&gpio_led[0]);
gpio_output(&gpio_led[1]);
gpio_output(&gpio_led[2]);
#ifdef RAD1O
gpio_output(&gpio_led[3]);
#endif
gpio_output(&gpio_1v8_enable);
#ifdef HACKRF_ONE
/* Configure RF power supply (VAA) switch control signal as output */
gpio_output(&gpio_vaa_disable);
/* Safe state: start with VAA turned off: */
disable_rf_power();
scu_pinmux(SCU_PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
#endif
#ifdef RAD1O
/* Configure RF power supply (VAA) switch control signal as output */
gpio_output(&gpio_vaa_enable);
/* Safe state: start with VAA turned off: */
disable_rf_power();
scu_pinmux(SCU_PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
#endif
/* enable input on SCL and SDA pins */
SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
spi_bus_start(&spi_bus_ssp1, &ssp_config_max2837);
mixer_bus_setup(&mixer);
rf_path_pin_setup(&rf_path);
/* Configure external clock in */
scu_pinmux(SCU_PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
sgpio_configure_pin_functions(&sgpio_config);
}
