void setup_chromeos_gpios(void)
{
gpio_input(GPIO_WP);
gpio_input(GPIO_POWER);
gpio_input_pullup(GPIO_RECOVERY_SERVO);
gpio_input_pullup(GPIO_RECOVERY_PUSHKEY);
}
void setup_chromeos_gpios(void)
{
gpio_input(GPIO_WP);
gpio_input_pullup(GPIO_LID);
gpio_input(GPIO_POWER);
gpio_input_pullup(GPIO_RECOVERY);
}
void setup_chromeos_gpios(void)
{
gpio_input(GPIO_WP);
gpio_input_pullup(EC_IN_RW);
gpio_input_pullup(EC_IRQ);
gpio_input_pullup(CR50_IRQ);
gpio_output(GPIO_RESET, 0);
}
void setup_chromeos_gpios(void)
{
gpio_input(WRITE_PROTECT);
gpio_input_pullup(EC_IN_RW);
gpio_input_pullup(EC_IRQ);
gpio_input_pullup(LID);
gpio_input_pullup(POWER_BUTTON);
gpio_output(EC_SUSPEND_L, 1);
}
void setup_chromeos_gpios(void)
{
gpio_input(WRITE_PROTECT);
gpio_input_pullup(EC_IN_RW);
gpio_input_pullup(EC_IRQ);
gpio_input_pullup(LID);
gpio_input_pullup(POWER_BUTTON);
if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 5)
gpio_output(EC_SUSPEND_L, 1);
}
int get_write_protect_state(void)
{
/*
* The vboot loader queries this function in romstage. The GPIOs have
* not been set up yet as that configuration is done in ramstage.
* Configuring this GPIO as input so that there isn't any ambiguity
* in the reading.
*/
#if ENV_ROMSTAGE
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) {
write32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG0),
(PAD_PULL_UP_20K | PAD_GPIO_ENABLE | PAD_CONFIG0_GPI_DEFAULT));
write32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG1),
PAD_CONFIG1_DEFAULT0);
} else {
gpio_input_pullup(WP_GPIO);
}
#endif
/* WP is enabled when the pin is reading high. */
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) {
return (read32((void *)(COMMUNITY_GPEAST_BASE + WP_STATUS_PAD_CFG0))
& PAD_VAL_HIGH);
} else {
return !!gpio_get(WP_GPIO);
}
}
int gpio_base3_value(gpio_t gpio[], int num_gpio)
{
/*
* GPIOs which are tied to stronger external pull up or pull down
* will stay there regardless of the internal pull up or pull
* down setting.
*
* GPIOs which are floating will go to whatever level they're
* internally pulled to.
*/
static const char tristate_char[] = {[0] = '0', [1] = '1', [Z] = 'Z'};
int temp;
int index;
int result = 0;
char value[32];
assert(num_gpio <= 32);
/* Enable internal pull up */
for (index = 0; index < num_gpio; ++index)
gpio_input_pullup(gpio[index]);
/* Wait until signals become stable */
udelay(10);
/* Get gpio values at internal pull up */
for (index = 0; index < num_gpio; ++index)
value[index] = gpio_get(gpio[index]);
/* Enable internal pull down */
for (index = 0; index < num_gpio; ++index)
gpio_input_pulldown(gpio[index]);
/* Wait until signals become stable */
udelay(10);
/*
* Get gpio values at internal pull down.
* Compare with gpio pull up value and then
* determine a gpio final value/state:
* 0: pull down
* 1: pull up
* 2: floating
*/
printk(BIOS_DEBUG, "Reading tristate GPIOs: ");
for (index = num_gpio - 1; index >= 0; --index) {
temp = gpio_get(gpio[index]);
temp |= ((value[index] ^ temp) << 1);
printk(BIOS_DEBUG, "%c ", tristate_char[temp]);
result = (result * 3) + temp;
}
printk(BIOS_DEBUG, "= %d\n", result);
/* Disable pull up / pull down to conserve power */
for (index = 0; index < num_gpio; ++index)
gpio_input(gpio[index]);
return result;
}
int gpio_pullup_base2_value(gpio_t gpio[], int num_gpio)
{
int i;
for (i = 0; i < num_gpio; i++)
gpio_input_pullup(gpio[i]);
return _gpio_base2_value(gpio, num_gpio);
}
static void setup_pinmux(void)
{
/* Write protect. */
gpio_input_pullup(GPIO(R1));
/* Recovery mode. */
gpio_input_pullup(GPIO(Q7));
/* Lid switch. */
gpio_input_pullup(GPIO(R4));
/* Power switch. */
gpio_input_pullup(GPIO(Q0));
/* Developer mode. */
gpio_input_pullup(GPIO(Q6));
/* EC in RW. */
gpio_input_pullup(GPIO(U4));
/* route PU4/5 to GMI to remove conflict w/PWM1/2. */
pinmux_set_config(PINMUX_GPIO_PU4_INDEX,
PINMUX_GPIO_PU4_FUNC_NOR); /* s/b GMI */
pinmux_set_config(PINMUX_GPIO_PU5_INDEX,
PINMUX_GPIO_PU5_FUNC_NOR); /* s/b GMI */
/* SOC and TPM reset GPIO, active low. */
gpio_output(GPIO(I5), 1);
/* SPI1 MOSI */
pinmux_set_config(PINMUX_ULPI_CLK_INDEX, PINMUX_ULPI_CLK_FUNC_SPI1 |
PINMUX_PULL_NONE |
PINMUX_INPUT_ENABLE);
/* SPI1 MISO */
pinmux_set_config(PINMUX_ULPI_DIR_INDEX, PINMUX_ULPI_DIR_FUNC_SPI1 |
PINMUX_PULL_NONE |
PINMUX_INPUT_ENABLE);
/* SPI1 SCLK */
pinmux_set_config(PINMUX_ULPI_NXT_INDEX, PINMUX_ULPI_NXT_FUNC_SPI1 |
PINMUX_PULL_NONE |
PINMUX_INPUT_ENABLE);
/* SPI1 CS0 */
pinmux_set_config(PINMUX_ULPI_STP_INDEX, PINMUX_ULPI_STP_FUNC_SPI1 |
PINMUX_PULL_NONE |
PINMUX_INPUT_ENABLE);
/* I2C3 (cam) clock. */
pinmux_set_config(PINMUX_CAM_I2C_SCL_INDEX,
PINMUX_CAM_I2C_SCL_FUNC_I2C3 | PINMUX_INPUT_ENABLE);
/* I2C3 (cam) data. */
pinmux_set_config(PINMUX_CAM_I2C_SDA_INDEX,
PINMUX_CAM_I2C_SDA_FUNC_I2C3 | PINMUX_INPUT_ENABLE);
/* switch unused pin to GPIO */
gpio_set_mode(GPIO(X3), GPIO_MODE_GPIO);
gpio_set_mode(GPIO(X4), GPIO_MODE_GPIO);
gpio_set_mode(GPIO(X5), GPIO_MODE_GPIO);
gpio_set_mode(GPIO(X6), GPIO_MODE_GPIO);
gpio_set_mode(GPIO(X7), GPIO_MODE_GPIO);
gpio_set_mode(GPIO(W3), GPIO_MODE_GPIO);
}
int get_write_protect_state(void)
{
/*
* The vboot loader queries this function in romstage. The GPIOs have
* not been set up yet as that configuration is done in ramstage.
* Configuring this GPIO as input so that there isn't any ambiguity
* in the reading.
*/
#if ENV_ROMSTAGE
gpio_input_pullup(WP_GPIO);
#endif
/* WP is enabled when the pin is reading high. */
return !!gpio_get(WP_GPIO);
}
static void configure_emmc(void)
{
writel(IOMUX_EMMCDATA, &rk3288_grf->iomux_emmcdata);
writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren);
writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd);
switch (board_id()) {
case 0:
case 1:
/*
* Use a pullup instead of a drive since the output is 3.3V and
* really should be 1.8V (oops). The external pulldown will help
* bring the voltage down if we only drive with a pullup here.
*/
gpio_input_pullup(GPIO(7, B, 4)); /* EMMC_RST_L */
break;
default:
gpio_output(GPIO(2, B, 1), 1); /* EMMC_RST_L */
break;
}
}
static void setup_pinmux(void)
{
// I2C1 clock.
pinmux_set_config(PINMUX_GEN1_I2C_SCL_INDEX,
PINMUX_GEN1_I2C_SCL_FUNC_I2C1 | PINMUX_INPUT_ENABLE);
// I2C1 data.
pinmux_set_config(PINMUX_GEN1_I2C_SDA_INDEX,
PINMUX_GEN1_I2C_SDA_FUNC_I2C1 | PINMUX_INPUT_ENABLE);
// I2C2 clock.
pinmux_set_config(PINMUX_GEN2_I2C_SCL_INDEX,
PINMUX_GEN2_I2C_SCL_FUNC_I2C2 | PINMUX_INPUT_ENABLE |
PINMUX_OPEN_DRAIN);
// I2C2 data.
pinmux_set_config(PINMUX_GEN2_I2C_SDA_INDEX,
PINMUX_GEN2_I2C_SDA_FUNC_I2C2 | PINMUX_INPUT_ENABLE |
PINMUX_OPEN_DRAIN);
// I2C4 (DDC) clock.
pinmux_set_config(PINMUX_DDC_SCL_INDEX,
PINMUX_DDC_SCL_FUNC_I2C4 | PINMUX_INPUT_ENABLE);
// I2C4 (DDC) data.
pinmux_set_config(PINMUX_DDC_SDA_INDEX,
PINMUX_DDC_SDA_FUNC_I2C4 | PINMUX_INPUT_ENABLE);
// TODO(hungte) Revice pinmux setup, make nice little SoC functions for
// every single logical thing instead of dumping a wall of code below.
uint32_t pin_up = PINMUX_PULL_UP | PINMUX_INPUT_ENABLE,
pin_down = PINMUX_PULL_DOWN | PINMUX_INPUT_ENABLE,
pin_none = PINMUX_PULL_NONE | PINMUX_INPUT_ENABLE;
// MMC3 (sdcard reader)
pinmux_set_config(PINMUX_SDMMC3_CLK_INDEX,
PINMUX_SDMMC3_CLK_FUNC_SDMMC3 | pin_none);
pinmux_set_config(PINMUX_SDMMC3_CMD_INDEX,
PINMUX_SDMMC3_CMD_FUNC_SDMMC3 | pin_up);
pinmux_set_config(PINMUX_SDMMC3_DAT0_INDEX,
PINMUX_SDMMC3_DAT0_FUNC_SDMMC3 | pin_up);
pinmux_set_config(PINMUX_SDMMC3_DAT1_INDEX,
PINMUX_SDMMC3_DAT1_FUNC_SDMMC3 | pin_up);
pinmux_set_config(PINMUX_SDMMC3_DAT2_INDEX,
PINMUX_SDMMC3_DAT2_FUNC_SDMMC3 | pin_up);
pinmux_set_config(PINMUX_SDMMC3_DAT3_INDEX,
PINMUX_SDMMC3_DAT3_FUNC_SDMMC3 | pin_up);
pinmux_set_config(PINMUX_SDMMC3_CLK_LB_IN_INDEX,
PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up);
pinmux_set_config(PINMUX_SDMMC3_CLK_LB_OUT_INDEX,
PINMUX_SDMMC3_CLK_LB_OUT_FUNC_SDMMC3 | pin_down);
// MMC3 Card Detect pin.
gpio_input_pullup(GPIO(V2));
// Disable SD card reader power so it can be reset even on warm boot.
// Payloads must enable power before accessing SD card slots.
gpio_output(GPIO(R0), 0);
// MMC4 (eMMC)
pinmux_set_config(PINMUX_SDMMC4_CLK_INDEX,
PINMUX_SDMMC4_CLK_FUNC_SDMMC4 | pin_none);
pinmux_set_config(PINMUX_SDMMC4_CMD_INDEX,
PINMUX_SDMMC4_CMD_FUNC_SDMMC4 | pin_up);
pinmux_set_config(PINMUX_SDMMC4_DAT0_INDEX,
PINMUX_SDMMC4_DAT0_FUNC_SDMMC4 | pin_up);
pinmux_set_config(PINMUX_SDMMC4_DAT1_INDEX,
PINMUX_SDMMC4_DAT1_FUNC_SDMMC4 | pin_up);
pinmux_set_config(PINMUX_SDMMC4_DAT2_INDEX,
PINMUX_SDMMC4_DAT2_FUNC_SDMMC4 | pin_up);
pinmux_set_config(PINMUX_SDMMC4_DAT3_INDEX,
PINMUX_SDMMC4_DAT3_FUNC_SDMMC4 | pin_up);
pinmux_set_config(PINMUX_SDMMC4_DAT4_INDEX,
PINMUX_SDMMC4_DAT4_FUNC_SDMMC4 | pin_up);
pinmux_set_config(PINMUX_SDMMC4_DAT5_INDEX,
PINMUX_SDMMC4_DAT5_FUNC_SDMMC4 | pin_up);
pinmux_set_config(PINMUX_SDMMC4_DAT6_INDEX,
PINMUX_SDMMC4_DAT6_FUNC_SDMMC4 | pin_up);
pinmux_set_config(PINMUX_SDMMC4_DAT7_INDEX,
PINMUX_SDMMC4_DAT7_FUNC_SDMMC4 | pin_up);
/* We pull the USB VBUS signals up but keep them as inputs since the
* voltage source likes to drive them low on overcurrent conditions */
gpio_input_pullup(GPIO(N4)); /* USB VBUS EN0 */
gpio_input_pullup(GPIO(N5)); /* USB VBUS EN1 */
/* Clock output 1 (for external peripheral) */
pinmux_set_config(PINMUX_DAP_MCLK1_INDEX,
PINMUX_DAP_MCLK1_FUNC_EXTPERIPH1 | PINMUX_PULL_NONE);
/* I2S1 */
pinmux_set_config(PINMUX_DAP2_DIN_INDEX,
PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
pinmux_set_config(PINMUX_DAP2_DOUT_INDEX,
PINMUX_DAP2_DOUT_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
pinmux_set_config(PINMUX_DAP2_FS_INDEX,
PINMUX_DAP2_FS_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
pinmux_set_config(PINMUX_DAP2_SCLK_INDEX,
PINMUX_DAP2_SCLK_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
/* PWM1 */
pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
/* DP HPD */
pinmux_set_config(PINMUX_DP_HPD_INDEX,
PINMUX_DP_HPD_FUNC_DP | PINMUX_INPUT_ENABLE);
}
void setup_chromeos_gpios(void)
{
gpio_input_pullup(GPIO_WP);
gpio_input_pullup(GPIO_EC_IN_RW);
gpio_input_pullup(GPIO_EC_IRQ);
}
int _gpio_base3_value(gpio_t gpio[], int num_gpio, int binary_first)
{
/*
* GPIOs which are tied to stronger external pull up or pull down
* will stay there regardless of the internal pull up or pull
* down setting.
*
* GPIOs which are floating will go to whatever level they're
* internally pulled to.
*/
static const char tristate_char[] = {[0] = '0', [1] = '1', [Z] = 'Z'};
int temp;
int index;
int result = 0;
int has_z = 0;
int binary_below = 0;
char value[32];
assert(num_gpio <= 32);
/* Enable internal pull up */
for (index = 0; index < num_gpio; ++index)
gpio_input_pullup(gpio[index]);
/* Wait until signals become stable */
udelay(10);
/* Get gpio values at internal pull up */
for (index = 0; index < num_gpio; ++index)
value[index] = gpio_get(gpio[index]);
/* Enable internal pull down */
for (index = 0; index < num_gpio; ++index)
gpio_input_pulldown(gpio[index]);
/* Wait until signals become stable */
udelay(10);
/*
* Get gpio values at internal pull down.
* Compare with gpio pull up value and then
* determine a gpio final value/state:
* 0: pull down
* 1: pull up
* 2: floating
*/
printk(BIOS_DEBUG, "Reading tristate GPIOs: ");
for (index = num_gpio - 1; index >= 0; --index) {
temp = gpio_get(gpio[index]);
temp |= ((value[index] ^ temp) << 1);
printk(BIOS_DEBUG, "%c ", tristate_char[temp]);
result = (result * 3) + temp;
/*
* For binary_first we keep track of the normal ternary result
* and whether we found any pin that was a Z. We also determine
* the amount of numbers that can be represented with only
* binary digits (no Z) whose value in the normal ternary system
* is lower than the one we are parsing. Counting from the left,
* we add 2^i for any '1' digit to account for the binary
* numbers whose values would be below it if all following
* digits we parsed would be '0'. As soon as we find a '2' digit
* we can total the remaining binary numbers below as 2^(i+1)
* because we know that all binary representations counting only
* this and following digits must have values below our number
* (since 1xxx is always smaller than 2xxx).
*
* Example: 1 0 2 1 (counting from the left / most significant)
* '1' at 3^3: Add 2^3 = 8 to account for binaries 0000-0111
* '0' at 3^2: Ignore (not all binaries 1000-1100 are below us)
* '2' at 3^1: Add 2^(1+1) = 4 to account for binaries 1000-1011
* Stop adding for lower digits (3^0), all already accounted
* now. We know that there can be no binary numbers 1020-102X.
*/
if (binary_first && !has_z) {
switch(temp) {
case 0: /* Ignore '0' digits. */
break;
case 1: /* Account for binaries 0 to 2^index - 1. */
binary_below += 1 << index;
break;
case 2: /* Account for binaries 0 to 2^(index+1) - 1. */
binary_below += 1 << (index + 1);
has_z = 1;
}
}
}
if (binary_first) {
if (has_z)
result = result + (1 << num_gpio) - binary_below;
else /* binary_below is normal binary system value if !has_z. */
result = binary_below;
}
printk(BIOS_DEBUG, "= %d (%s base3 number system)\n", result,
binary_first ? "binary_first" : "standard");
/* Disable pull up / pull down to conserve power */
for (index = 0; index < num_gpio; ++index)
gpio_input(gpio[index]);
return result;
}
