/** * @brief Transceiver interrupt handler * * This function handles the transceiver generated interrupts. */ void trx_irq_handler_cb(void) { trx_irq_reason_t trx_irq_cause; trx_irq_cause = (trx_irq_reason_t)pal_trx_reg_read(RG_IRQ_STATUS); if (trx_irq_cause & TRX_IRQ_TRX_END) { /* * TRX_END reason depends on if the trx is currently used for * transmission or reception. */ if ((tal_state == TAL_TX_AUTO) || (tal_state == TAL_TX_BASIC)) { /* Switch to transceiver's default state: switch receiver on. */ set_trx_state(CMD_RX_AACK_ON); handle_tx_end_irq(); // see tal_tx.c } else /* Other tal_state than TAL_TX_... */ { /* Handle rx done interrupt. */ handle_received_frame_irq(); // see tal_rx.c } } }/* trx_irq_handler_cb() */
/* * \brief Transceiver interrupt handler * * This function handles the transceiver generated interrupts. */ void trx_irq_handler_cb(void) { trx_irq_reason_t trx_irq_cause; trx_irq_cause = /* (trx_irq_reason_t)*/ trx_reg_read(RG_IRQ_STATUS); #if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) #if (DISABLE_TSTAMP_IRQ == 1) if (trx_irq_cause & TRX_IRQ_2_RX_START) { /* * Get timestamp. * * In case Antenna diversity is used or the utilization of * the Timestamp IRQ is disabled, the timestamp needs to be read * now * the "old-fashioned" way. * * The timestamping is generally only done for * beaconing networks or if timestamping is explicitly enabled. */ pal_trx_read_timestamp(&tal_timestamp); } #endif /* #if (DISABLE_TSTAMP_IRQ == 1) */ #endif /* #if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) */ if (trx_irq_cause & TRX_IRQ_3_TRX_END) { /* * TRX_END reason depends on if the trx is currently used for * transmission or reception. */ #if ((MAC_START_REQUEST_CONFIRM == 1) && (defined BEACON_SUPPORT)) if ((tal_state == TAL_TX_AUTO) || tal_beacon_transmission) #else if (tal_state == TAL_TX_AUTO) #endif { /* Get the result and push it to the queue. */ if (trx_irq_cause & TRX_IRQ_6_TRX_UR) { handle_tx_end_irq(true); /* see tal_tx.c */ } else { handle_tx_end_irq(false); /* see tal_tx.c */ } } else { /* Other tal_state than TAL_TX_... */ /* Handle rx interrupt. */ handle_received_frame_irq(); /* see tal_rx.c */ } #ifdef ENABLE_RTB #if (RTB_TYPE == RTB_PMU_233R) rtb_update_fec(); #endif /* (RTB_TYPE == RTB_PMU_233R) */ #endif } } /* trx_irq_handler_cb() */
void trx_irq_handler_cb(void) { trx_irq_reason_t trx_irq_cause; trx_irq_cause = (trx_irq_reason_t) pal_trx_reg_read(RG_IRQ_STATUS); if (trx_irq_cause & TRX_IRQ_TRX_END) { /* * TRX_END reason depends on if the trx is currently used for * transmission or reception. */ if (tal_state == TAL_TX_AUTO) { handle_tx_end_irq(); } else { /* Other tal_state than TAL_TX_... */ /* Handle rx interrupt. */ handle_received_frame_irq(); } } }
/* * \brief Transceiver interrupt handler * * This function handles the transceiver generated interrupts. */ void trx_irq_handler_cb(void) { trx_irq_reason_t trx_irq_cause; trx_irq_cause = (trx_irq_reason_t)trx_reg_read(RG_IRQ_STATUS); #if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) #if (ANTENNA_DIVERSITY == 1) || (DISABLE_TSTAMP_IRQ == 1) if (trx_irq_cause & TRX_IRQ_RX_START) { /* * Get timestamp. * * In case Antenna diversity is used or the utilization of * the Timestamp IRQ is disabled, the timestamp needs to be read * now * the "old-fashioned" way. * * The timestamping is generally only done for * beaconing networks or if timestamping is explicitly enabled. */ pal_trx_read_timestamp(&tal_rx_timestamp); } #endif /* #if (ANTENNA_DIVERSITY == 1) || (DISABLE_TSTAMP_IRQ == 1) */ #endif /* #if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) */ if (trx_irq_cause & TRX_IRQ_TRX_END) { /* * TRX_END reason depends on if the trx is currently used for * transmission or reception. */ #if ((MAC_START_REQUEST_CONFIRM == 1) && (defined BEACON_SUPPORT)) if ((tal_state == TAL_TX_AUTO) || tal_beacon_transmission) #else if (tal_state == TAL_TX_AUTO) #endif { /* Get the result and push it to the queue. */ if (trx_irq_cause & TRX_IRQ_TRX_UR) { handle_tx_end_irq(true); /* see tal_tx.c */ } else { handle_tx_end_irq(false); /* see tal_tx.c */ } } else { /* Other tal_state than TAL_TX_... */ /* Handle rx interrupt. */ handle_received_frame_irq(); /* see tal_rx.c */ #if (defined SW_CONTROLLED_CSMA) && (defined RX_WHILE_BACKOFF) if (tal_state == TAL_BACKOFF) { pal_timer_stop(TAL_T_BOFF); tal_state = TAL_CSMA_CONTINUE; } #endif } } #if (ANTENNA_DIVERSITY == 1) else if (trx_irq_cause & TRX_IRQ_RX_START) { /* * The antenna that has been selected automatically for the * current frame * reception is set for the ACK transmission too. */ if (trx_bit_read(SR_ANT_SEL) == ANT_SEL_ANTENNA_0) { trx_bit_write(SR_ANT_CTRL, ANT_CTRL_1); } else { /* antenna 1 is in use */ trx_bit_write(SR_ANT_CTRL, ANT_CTRL_2); } } #endif } /* trx_irq_handler_cb() */
/* * @brief Transceiver interrupt handler * * This function handles the transceiver generated interrupts. */ void trx_irq_handler_cb(void) { trx_irq_reason_t trx_irq_cause; trx_irq_cause = (trx_irq_reason_t)pal_trx_reg_read(RG_IRQ_STATUS); #if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) #if (DISABLE_TSTAMP_IRQ == 1) if (trx_irq_cause & TRX_IRQ_2_RX_START) { /* * Get timestamp. * * In case Antenna diversity is used or the utilization of * the Timestamp IRQ is disabled, the timestamp needs to be read *now * the "old-fashioned" way. * * The timestamping is generally only done for * beaconing networks or if timestamping is explicitly enabled. */ pal_trx_read_timestamp(&tal_rx_timestamp); } #endif /* #if (DISABLE_TSTAMP_IRQ == 1) */ #endif /* #if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) */ if (trx_irq_cause & TRX_IRQ_3_TRX_END) { /* * TRX_END reason depends on if the trx is currently used for * transmission or reception. */ #if ((MAC_START_REQUEST_CONFIRM == 1) && (defined BEACON_SUPPORT)) if ((tal_state == TAL_TX_AUTO) || tal_beacon_transmission) #else if (tal_state == TAL_TX_AUTO) #endif { /* Get the result and push it to the queue. */ if (trx_irq_cause & TRX_IRQ_6_TRX_UR) { handle_tx_end_irq(true); /* see tal_tx.c */ } else { handle_tx_end_irq(false); /* see tal_tx.c */ } } else { /* Other tal_state than TAL_TX_... */ /* Handle rx interrupt. */ handle_received_frame_irq(); /* see tal_rx.c */ #if (defined SW_CONTROLLED_CSMA) && (defined RX_WHILE_BACKOFF) if (tal_state == TAL_BACKOFF) { pal_timer_stop(TAL_T_BOFF); tal_state = TAL_CSMA_CONTINUE; } #endif } } #if (_DEBUG_ > 0) /* Other IRQ than TRX_END */ if (trx_irq_cause != TRX_IRQ_3_TRX_END) { /* PLL_LOCK interrupt migth be set, because poll mode is *enabled. */ /* * if (trx_irq_cause & TRX_IRQ_0_PLL_LOCK) * { * Assert("unexpected IRQ: TRX_IRQ_0_PLL_LOCK" == 0); * } */ if (trx_irq_cause & TRX_IRQ_1_PLL_UNLOCK) { Assert("unexpected IRQ: TRX_IRQ_1_PLL_UNLOCK" == 0); } /* RX_START interrupt migth be set, because poll mode is *enabled. */ /* * if (trx_irq_cause & TRX_IRQ_2_RX_START) * { * Assert("unexpected IRQ: TRX_IRQ_2_RX_START" == 0); * } */ if (trx_irq_cause & TRX_IRQ_4_CCA_ED_DONE) { Assert("unexpected IRQ: TRX_IRQ_4_CCA_ED_DONE" == 0); } /* AMI interrupt might set, because poll mode is enabled. */ /* * if (trx_irq_cause & TRX_IRQ_5_AMI) * { * Assert("unexpected IRQ: TRX_IRQ_5_AMI" == 0); * } */ if (trx_irq_cause & TRX_IRQ_6_TRX_UR) { Assert("unexpected IRQ: TRX_IRQ_6_TRX_UR" == 0); } if (trx_irq_cause & TRX_IRQ_7_BAT_LOW) { Assert("unexpected IRQ: TRX_IRQ_7_BAT_LOW" == 0); } } #endif } /* trx_irq_handler_cb() */
/* * \brief Transceiver interrupt handler * * This function handles the transceiver generated interrupts. */ void trx_irq_handler_cb(void) { trx_irq_reason_t trx_irq_cause; trx_irq_cause = (trx_irq_reason_t)pal_trx_reg_read(RG_IRQ_STATUS); if (trx_irq_cause & TRX_IRQ_TRX_END) { /* * TRX_END reason depends on if the trx is currently used for * transmission or reception. */ #if ((MAC_START_REQUEST_CONFIRM == 1) && (defined BEACON_SUPPORT)) if ((tal_state == TAL_TX_AUTO) || (tal_state == TAL_TX_BASIC) || (tal_state == TAL_TX_BEACON)) #else if ((tal_state == TAL_TX_AUTO) || (tal_state == TAL_TX_BASIC)) #endif { /* Switch to transceiver's default state: switch *receiver on. */ set_trx_state(CMD_RX_AACK_ON); /* Get the result and push it to the queue. */ if (trx_irq_cause & TRX_IRQ_TRX_UR) { handle_tx_end_irq(true); /* see tal_tx.c */ } else { handle_tx_end_irq(false); /* see tal_tx.c */ } } else { /* Other tal_state than TAL_TX_... */ /* Handle rx done interrupt. */ handle_received_frame_irq(); /* see tal_rx.c */ } } #if (_DEBUG_ > 0) /* Other IRQ than TRX_END */ if (trx_irq_cause != TRX_IRQ_TRX_END) { if (trx_irq_cause & TRX_IRQ_PLL_LOCK) { Assert("unexpected IRQ: TRX_IRQ_PLL_LOCK" == 0); } if (trx_irq_cause & TRX_IRQ_PLL_UNLOCK) { Assert("unexpected IRQ: TRX_IRQ_PLL_UNLOCK" == 0); } if (trx_irq_cause & TRX_IRQ_RX_START) { Assert("unexpected IRQ: TRX_IRQ_RX_START" == 0); } if (trx_irq_cause & TRX_IRQ_4) { Assert("unexpected IRQ: TRX_IRQ_4" == 0); } if (trx_irq_cause & TRX_IRQ_5) { Assert("unexpected IRQ: TRX_IRQ_5" == 0); } if (trx_irq_cause & TRX_IRQ_TRX_UR) { Assert("unexpected IRQ: TRX_IRQ_TRX_UR" == 0); } if (trx_irq_cause & TRX_IRQ_BAT_LOW) { Assert("unexpected IRQ: TRX_IRQ_BAT_LOW" == 0); } } #endif } /* trx_irq_handler_cb() */
/** * @brief Transceiver interrupt handler * * This function handles the transceiver generated interrupts. */ void trx_irq_handler_cb(void) { trx_irq_reason_t trx_irq_cause; #if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) #ifdef DISABLE_TSTAMP_IRQ /* * Get timestamp. * * In case Antenna diversity is used or the utilization of * the Timestamp IRQ is disabled, the timestamp needs to be read now * the "old-fashioned" way. * * The timestamping is generally only done for * beaconing networks or if timestamping is explicitly enabled. */ pal_get_current_time(&tal_rx_timestamp); #endif /* DISABLE_TSTAMP_IRQ */ #endif /* #if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) */ trx_irq_cause = (trx_irq_reason_t)pal_trx_reg_read(RG_IRQ_STATUS); if (trx_irq_cause & TRX_IRQ_TRX_END) { /* * TRX_END reason depends on if the trx is currently used for * transmission or reception. */ #if ((MAC_START_REQUEST_CONFIRM == 1) && (defined BEACON_SUPPORT)) if ((tal_state == TAL_TX_AUTO) || tal_beacon_transmission) #else if (tal_state == TAL_TX_AUTO) #endif { /* Get the result and push it to the queue. */ if (trx_irq_cause & TRX_IRQ_TRX_UR) { handle_tx_end_irq(true); // see tal_tx.c } else { handle_tx_end_irq(false); // see tal_tx.c } } else /* Other tal_state than TAL_TX_... */ { /* Handle rx interrupt. */ handle_received_frame_irq(); // see tal_rx.c } } #if (DEBUG > 0) /* Other IRQ than TRX_END */ if (trx_irq_cause != TRX_IRQ_TRX_END) { /* PLL_LOCK interrupt migth be set, because poll mode is enabled. */ /* if (trx_irq_cause & TRX_IRQ_PLL_LOCK) { ASSERT("unexpected IRQ: TRX_IRQ_PLL_LOCK" == 0); } */ if (trx_irq_cause & TRX_IRQ_PLL_UNLOCK) { ASSERT("unexpected IRQ: TRX_IRQ_PLL_UNLOCK" == 0); } /* RX_START interrupt migth be set, because poll mode is enabled. */ /* if (trx_irq_cause & TRX_IRQ_RX_START) { ASSERT("unexpected IRQ: TRX_IRQ_RX_START" == 0); } */ if (trx_irq_cause & TRX_IRQ_CCA_ED_READY) { ASSERT("unexpected IRQ: TRX_IRQ_CCA_ED_READY" == 0); } /* AMI interrupt might set, because poll mode is enabled. */ /* if (trx_irq_cause & TRX_IRQ_AMI) { ASSERT("unexpected IRQ: TRX_IRQ_AMI" == 0); } */ if (trx_irq_cause & TRX_IRQ_TRX_UR) { ASSERT("unexpected IRQ: TRX_IRQ_TRX_UR" == 0); } if (trx_irq_cause & TRX_IRQ_BAT_LOW) { ASSERT("unexpected IRQ: TRX_IRQ_BAT_LOW" == 0); } } #endif }/* trx_irq_handler_cb() */