void createPlatform(Uns32 icmInitAttrs) {
icmPrintf("createPlatform\n"
"Init: icmInitAttrs 0x%x\n", icmInitAttrs);
icmPrintf("Options: wallclock %u nographics %u nolinux %u attach %d\n",
wallClock, noGraphics, programLoad, uartPort);
icmPrintf("Debug: %sabled%s port %d\n",
enableDebug ? "en" : "dis",
autoGDBConsole ? "-autostart" : "",
portNum);
if (selectCore)
icmPrintf(" : Selected core %s\n", coreName );
////////////////////////////////////////////////////////////////////////////////
if(autoGDBConsole) {
icmInitAttrs |= ICM_GDB_CONSOLE;
}
icmInitPlatform(ICM_VERSION, icmInitAttrs, enableDebug ? "rsp" : 0, portNum, "Hetero_ArmIntegratorCP_Xilinx");
if(wallClock) {
icmSetWallClockFactor(3.0); // Allow up to 3x wallclock
}
}
//
// LT protocol
// - forward each call to the target/initiator
//
void initiatorBTransport(int SocketId,
transaction_type& trans,
sc_core::sc_time& t) {
Addr orig = trans.get_address();
Addr offset;
int portId = getPortId(orig, offset);
if(portId >= 0) {
if(m_trace) {
icmPrintf("TLM: %s decode:0x" FMT_64x " -> initiator_socket[%d]\n",
name(), orig, portId);
}
// It is a static port ?
initiator_socket_type *decodeSocket = &initiator_socket[portId];
trans.set_address(offset);
(*decodeSocket)->b_transport(trans, t);
} else {
// might be a dynamic port, so try each un-set port till one responds
int i;
for(i = 0; i < NR_OF_TARGETS; i++) {
if (!decodes[i]) {
initiator_socket_type *decodeSocket = &initiator_socket[i];
(*decodeSocket)->b_transport(trans, t);
if (trans.get_response_status() == tlm::TLM_OK_RESPONSE) {
if(m_trace) {
icmPrintf("TLM: %s dynamic:0x" FMT_64x " -> initiator_socket[%d]\n",
name(), orig, i);
}
break;
}
}
}
}
}
//
// Query modes in the passed processor
//
static void queryModes(icmProcessorP processor) {
const char *name = icmGetProcessorName(processor, "/");
if(!icmGetNextMode(processor, 0)) {
icmPrintf("%s HAS NO MODE INFORMATION\n", name);
} else {
icmPrintf("%s MODES\n", name);
icmModeInfoP info = NULL;
while((info=icmGetNextMode(processor, info))) {
icmPrintf(
" %s (code %u)\n",
icmGetModeInfoName(info),
icmGetModeInfoCode(info)
);
}
if((info=icmGetMode(processor))) {
icmPrintf(
"current: %s (code %u)\n",
icmGetModeInfoName(info),
icmGetModeInfoCode(info)
);
}
}
icmPrintf("\n");
}
unsigned int transportDebug(int SocketId, transaction_type& trans)
{
Addr orig = trans.get_address();
Addr offset;
int portId = getPortId(orig, offset);
if(portId >= 0) {
if(m_trace) {
icmPrintf("TLM: %s dbg decode:0x" FMT_64x " -> initiator_socket[%d]\n",
name(), orig, portId);
}
// It is a static port ?
initiator_socket_type *decodeSocket = &initiator_socket[portId];
trans.set_address(offset);
return (*decodeSocket)->transport_dbg(trans);
} else {
for(int i = 0; i < NR_OF_TARGETS; i++) {
if (!decodes[i]) {
initiator_socket_type *decodeSocket = &initiator_socket[i];
int r = (*decodeSocket)->transport_dbg(trans);
if (r) {
if(m_trace) {
icmPrintf("TLM: %s dbg dynamic:0x" FMT_64x " -> initiator_socket[%d]\n",
name(), orig, i);
}
return r;
}
}
}
return 0;
}
}
//
// Query exceptions in the passed processor
//
static void queryExceptions(icmProcessorP processor) {
const char *name = icmGetProcessorName(processor, "/");
if(!icmGetNextException(processor, 0)) {
icmPrintf("%s HAS NO EXCEPTION INFORMATION\n", name);
} else {
icmPrintf("%s EXCEPTIONS\n", name);
icmExceptionInfoP info = NULL;
while((info=icmGetNextException(processor, info))) {
icmPrintf(
" %s (code %u)\n",
icmGetExceptionInfoName(info),
icmGetExceptionInfoCode(info)
);
}
if((info=icmGetException(processor))) {
icmPrintf(
"current: %s (code %u)\n",
icmGetExceptionInfoName(info),
icmGetExceptionInfoCode(info)
);
}
}
icmPrintf("\n");
}
void adjustRange(int portId, Addr orig, Addr& low, Addr& high)
{
if(DMI_DEBUG) {
icmPrintf("TLM: %s adjustRange port %d input lo:" FMT_64x " hi:" FMT_64x "\n", name(), portId, low, high);
}
icmPortMapping *map = getMapping(portId, orig);
Addr portLo, portHi;
map->getRegion(portLo, portHi);
if(DMI_DEBUG) {
icmPrintf("TLM: %s adjustRange region addr:" FMT_64x " (lo:" FMT_64x " hi:" FMT_64x ")\n", name(), orig, portLo, portHi);
}
// low is always correct
low += portLo;
// if high > decoder, it's the special case of the device not knowing it's size
// or just being larger than the decoder
Addr maxDecode = portHi - portLo;
if(high > maxDecode) {
high = portLo + maxDecode;
} else {
high += portLo;
}
if(DMI_DEBUG) {
icmPrintf("TLM: %s adjustRange changed: lo:" FMT_64x " hi:" FMT_64x "\n\n", name(), low, high);
}
assert(high >= low);
assert(high - low <= maxDecode);
}
int main(int argc, const char *argv[])
{
// Check arguments and ensure application to load specified
if(!cmdParser(argc, argv)) {
icmMessage("E", "platform", "Command Line parser error");
icmExitSimulation(1);
return 1;
}
// the constructor
createPlatform();
icmSimulationStarting();
// Run the processor for 100 instructions
icmSimulate(handles.processor, 100);
// Call a command that had been created in a processor model
// Pointer to the call command result string. This could be any string
const char *result;
icmPrintf("\nCall Model Commands\n\n");
// Setup calling arguments to read COP0 'Config' register
const char *cmd1Argv[] = {"mipsCOP0", "16", "0"};
result = icmCallCommand("platform/cpu1",
NULL,
cmd1Argv[0],
3,
&cmd1Argv[0]);
icmPrintf("\nCall Command result '%s'\n", result);
// Setup calling arguments to read COP0 'PrId' register
const char *cmd2Argv[] = {"mipsCOP0", "15", "0"};
result = icmCallCommand("platform/cpu1",
NULL,
cmd2Argv[0],
3,
&cmd2Argv[0]);
icmPrintf("\nCall Command result '%s'\n", result);
icmPrintf("\nDiscover installed commands\n");
queryCommands();
icmPrintf("\nComplete Simulation\n\n");
// run simulation to completion
icmSimulate(handles.processor, -1);
// terminate simulation
icmTerminate();
icmExitSimulation(0);
return 0;
}
int main(int argc, char *argv[]) {
// check for the application program name argument
if((argc<3)) {
icmPrintf(
"usage: %s <kernelFile> <ramdisk>\n"
"%s\n",
argv[0], arguments
);
return -1;
}
char *kernelFile = argv[1];
char *ramDisk = argv[2];
parseArgs(3, argc, argv);
Uns32 icmAttrsArm = ICM_ATTR_SIMEX; // simulate exceptions
Uns32 icmAttrsXilinx = ICM_ATTR_DEFAULT;
Uns32 icmInitAttrs = ICM_STOP_ON_CTRLC // Ctr-C stops simulation
| ICM_VERBOSE // Print out statistics on simulation finish
| (wallClock ? ICM_WALLCLOCK : 0); // Do not move time forward when blocked
// the constructor
createPlatform(icmInitAttrs);
createPlatformArm(kernelFile, ramDisk, icmAttrsArm);
createPlatformXilinx(icmAttrsXilinx);
if(enableDebug && selectCore) {
icmProcessorP proc = icmFindProcessorByName(coreName);
if(proc) {
// If there's a processor of this name, set this for debug
// This is required for debug using a standard GDB via RSP.
// It's not required for Imperas MPD
icmDebugThisProcessor(proc);
} else {
icmMessage("F", "DEBUG", "Core %s could not be found for debugging", coreName);
}
}
if (stopafter) {
// test mode, run for limited number of instructions
if(!icmSetSimulationStopTime(stopafter)){
icmPrintf("Failed to Set Stop Time %f\n", stopafter);
return -1;
}
}
// run till the end
icmSimulatePlatform();
// finish and clean up
icmTerminate();
return 0;
}
void createPlatform(Uns32 icmInitAttrs) {
icmPrintf("createPlatform\n"
"Init: icmInitAttrs 0x%x\n", icmInitAttrs);
icmPrintf("Options: wallclock %u nographics %u attach %d\n",
wallClock, noGraphics, uartPort);
////////////////////////////////////////////////////////////////////////////////
icmInitPlatform(ICM_VERSION, icmInitAttrs, 0, 0, "Hetero_ArmVersatileExpress_Xilinx");
if(wallClock) {
icmSetWallClockFactor(3.0); // Allow up to 3x wallclock
}
}
int main(int argc, const char *argv[])
{
// Check arguments and ensure application to load specified
if(!cmdParser(argc, argv)) {
icmMessage("E", PLATFORM, "Command Line parser error");
icmExitSimulation(1);
return 1;
}
// the constructor
createPlatform();
icmSimulationStarting();
addPlatformDocumentation();
// Ignore specific message that compatibility mode causes
icmIgnoreMessage("ARM_MORPH_BII");
// simulate the platform
icmProcessorP final = icmSimulatePlatform();
// was simulation interrupted or did it complete
if(final && (icmGetStopReason(final)==ICM_SR_INTERRUPT)) {
icmPrintf("*** simulation interrupted\n");
}
icmTerminate();
icmExitSimulation(0);
return 0;
}
int main(int argc, const char *argv[])
{
// Check arguments and ensure application to load specified
if(!cmdParser(argc, argv)) {
icmMessage("E", "platform", "Command Line parser error");
icmExitSimulation(1);
return 1;
}
icmPrintf("3x cascaded transparent MMC\n");
// the constructor
createPlatform();
icmSimulationStarting();
// run until exit
icmSimulatePlatform();
// free simulation data structures
icmTerminate();
icmExitSimulation(0);
return 0;
}
//
// Simulation main loop
//
static Bool simulate(icmProcessorP processor, Uns64 instructions) {
icmStopReason stopReason = icmSimulate(processor, instructions);
switch(stopReason) {
case ICM_SR_SCHED:
// hit the scheduler limit
return True;
case ICM_SR_EXIT:
// processor has exited
return False;
case ICM_SR_FINISH:
// simulation must end
return False;
case ICM_SR_RD_PRIV:
case ICM_SR_WR_PRIV:
case ICM_SR_RD_ALIGN:
case ICM_SR_WR_ALIGN:
// unhandled processor exception: simulation must end
return False;
default:
icmPrintf("unimplemented stopReason %u\n", stopReason);
return False;
}
}
//
// Query registers and register groups in the passed processor
//
static void queryRegisters(icmProcessorP processor) {
icmPrintf("%s REGISTERS\n", icmGetProcessorName(processor, "/"));
icmRegGroupP group = NULL;
while((group=icmGetNextRegGroup(processor, group))) {
icmPrintf(" GROUP %s\n", icmGetRegGroupName(group));
icmRegInfoP reg = NULL;
while((reg=icmGetNextRegInGroup(processor, group, reg))) {
icmPrintf(" REGISTER %s\n", icmGetRegInfoName(reg));
}
}
}
//
// Set register watchpoints for registers r3, r9 and the stack pointer in the
// passed processor
//
static void applyRegWatchpoints(icmProcessorP processor) {
icmWatchPointP rwp1 = icmSetRegisterWatchPoint(
processor, icmGetRegByName(processor, "r3"), (void *)(id++), 0
);
icmWatchPointP rwp2 = icmSetRegisterWatchPoint(
processor, icmGetRegByName(processor, "r9"), (void *)(id++), 0
);
icmWatchPointP rwp3 = icmSetRegisterWatchPoint(
processor, icmGetRegByUsage(processor, ICM_REG_SP), (void *)(id++), 0
);
icmPrintf("REGISTER watchpoint 1 is %u\n", getWatchpointId(rwp1));
icmPrintf("REGISTER watchpoint 2 is %u\n", getWatchpointId(rwp2));
icmPrintf("REGISTER watchpoint 3 is %u\n", getWatchpointId(rwp3));
}
int main(int argc, char *argv[]) {
// check for the application program name argument
if((argc<1)) {
icmPrintf(
"usage: %s %s\n",
argv[0], arguments
);
return -1;
}
parseArgs(1, argc, argv);
Uns32 icmAttrsArm = ICM_ATTR_SIMEX; // simulate exceptions
Uns32 icmAttrsXilinx = ICM_ATTR_DEFAULT;
Uns32 icmInitAttrs = ICM_STOP_ON_CTRLC // Ctr-C stops simulation
| ICM_VERBOSE // Print out statistics on simulation finish
| (wallClock ? ICM_WALLCLOCK : 0); // Do not move time forward when blocked
// the constructor
createPlatform(icmInitAttrs);
createPlatformArm(icmAttrsArm);
createPlatformXilinx(icmAttrsXilinx);
if (stopafter) {
// test mode, run for limited number of instructions
if(!icmSetSimulationStopTime(stopafter)){
icmPrintf("Failed to Set Stop Time %f\n", stopafter);
return -1;
}
}
// run till the end
icmSimulatePlatform();
// finish and clean up
icmTerminate();
return 0;
}
//
// Apply memory watchpoints
//
static void applyWatchpoints(icmMemoryP memory) {
Uns32 address;
Uns32 i;
for(i=0; (address=watchpoints[i].address); i++) {
// create read watchpoint
icmWatchPointP rwp = icmSetMemoryReadWatchPoint(
memory, address, address+watchpoints[i].size-1, (void *)(id++), 0
);
// create write watchpoint
icmWatchPointP wwp = icmSetMemoryWriteWatchPoint(
memory, address, address+watchpoints[i].size-1, (void *)(id++), 0
);
icmPrintf("READ watchpoint is %u\n", getWatchpointId(rwp));
icmPrintf("WRITE watchpoint is %u\n", getWatchpointId(wwp));
}
}
void setDecode(int portId, Addr lo, Addr hi) {
if (portId >= NR_OF_TARGETS) {
icmPrintf(
"Error configuring TLM decoder %s: portId (%d) cannot be greater than the number of targets (%d)\n",
name(),
portId,
NR_OF_TARGETS
);
return;
abort();
}
if (lo > hi) {
icmPrintf(
"Error configuring TLM decoder %s: lo (0x" FMT_Ax ") cannot be greater than hi (0x" FMT_Ax ")\n",
name(),
lo,
hi
);
return;
}
icmPortMapping *decode = new icmPortMapping(lo, hi);
decode->setNext(decodes[portId]);
decodes[portId] = decode;
}
void createPlatformArm(char *kernelFile, char *ramDisk, Uns32 icmAttrs) {
icmPrintf("createPlatform ARM icmAttrs 0x%x\n"
" Files: kernelFile %s\n"
" ramDisk %s\n"
" Variant ARM %s \n", icmAttrs, kernelFile, ramDisk, variantArm);
////////////////////////////////////////////////////////////////////////////////
// Bus bus1_b
////////////////////////////////////////////////////////////////////////////////
icmBusP bus1_b = icmNewBus( "bus1_b", 32);
////////////////////////////////////////////////////////////////////////////////
// Bus membus_b
////////////////////////////////////////////////////////////////////////////////
icmBusP membus_b = icmNewBus( "membus_b", 32);
////////////////////////////////////////////////////////////////////////////////
// Processor arm1
////////////////////////////////////////////////////////////////////////////////
const char *arm1_path = icmGetVlnvString(
0, // path (0 if from the product directory)
"arm.ovpworld.org", // vendor
0, // library
"arm", // name
0, // version
"model" // model
);
icmAttrListP arm1_attr = icmNewAttrList();
icmAddStringAttr(arm1_attr, "variant", variantArm);
icmAddStringAttr(arm1_attr, "compatibility", "ISA");
icmAddStringAttr(arm1_attr, "showHiddenRegs", "0");
icmAddDoubleAttr(arm1_attr, "mips", 200.000000);
icmAddStringAttr(arm1_attr, "endian", "little");
icmProcessorP arm1_c = icmNewProcessor(
"arm1", // name
"arm", // type
0, // cpuId
0x0, // flags
32, // address bits
arm1_path, // model
"modelAttrs", // symbol
0x20, // procAttrs
arm1_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectProcessorBusses( arm1_c, bus1_b, bus1_b );
////////////////////////////////////////////////////////////////////////////////
// PSE cm
////////////////////////////////////////////////////////////////////////////////
const char *cm_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"CoreModule9x6", // name
0, // version
"pse" // model
);
icmAttrListP cm_attr = icmNewAttrList();
icmPseP cm_p = icmNewPSE(
"cm", // name
cm_path, // model
cm_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectPSEBus( cm_p, bus1_b, "bport1", 0, 0x10000000, 0x10000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE pic1
////////////////////////////////////////////////////////////////////////////////
const char *pic1_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"IntICP", // name
0, // version
"pse" // model
);
icmAttrListP pic1_attr = icmNewAttrList();
icmPseP pic1_p = icmNewPSE(
"pic1", // name
pic1_path, // model
pic1_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectPSEBus( pic1_p, bus1_b, "bport1", 0, 0x14000000, 0x14000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE pic2
////////////////////////////////////////////////////////////////////////////////
const char *pic2_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"IntICP", // name
0, // version
"pse" // model
);
icmAttrListP pic2_attr = icmNewAttrList();
icmPseP pic2_p = icmNewPSE(
"pic2", // name
pic2_path, // model
pic2_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectPSEBus( pic2_p, bus1_b, "bport1", 0, 0xca000000, 0xca000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE pit
////////////////////////////////////////////////////////////////////////////////
const char *pit_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"IcpCounterTimer", // name
0, // version
"pse" // model
);
icmAttrListP pit_attr = icmNewAttrList();
icmPseP pit_p = icmNewPSE(
"pit", // name
pit_path, // model
pit_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectPSEBus( pit_p, bus1_b, "bport1", 0, 0x13000000, 0x13000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE icp
////////////////////////////////////////////////////////////////////////////////
const char *icp_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"IcpControl", // name
0, // version
"pse" // model
);
icmAttrListP icp_attr = icmNewAttrList();
icmPseP icp_p = icmNewPSE(
"icp", // name
icp_path, // model
icp_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectPSEBus( icp_p, bus1_b, "bport1", 0, 0xcb000000, 0xcb00000f);
////////////////////////////////////////////////////////////////////////////////
// PSE ld1
////////////////////////////////////////////////////////////////////////////////
const char *ld1_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"DebugLedAndDipSwitch", // name
0, // version
"pse" // model
);
icmAttrListP ld1_attr = icmNewAttrList();
icmPseP ld1_p = icmNewPSE(
"ld1", // name
ld1_path, // model
ld1_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectPSEBus( ld1_p, bus1_b, "bport1", 0, 0x1a000000, 0x1a000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE kb1
////////////////////////////////////////////////////////////////////////////////
const char *kb1_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"KbPL050", // name
0, // version
"pse" // model
);
icmAttrListP kb1_attr = icmNewAttrList();
icmAddUns64Attr(kb1_attr, "isMouse", 0);
icmAddUns64Attr(kb1_attr, "grabDisable", 0);
icmPseP kb1_p = icmNewPSE(
"kb1", // name
kb1_path, // model
kb1_attr, // attrlist
0, // semihost file
"modelAttrs" // semihost symbol
);
icmConnectPSEBus( kb1_p, bus1_b, "bport1", 0, 0x18000000, 0x18000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE ms1
////////////////////////////////////////////////////////////////////////////////
const char *ms1_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"KbPL050", // name
0, // version
"pse" // model
);
icmAttrListP ms1_attr = icmNewAttrList();
icmAddUns64Attr(ms1_attr, "isMouse", 1);
icmAddUns64Attr(ms1_attr, "grabDisable", 1);
icmPseP ms1_p = icmNewPSE(
"ms1", // name
ms1_path, // model
ms1_attr, // attrlist
0, // semihost file
"modelAttrs" // semihost symbol
);
icmConnectPSEBus( ms1_p, bus1_b, "bport1", 0, 0x19000000, 0x19000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE rtc
////////////////////////////////////////////////////////////////////////////////
const char *rtc_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"RtcPL031", // name
0, // version
"pse" // model
);
icmAttrListP rtc_attr = icmNewAttrList();
icmPseP rtc_p = icmNewPSE(
"rtc", // name
rtc_path, // model
rtc_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectPSEBus( rtc_p, bus1_b, "bport1", 0, 0x15000000, 0x15000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE uart1
////////////////////////////////////////////////////////////////////////////////
const char *uart1_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"UartPL011", // name
0, // version
"pse" // model
);
icmAttrListP uart1_attr = icmNewAttrList();
icmAddStringAttr(uart1_attr, "variant", "ARM");
icmAddStringAttr(uart1_attr, "outfile", "arm-uart1.log");
if(connectARMUartPort) {
if(!uartPort) {
icmAddUns64Attr(uart1_attr, "console", 1);
} else {
icmAddUns64Attr(uart1_attr, "portnum", uartPort);
}
icmAddUns64Attr(uart1_attr, "finishOnDisconnect", 1);
}
icmPseP uart1_p = icmNewPSE(
"uart1", // name
uart1_path, // model
uart1_attr, // attrlist
NULL, // semihost file
NULL // semihost symbol
);
icmConnectPSEBus( uart1_p, bus1_b, "bport1", 0, 0x16000000, 0x16000fff);
if(connectARMUartPort) {
icmSetPSEdiagnosticLevel(uart1_p, 1);
}
////////////////////////////////////////////////////////////////////////////////
// PSE uart2
////////////////////////////////////////////////////////////////////////////////
const char *uart2_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"UartPL011", // name
0, // version
"pse" // model
);
icmAttrListP uart2_attr = icmNewAttrList();
icmAddStringAttr(uart2_attr, "variant", "ARM");
icmAddStringAttr(uart2_attr, "outfile", "arm-uart2.log");
icmPseP uart2_p = icmNewPSE(
"uart2", // name
uart2_path, // model
uart2_attr, // attrlist
NULL, // semihost file
NULL // semihost symbol
);
icmConnectPSEBus( uart2_p, bus1_b, "bport1", 0, 0x17000000, 0x17000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE mmci
////////////////////////////////////////////////////////////////////////////////
const char *mmci_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"MmciPL181", // name
0, // version
"pse" // model
);
icmAttrListP mmci_attr = icmNewAttrList();
icmPseP mmci_p = icmNewPSE(
"mmci", // name
mmci_path, // model
mmci_attr, // attrlist
0, // semihost file
"modelAttrs" // semihost symbol
);
icmConnectPSEBus( mmci_p, bus1_b, "bport1", 0, 0x1c000000, 0x1c000fff);
////////////////////////////////////////////////////////////////////////////////
// PSE lcd
////////////////////////////////////////////////////////////////////////////////
const char *lcd_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"LcdPL110", // name
0, // version
"pse" // model
);
icmAttrListP lcd_attr = icmNewAttrList();
icmAddUns64Attr(lcd_attr, "scanDelay", 50000);
icmAddDoubleAttr(lcd_attr, "noGraphics", noGraphics);
icmAddDoubleAttr(lcd_attr, "busOffset", 0x80000000);
icmPseP lcd_p = icmNewPSE(
"lcd", // name
lcd_path, // model
lcd_attr, // attrlist
0, // semihost file
"modelAttrs" // semihost symbol
);
icmConnectPSEBus( lcd_p, bus1_b, "bport1", 0, 0xc0000000, 0xc0000fff);
icmConnectPSEBusDynamic( lcd_p, membus_b, "memory", 0);
////////////////////////////////////////////////////////////////////////////////
// PSE smartLoader
////////////////////////////////////////////////////////////////////////////////
const char *smartLoader_path = icmGetVlnvString(
0, // path (0 if from the product directory)
"arm.ovpworld.org", // vendor
0, // library
"SmartLoaderArmLinux", // name
0, // version
"pse" // model
);
icmAttrListP smartLoader_attr = icmNewAttrList();
if(programLoad) {
icmAddStringAttr(smartLoader_attr, "disable", "1");
} else {
icmAddStringAttr(smartLoader_attr, "initrd", ramDisk);
icmAddStringAttr(smartLoader_attr, "kernel", kernelFile);
}
icmPseP smartLoader_p = icmNewPSE(
"smartLoader", // name
smartLoader_path, // model
smartLoader_attr, // attrlist
0, // semihost file
0 // semihost symbol
);
icmConnectPSEBus( smartLoader_p, bus1_b, "mport", 1, 0x0, 0xffffffff);
////////////////////////////////////////////////////////////////////////////////
// Memory ram1
////////////////////////////////////////////////////////////////////////////////
icmMemoryP ram1_m = icmNewMemory("ram1_m", 0x7, 0x7ffffff);
icmConnectMemoryToBus( membus_b, "sp1", ram1_m, 0x0);
////////////////////////////////////////////////////////////////////////////////
// Memory ambaDummy
////////////////////////////////////////////////////////////////////////////////
icmMemoryP ambaDummy_m = icmNewMemory("ambaDummy_m", 0x7, 0xfff);
icmConnectMemoryToBus( bus1_b, "sp1", ambaDummy_m, 0x1d000000);
////////////////////////////////////////////////////////////////////////////////
// Bridge ram1Bridge
////////////////////////////////////////////////////////////////////////////////
icmNewBusBridge(bus1_b, membus_b, "ram1Bridge", "sp", "mp", 0x0, 0x7ffffff, 0x0);
////////////////////////////////////////////////////////////////////////////////
// Bridge ram2Bridge
////////////////////////////////////////////////////////////////////////////////
icmNewBusBridge(bus1_b, membus_b, "ram2Bridge", "sp1", "mp", 0x0, 0x7ffffff, 0x80000000);
////////////////////////////////////////////////////////////////////////////////
// CONNECTIONS
////////////////////////////////////////////////////////////////////////////////
icmNetP irq_n = icmNewNet("irq_n" );
icmConnectProcessorNet( arm1_c, irq_n, "irq", ICM_INPUT);
icmConnectPSENet( pic1_p, irq_n, "irq", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP fiq_n = icmNewNet("fiq_n" );
icmConnectProcessorNet( arm1_c, fiq_n, "fiq", ICM_INPUT);
icmConnectPSENet( pic1_p, fiq_n, "fiq", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir1_n = icmNewNet("ir1_n" );
icmConnectPSENet( pic1_p, ir1_n, "ir1", ICM_INPUT);
icmConnectPSENet( uart1_p, ir1_n, "irq", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir2_n = icmNewNet("ir2_n" );
icmConnectPSENet( pic1_p, ir2_n, "ir2", ICM_INPUT);
icmConnectPSENet( uart2_p, ir2_n, "irq", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir3_n = icmNewNet("ir3_n" );
icmConnectPSENet( pic1_p, ir3_n, "ir3", ICM_INPUT);
icmConnectPSENet( kb1_p, ir3_n, "irq", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir4_n = icmNewNet("ir4_n" );
icmConnectPSENet( pic1_p, ir4_n, "ir4", ICM_INPUT);
icmConnectPSENet( ms1_p, ir4_n, "irq", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir5_n = icmNewNet("ir5_n" );
icmConnectPSENet( pic1_p, ir5_n, "ir5", ICM_INPUT);
icmConnectPSENet( pit_p, ir5_n, "irq0", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir6_n = icmNewNet("ir6_n" );
icmConnectPSENet( pic1_p, ir6_n, "ir6", ICM_INPUT);
icmConnectPSENet( pit_p, ir6_n, "irq1", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir7_n = icmNewNet("ir7_n" );
icmConnectPSENet( pic1_p, ir7_n, "ir7", ICM_INPUT);
icmConnectPSENet( pit_p, ir7_n, "irq2", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir8_n = icmNewNet("ir8_n" );
icmConnectPSENet( pic1_p, ir8_n, "ir8", ICM_INPUT);
icmConnectPSENet( rtc_p, ir8_n, "irq", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir23_n = icmNewNet("ir23_n" );
icmConnectPSENet( pic1_p, ir23_n, "ir23", ICM_INPUT);
icmConnectPSENet( mmci_p, ir23_n, "irq0", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
icmNetP ir24_n = icmNewNet("ir24_n" );
icmConnectPSENet( pic1_p, ir24_n, "ir24", ICM_INPUT);
icmConnectPSENet( mmci_p, ir24_n, "irq1", ICM_OUTPUT);
////////////////////////////////////////////////////////////////////////////////
if(programLoad) {
if(icmLoadProcessorMemory(arm1_c, kernelFile, ICM_LOAD_DEFAULT, True, True)) {
// All files loaded correctly
} else {
icmPrintf("Failed to load %s\n", kernelFile);
exit(1);
}
}
}
//
// Virtual platform construction and simulation
//
int main(int argc, const char **argv) {
// Check arguments
if(!cmdParser(argc, argv)) {
icmMessage("E", PLATFORM, "Command Line parser error");
return 1;
}
// initialize OVPsim
unsigned int icmAttrs = ICM_STOP_ON_CTRLC | ICM_GDB_CONSOLE;
icmInitPlatform(ICM_VERSION, icmAttrs, 0, 0, PLATFORM);
const char *modelFile = "model." IMPERAS_SHRSUF;
const char *semihostFile = icmGetVlnvString(NULL, "ovpworld.org", "modelSupport", "imperasExit", "1.0", "model");
// create a processor instance
icmProcessorP processor = icmNewProcessor(
"cpu1", // CPU name
"or1k", // CPU type
0, // CPU cpuId
0, // CPU model flags
32, // address bits
modelFile, // model file
"modelAttrs", // morpher attributes
MODEL_FLAGS, // attributes
0, // user-defined attributes
semihostFile, // semi-hosting file
"modelAttrs" // semi-hosting attributes
);
// create the processor bus
icmBusP bus = icmNewBus("bus", 32);
// connect the processors onto the busses
icmConnectProcessorBusses(processor, bus, bus);
// create memory
icmMemoryP local = icmNewMemory("local", ICM_PRIV_RWX, 0xffffffff);
// connect the memory onto the busses
icmConnectMemoryToBus(bus, "mp1", local, 0x00000000);
icmSimulationStarting();
// query processor registers, execeptions and modes
queryRegisters(processor);
queryExceptions(processor);
queryModes(processor);
// run processor until done (no instruction limit)
while(simulate(processor, -1)) {
// keep going while processor is still running
}
// report the total number of instructions executed
icmPrintf(
"processor has executed " FMT_64u " instructions\n",
icmGetProcessorICount(processor)
);
icmTerminate();
return 0;
}
//
// Virtual platform construction and simulation
//
int main(int argc, const char **argv) {
// Check arguments
if(!cmdParser(argc, argv)) {
icmMessage("E", PLATFORM, "Command Line parser error");
return 1;
}
// initialize OVPsim
unsigned int icmAttrs = ICM_STOP_ON_CTRLC;
icmInitPlatform(ICM_VERSION, icmAttrs, 0, 0, PLATFORM);
const char *modelFile = "model." IMPERAS_SHRSUF;
const char *semihostFile = icmGetVlnvString(NULL, "ovpworld.org", "modelSupport", "imperasExit", "1.0", "model");
// create a processor instance
icmProcessorP procA = icmNewProcessor(
"procA", // CPU name
"or1k", // CPU type
0, // CPU cpuId
0, // CPU model flags
32, // address bits
modelFile, // model file
"modelAttrs", // morpher attributes
MODEL_FLAGS, // attributes
0, // user-defined attributes
semihostFile, // semi-hosting file
"modelAttrs" // semi-hosting attributes
);
// create the processor bus
icmBusP busA = icmNewBus("busA", 32);
// connect the processors onto the busses
icmConnectProcessorBusses(procA, busA, busA);
// create memory
icmMemoryP localA = icmNewMemory("localA", ICM_PRIV_RWX, 0xffffffff);
// connect the memory onto the busses
icmConnectMemoryToBus(busA, "mp1", localA, 0x00000000);
// create a processor instance
icmProcessorP procB = icmNewProcessor(
"procB", // CPU name
"or1k", // CPU type
0, // CPU cpuId
0, // CPU model flags
32, // address bits
modelFile, // model file
"modelAttrs", // morpher attributes
MODEL_FLAGS, // attributes
attrsForB(), // user-defined attributes
semihostFile, // semi-hosting file
"modelAttrs" // semi-hosting attributes
);
// create the processor bus
icmBusP busB = icmNewBus("busB", 32);
// connect the processors onto the busses
icmConnectProcessorBusses(procB, busB, busB);
// create memory
icmMemoryP localB = icmNewMemory("localB", ICM_PRIV_RWX, 0xffffffff);
// connect the memory onto the busses
icmConnectMemoryToBus(busB, "mp1", localB, 0x00000000);
icmNetP n1 = icmNewNet("n1");
icmNetP n2 = icmNewNet("n2");
icmNetP n3 = icmNewNet("n3");
icmConnectProcessorNet(procA, n1, "intr0", ICM_INPUT);
icmConnectProcessorNet(procB, n2, "intr0", ICM_INPUT);
icmConnectProcessorNet(procB, n3, "intr1", ICM_INPUT);
// advance the processors, then interrupt
icmSimulate(procA, 9);
icmSimulate(procB, 9);
icmPrintf("Interrupting A & B\n");
icmWriteNet(n1, 1);
icmWriteNet(n3, 1);
icmSimulate(procA, 1);
icmSimulate(procB, 1);
icmWriteNet(n1, 0);
icmWriteNet(n3, 0);
icmSimulate(procA, 9);
icmSimulate(procB, 9);
icmPrintf("Interrupting B\n");
icmWriteNet(n2, 1);
icmSimulate(procA, 1);
icmSimulate(procB, 1);
icmWriteNet(n2, 0);
icmSimulate(procA, 10);
icmSimulate(procB, 10);
// report the total number of instructions executed
icmPrintf(
"processor A has executed " FMT_64u " instructions\n",
icmGetProcessorICount(procA)
);
icmPrintf(
"processor B has executed " FMT_64u " instructions\n",
icmGetProcessorICount(procB)
);
icmTerminate();
return 0;
}
// Platform entry point
int main(int argc, char **argv) {
// Get the name of the application to run from the command line
if (argc != 2) {
icmPrintf("usage: %s <pa application>\n", argv[0]);
return -1;
}
// Initialize OVPsim, enabling verbose mode to get statistics at end of execution
icmInit(ICM_VERBOSE | ICM_STOP_ON_CTRLC | ICM_ENABLE_IMPERAS_INTERCEPTS, NULL, 0);
/***************************************************************************************************
MURAC Primary Architecture
- ARM processor
***************************************************************************************************/
#ifdef INTECEPT_OBJECT_SUPPORTED
const char *armModel = icmGetVlnvString(NULL, "arm.ovpworld.org", "processor", "arm", "1.0", "model");
#endif
const char *armSemihost = icmGetVlnvString(NULL, "arm.ovpworld.org", "semihosting", "armNewlib", "1.0", "model");
icmAttrListP armUserAttr = icmNewAttrList();
icmAddStringAttr(armUserAttr, "compatibility", "gdb");
icmAddStringAttr(armUserAttr, "variant", "Cortex-A8");
icmAddStringAttr(armUserAttr, "UAL", "1");
// Create the Primary Architecture (PA) processor
icmProcessorP pa = icmNewProcessor(
"pa", // CPU name
"arm", // CPU type
0, // CPU cpuId
0, // CPU model flags
32, // address bits
#ifdef INTECEPT_OBJECT_SUPPORTED
armModel, // model file
#else
MURAC_PA_MODEL_FILE, // model file
#endif
"modelAttrs", // model attributes
SIMULATION_FLAGS, // simulation flags
armUserAttr, // user-defined attributes
armSemihost, // semi-hosting file
"modelAttrs" // semi-hosting attributes
);
#ifdef INTECEPT_OBJECT_SUPPORTED
// Add intercept libarary for MURAC Primary Architecture instructions
icmAddInterceptObject(pa, "murac_pa", MURAC_PA_INSTRUCTIONS_FILE, "modelAttrs", 0);
#endif
/***************************************************************************************************
System Memory
***************************************************************************************************/
// Local memory for the PA
// the ARM processor toolchain sites code in lower memory and stack in higher memory
// so we will use two memories
// NOTE: this is just a consequence of the default linker script used
icmMemoryP codeMemory = icmNewMemory("code_memory", ICM_PRIV_RWX, 0x9fffffff);
icmMemoryP localPA = icmNewMemory("local_pa_memory", ICM_PRIV_RWX, 0x0fffffff);
// Local memory for the AA
icmMemoryP localAA = icmNewMemory("local_aa_memory", ICM_PRIV_RWX, 0x0fffffff);
// Processor state memory (shared)
icmMemoryP prStateMemory = icmNewMemory("pr_state_memory", ICM_PRIV_RWX, 0x100);
/***************************************************************************************************
System Bus connections
***************************************************************************************************/
icmBusP busPA = icmNewBus("pa_bus", 32);
icmBusP busAA = icmNewBus("aa_bus", 32);
// Connect Primary Architecture to the pa bus
icmConnectProcessorBusses(pa, busPA, busPA);
// Connect memories to the busses
icmConnectMemoryToBus(busPA, "pa_code_memory_port", codeMemory, 0x00000000);
icmConnectMemoryToBus(busPA, "pa_local_memory_port", localPA, 0xf0000000);
icmConnectMemoryToBus(busPA, "pa_pr_state_memory_port", prStateMemory, 0xcf000000);
icmConnectMemoryToBus(busAA, "aa_code_memory_port", codeMemory, 0x00000000);
icmConnectMemoryToBus(busAA, "aa_local_memory_port", localAA, 0xf0000000);
icmConnectMemoryToBus(busAA, "aa_pr_state_memory_port", prStateMemory, 0xcf000000);
/***************************************************************************************************
MURAC Peripherals (Auxiliary Architecture)
***************************************************************************************************/
icmAttrListP fpgaAttrs = icmNewAttrList();
if(finishOnSoftReset) {
icmAddUns64Attr(fpgaAttrs, "stoponsoftreset", 1);
}
icmPseP muracFpga = icmNewPSE("muracFpga", MURAC_AA_FPGA_PSE_FILE, fpgaAttrs, 0, 0);
// Connect memory access ports to the bus
icmConnectPSEBus(muracFpga, busAA, "fpga_memread", True, 0x00000000, 0xffffffff);
icmConnectPSEBus(muracFpga, busAA, "fpga_memwrite", True, 0x00000000, 0xffffffff);
/***************************************************************************************************
System Interrupt connections
***************************************************************************************************/
icmNetP intBrArch = icmNewNet("brArch");
icmNetP intRetArch = icmNewNet("retArch");
// connect the processor interrupt port to the net
icmConnectProcessorNet(pa, intBrArch, "brarch", ICM_OUTPUT);
// connect the FPGA interrupt port to the net
icmConnectPSENet(muracFpga, intBrArch, "fpga_brarch", ICM_INPUT);
// connect the processor interrupt port to the net
icmConnectProcessorNet(pa, intRetArch, "fiq", ICM_INPUT);
// connect the FPGA interrupt port to the net
icmConnectPSENet(muracFpga, intRetArch, "fpga_retarch", ICM_OUTPUT);
/***************************************************************************************************
Information
***************************************************************************************************/
// Show the bus connections
icmPrintf("\nPrimary Architecture Bus Connections\n");
icmPrintBusConnections(busPA);
icmPrintf("\nAuxiliary Architecture Bus Connections\n");
icmPrintBusConnections(busAA);
icmPrintf("\nNet Connections\n");
icmPrintNetConnections();
icmPrintf("\n");
/***************************************************************************************************
MURAC Simulation
***************************************************************************************************/
// Load the application code into the primary architecture memory
icmLoadProcessorMemory(pa, argv[1], False, False, True);
// Run the simulation until done (no instruction limit)
icmProcessorP final = icmSimulatePlatform();
if ( final && (icmGetStopReason(final) == ICM_SR_INTERRUPT ) ) {
icmPrintf("*** MURAC simulation interrupted\n");
}
// report the total number of instructions executed
icmPrintf("MURAC Primary Architecture has executed " FMT_64u " instructions\n", icmGetProcessorICount(pa));
icmTerminate();
return 0;
}
void createPlatformXilinx(Uns32 icmAttrs) {
icmPrintf("createPlatform Xilinx icmAttrs 0x%x\n"
" Variant Xilinx %s\n"
" Xilinx App %s\n", icmAttrs, xilinxVariantSet ? variantXilinx : "Not Specified", xilinxApp);
////////////////////////////////////////////////////////////////////////////////
// Bus bus1_b
////////////////////////////////////////////////////////////////////////////////
icmBusP busX1_b = icmNewBus( "busX1_b", 32);
////////////////////////////////////////////////////////////////////////////////
// Processor xilinx1
////////////////////////////////////////////////////////////////////////////////
const char *xilinx1_path = icmGetVlnvString(
0, // path (0 if from the product directory)
"xilinx.ovpworld.org", // vendor
"processor", // library
"microblaze", // name
0, // version
"model" // model
);
#if 0
const char *xilinx_semihost = icmGetVlnvString(
NULL,
"xilinx.ovpworld.org",
"semihosting",
"microblazeNewlib",
"1.0",
"model");
#else
const char *xilinx_semihost = 0;
#endif
icmAttrListP xilinx1_attr = icmNewAttrList();
if(xilinxVariantSet) {
icmAddStringAttr(xilinx1_attr, "variant", variantXilinx);
}
// icmAddStringAttr(xilinx1_attr, "endian", "little");
icmProcessorP xilinx1_c = icmNewProcessor(
"xilinx1", // name
"microblaze", // type
1, // cpuId
icmAttrs, // flags
32, // address bits
xilinx1_path, // model
"modelAttrs", // symbol
icmAttrs, // procAttrs
xilinx1_attr, // attrlist
xilinx_semihost, // semihost file
0 // semihost symbol
);
icmConnectProcessorBusses( xilinx1_c, busX1_b, busX1_b );
////////////////////////////////////////////////////////////////////////////////
// Memory ram1
////////////////////////////////////////////////////////////////////////////////
icmMemoryP ramX1_m = icmNewMemory("ramX1_m", 0x7, 0x2fffffff);
icmConnectMemoryToBus( busX1_b, "sp1", ramX1_m, 0x0);
////////////////////////////////////////////////////////////////////////////////
// Peripheral uart
////////////////////////////////////////////////////////////////////////////////
const char *uartX_path = icmGetVlnvString(
0, // path (0 if from the product directory)
0, // vendor
0, // library
"16550", // name
0, // version
"pse" // model
);
icmAttrListP uartX_attr = icmNewAttrList();
icmAddStringAttr(uartX_attr, "outfile", "xilinx-uart.log");
if(connectXilinxUartPort) {
if(!uartPort) {
icmAddUns64Attr(uartX_attr, "console", 1);
} else {
icmAddUns64Attr(uartX_attr, "portnum", uartPort);
}
icmAddUns64Attr(uartX_attr, "finishOnDisconnect", 1);
}
icmPseP uartX_p = icmNewPSE(
"uartX", // name
uartX_path, // model
uartX_attr, // attrlist
0,
0
);
icmConnectPSEBus( uartX_p, busX1_b, "bport1", 0, 0x40000000, 0x40000007);
if(connectXilinxUartPort) {
icmSetPSEdiagnosticLevel(uartX_p, 0x1);
}
////////////////////////////////////////////////////////////////////////////////
if(icmLoadProcessorMemory(xilinx1_c, xilinxApp, ICM_LOAD_DEFAULT, True, True)) {
// All files loaded correctly
} else {
icmPrintf("Failed to load %s\n", xilinxApp);
exit(1);
}
}
Int32 loadHexFile(icmProcessorP processor, char *fileName) {
Uns32 unused __attribute__((unused));
FILE *fp;
fp = fopen(fileName, "r");
if (!fp) {
icmPrintf ("Failed to open Memory Initialization File %s\n", fileName);
return -1;
}
icmPrintf("\nLoading Hex file %s\n", fileName);
Uns32 byteCount, addressOffset, recordType, baseAddress;
while (!feof(fp) && fscanf(fp, ":%02x%04x%02x", &byteCount, &addressOffset, &recordType) == 3) {
if (byteCount == 0 && addressOffset == 0 && recordType == 1) {
icmPrintf("Load Complete\n\n");
if (fclose(fp) != 0) {
icmPrintf("Failed to close Memory Initialization File\n");
return -1;
}
return 0; // eof
} else if (byteCount == 2 && recordType == 4) {
unused = fscanf(fp, "%04x", &baseAddress);
baseAddress = (baseAddress << 16);
icmPrintf("\nNew base address 0x%08x\n", baseAddress);
} else if (recordType == 0) {
Uns32 data, i;
for (i = 0; i < byteCount; i += sizeof(Uns32)) {
unused = fscanf(fp, "%08x", &data);
data = switchEndianness(data);
if (loadData(processor, baseAddress + addressOffset + i, data) != 0) {
return -1;
}
}
} else if (recordType == 3) {
// load CS:IP
Uns32 registers;
unused = fscanf(fp, "%08x", ®isters);
registers = switchEndianness(registers);
//Uns32 cs = ((registers & 0xFFFF0000) >> 16);
//Uns32 ipReg = (registers & 0x0000FFFF);
}
unused = fscanf(fp, "%*02x\n");
}
if (fclose(fp) != 0) {
icmPrintf("Failed to close Memory Initialization File\n");
return -1;
}
icmPrintf("No EOF marker was found - the file format is wrong\n");
return -1; // no eof marker was found - the file format is wrong
}
int main(int argc, const char *argv[])
{
// Check arguments and ensure application to load specified
if(!cmdParser(argc, argv)) {
icmMessage("E", "platform", "Command Line parser error");
return 1;
}
// the constructor
createPlatform();
icmSimulationStarting();
// apply watchpoints in shared memory
applyWatchpoints(handles.shared);
// set register watchpoints for processor0 only
applyRegWatchpoints(handles.processor0);
// this is set to step for one instruction
Bool stepOver = False;
Bool finished = False;
icmProcessorP stopProcessor = NULL;
// query registers and register groups in processor0
queryRegisters(handles.processor0);
while(!finished) {
// simulate the platform using the default scheduler
if(stepOver) {
icmSetICountBreakpoint(stopProcessor, 1);
stopProcessor = icmSimulatePlatform();
stepOver = False;
} else {
applyBreakpoints(handles.processor0);
applyBreakpoints(handles.processor1);
stopProcessor = icmSimulatePlatform();
clearBreakpoints(handles.processor0);
clearBreakpoints(handles.processor1);
}
switch(icmGetStopReason(stopProcessor)) {
case ICM_SR_EXIT:
finished = True;
break;
case ICM_SR_FINISH:
finished = True;
break;
case ICM_SR_BP_ICOUNT:
icmPrintf(
"Processor %s icount %u stopped at icount\n",
icmGetProcessorName(stopProcessor, "/"),
(Uns32)icmGetProcessorICount(stopProcessor)
);
break;
case ICM_SR_BP_ADDRESS:
icmPrintf(
"Processor %s icount %u stopped at address 0x%08x\n",
icmGetProcessorName(stopProcessor, "/"),
(Uns32)icmGetProcessorICount(stopProcessor),
(Uns32)icmGetPC(stopProcessor)
);
stepOver = True;
break;
case ICM_SR_WATCHPOINT:
icmPrintf(
"Processor %s icount %u stopped at watchpoint\n",
icmGetProcessorName(stopProcessor, "/"),
(Uns32)icmGetProcessorICount(stopProcessor)
);
handleWatchpoints();
break;
default:
icmPrintf(
"Processor %s icount %u stopped for reason %u\n",
icmGetProcessorName(stopProcessor, "/"),
(Uns32)icmGetProcessorICount(stopProcessor),
icmGetStopReason(stopProcessor)
);
break;
}
}
icmTerminate();
return 0;
}
//
// Handle all active watchpoints
//
static void handleWatchpoints(void) {
icmWatchPointP wp;
while((wp=icmGetNextTriggeredWatchPoint())) {
Uns32 id = getWatchpointId(wp);
icmProcessorP processor = icmGetWatchPointTriggeredBy(wp);
switch(icmGetWatchPointType(wp)) {
case ICMWP_REGISTER: {
// a register watchpoint was triggered
icmRegInfoP reg = icmGetWatchPointRegister(wp);
Uns32 *newValueP = (Uns32 *)icmGetWatchPointCurrentValue(wp);
Uns32 *oldValueP = (Uns32 *)icmGetWatchPointPreviousValue(wp);
// indicate old and new value of the affected register
icmPrintf(
" watchpoint %u (processor %s:%s) triggered 0x%08x->0x%08x\n",
id,
icmGetProcessorName(processor, "/"),
icmGetRegInfoName(reg),
*oldValueP,
*newValueP
);
// delete watchpoint after 100 triggerings
if(regWatchPointCount++>100) {
icmDeleteWatchPoint(wp);
} else {
icmResetWatchPoint(wp);
}
break;
}
case ICMWP_MEM_READ:
case ICMWP_MEM_WRITE:
case ICMWP_MEM_ACCESS:
// a memory watchpoint was triggered
icmPrintf(
" watchpoint %u (range 0x%08x:0x%08x) triggered by processor %s\n",
id,
(Uns32)icmGetWatchPointLowAddress(wp),
(Uns32)icmGetWatchPointHighAddress(wp),
icmGetProcessorName(processor, "/")
);
icmResetWatchPoint(wp);
break;
default:
icmPrintf(
" unknown watchpoint type triggered by processor %s\n",
icmGetProcessorName(processor, "/")
);
break;
}
}
}
