static int __init pnpide_generic_init(struct pci_dev *dev, int enable)
{
hw_regs_t hw;
int index;
if (!enable)
return 0;
if (!(DEV_IO(dev, 0) && DEV_IO(dev, 1) && DEV_IRQ(dev, 0)))
return 1;
ide_setup_ports(&hw, (ide_ioreg_t) DEV_IO(dev, 0),
generic_ide_offsets,
(ide_ioreg_t) DEV_IO(dev, 1),
0, NULL,
// generic_pnp_ide_iops,
DEV_IRQ(dev, 0));
index = ide_register_hw(&hw, NULL);
if (index != -1) {
printk(KERN_INFO "ide%d: %s IDE interface\n", index, DEV_NAME(dev));
return 0;
}
return 1;
}
static int idepnp_probe(struct pnp_dev * dev, const struct pnp_device_id *dev_id)
{
hw_regs_t hw;
ide_hwif_t *hwif;
int index;
if (!(pnp_port_valid(dev, 0) && pnp_port_valid(dev, 1) && pnp_irq_valid(dev, 0)))
return -1;
ide_setup_ports(&hw, (unsigned long) pnp_port_start(dev, 0),
generic_ide_offsets,
(unsigned long) pnp_port_start(dev, 1),
0, NULL,
// generic_pnp_ide_iops,
pnp_irq(dev, 0));
index = ide_register_hw(&hw, &hwif);
if (index != -1) {
printk(KERN_INFO "ide%d: generic PnP IDE interface\n", index);
pnp_set_drvdata(dev,hwif);
return 0;
}
return -1;
}
void falconide_init(void)
{
if (MACH_IS_ATARI && ATARIHW_PRESENT(IDE)) {
hw_regs_t hw;
int index;
ide_setup_ports(&hw, (ide_ioreg_t)ATA_HD_BASE, falconide_offsets,
0, 0, NULL, IRQ_MFP_IDE);
index = ide_register_hw(&hw, NULL);
if (index != -1)
printk("ide%d: Falcon IDE interface\n", index);
}
}
void __init cpci405ide_init(void)
{
hw_regs_t hw;
int index = -1;
cpci405_ide_base_mapped =
ioremap((unsigned long) CPCI405_HD_BASE, 0x200) - _IO_BASE;
ide_setup_ports(&hw, (ide_ioreg_t)cpci405_ide_base_mapped,
cpci405ide_offsets, 0, 0, NULL, CPCI405_IRQ_IDE);
index = ide_register_hw(&hw, NULL);
if (index != -1)
printk("ide%d: CPCI405 IDE interface\n", index);
}
void __init tx4938_ide_init(void)
{
hw_regs_t hw;
int index;
int offsets[IDE_NR_PORTS];
int i;
unsigned long port;
for (i = 0; i < 8; i++)
offsets[i] = i;
offsets[IDE_CONTROL_OFFSET] = 6;
offsets[IDE_CONTROL_OFFSET] += 0x10000;
tx4938_ide_irq = RBTX4938_IRQ_IOC_ATA;
if ((tx4938_ccfgptr->pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) !=
TX4938_PCFG_ATA_SEL)
return;
for (i = 0; i < 8; i++) {
/* check EBCCRn.ISA, EBCCRn.BSZ, EBCCRn.ME */
if ((tx4938_ebuscptr->cr[i] & 0x00f00008) == 0x00e00008)
break;
}
if (i == 8) {
printk(KERN_DEBUG "TX4938 ATA channel not found.\n");
return;
}
port = KSEG1ADDR((tx4938_ebuscptr->cr[i] >> 48) << 20) + 0x10000 -
mips_io_port_base;
memset(&hw, 0, sizeof(hw));
ide_setup_ports(&hw, port, offsets, 0, 0, 0, tx4938_ide_irq);
index = ide_register_hw(&hw, NULL);
if (index != -1) {
ide_hwif_t *hwif = &ide_hwifs[index];
#ifdef __BIG_ENDIAN
hwif->ata_input_data = tx4938_ata_input_data;
hwif->ata_output_data = tx4938_ata_output_data;
hwif->atapi_input_bytes = tx4938_atapi_input_bytes;
hwif->atapi_output_bytes = tx4938_atapi_output_bytes;
#endif
printk("%s: TX4938 IDE interface\n", hwif->name);
}
}
void uclinux_ide_init(void)
{
hw_regs_t hw;
ide_ioreg_t base;
int index, i;
ide_hwif_t* hwif;
for (i = 0; ide_defaults[i].base != (ide_ioreg_t) -1; i++) {
base = ide_defaults[i].base;
memset(&hw, 0, sizeof(hw));
#ifdef CONFIG_COLDFIRE
mcf_autovector(hw.irq);
#endif
hw.irq = ide_defaults[i].irq;
ide_setup_ports(&hw, base, ide_offsets, 0, 0, ack_intr,
/* ide_iops, */
ide_defaults[i].irq);
index = ide_register_hw(&hw, &hwif);
if (index != -1) {
hwif->mmio = 1; /* not io(0) or mmio(1) */
#ifdef CONFIG_COLDFIRE
hwif->OUTB = OUTB;
hwif->OUTBSYNC = OUTBSYNC;
hwif->OUTW = OUTW;
hwif->OUTL = OUTL;
hwif->OUTSW = OUTSW;
hwif->OUTSL = OUTSL;
hwif->INB = INB;
hwif->INW = INW;
hwif->INL = INL;
hwif->INSW = INSW;
hwif->INSL = INSL;
DRIVER(&hwif->drives[0])->cleanup = uclinux_irq_remove;
#endif
}
disable_irq(ide_defaults[i].irq);
}
}
static inline int csb536_cf_init(void)
{
ide_hwif_t *hwif;
ide_drive_t *drive;
hw_regs_t hw;
int cf_idx;
dbg("CSB536 CF Probe\n");
dbg("Using CF_REGISTER_BASE 0x%08lx\n",CF_REGISTER_BASE);
ide_setup_ports(&hw, CF_REGISTER_BASE, cfide_offsets, 0, 0, &csb536_ide_ack_intr, CF_RDYBSY_IRQ);
/* Reset the CF card */
csb536_cf_reset(NULL);
/* Dump the initial state of CF registers */
dbg("CF Config Option Reg(0x%08lx)=0x%02x\n",CF_CONFIG_OPTION_REG, inb(CF_CONFIG_OPTION_REG));
dbg("CF Config/Status Reg(0x%08lx)=0x%02x\n",CF_CONFIG_STATUS_REG, inb(CF_CONFIG_STATUS_REG));
dbg("CF Pin Replacement Reg(0x%08lx)=0x%02x\n",CF_PIN_REPLACEMENT_REG, inw(CF_PIN_REPLACEMENT_REG));
dbg("CF Socket and Copy Reg(0x%08lx)=0x%02x\n",CF_SOCKET_AND_COPY_REG, inb(CF_SOCKET_AND_COPY_REG));
/* Make sure that the CF card in is memory mapped mode by
* writing 0x0000 to the Configuration Option Register.
*/
dbg("Using Memory Mapped Mode\n");
outb(0x00, CF_CONFIG_OPTION_REG);
/* Dump the current state of CF registers */
dbg("CF Config Option Reg(0x%08lx)=0x%02x\n",
CF_CONFIG_OPTION_REG, inb(CF_CONFIG_OPTION_REG));
dbg("CF Config/Status Reg(0x%08lx)=0x%02x\n",
CF_CONFIG_STATUS_REG, inb(CF_CONFIG_STATUS_REG));
dbg("CF Pin Replacement Reg(0x%08lx)=0x%02x\n",
CF_PIN_REPLACEMENT_REG, inb(CF_PIN_REPLACEMENT_REG));
dbg("CF Socket and Copy Reg(0x%08lx)=0x%02x\n",
CF_SOCKET_AND_COPY_REG, inb(CF_SOCKET_AND_COPY_REG));
udelay(CF_MODE_DELAY);
/* Register the hardware interface. NOTE: The CF hardware
* must be completely initialized at this point because if
* ide_register_hw() is called AFTER initialization of the built-in,
* drivers it will also probe the CF interface.
*/
cf_idx = ide_register_hw(&hw, &hwif);
if (cf_idx < 0)
{
err("Could not register CSB536 CompactFlash driver\n");
return -ENODEV;
}
dbg("Using ide_hwifs[%d]\n", cf_idx);
/* Provide function pointers for special handling */
hwif->resetproc = csb536_cf_reset;
/* We assume only one "drive," the master driver.
* Probe only the master drive
*/
drive = &hwif->drives[0];
drive->noprobe = 0;
hwif->drives[1].noprobe = 1;
/* This is the signature for a CF card */
drive->removable = 1;
drive->is_flash = 1;
/* Dump all IDE registers */
dbg("CF DATA(0x%08lx) = 0x%04x\n",
hwif->hw.io_ports[IDE_DATA_OFFSET],
inw(hwif->hw.io_ports[IDE_DATA_OFFSET]));
dbg("CF ERROR(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_ERROR_OFFSET],
inb(hwif->hw.io_ports[IDE_ERROR_OFFSET]));
dbg("CF NSECTOR(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_NSECTOR_OFFSET],
inb(hwif->hw.io_ports[IDE_NSECTOR_OFFSET]));
dbg("CF SECTOR(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_SECTOR_OFFSET],
inb(hwif->hw.io_ports[IDE_SECTOR_OFFSET]));
dbg("CF LCYL(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_LCYL_OFFSET],
inb(hwif->hw.io_ports[IDE_LCYL_OFFSET]));
dbg("CF HCYL(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_HCYL_OFFSET],
inb(hwif->hw.io_ports[IDE_HCYL_OFFSET]));
dbg("CF SELECT(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_SELECT_OFFSET],
inb(hwif->hw.io_ports[IDE_SELECT_OFFSET]));
dbg("CF STATUS(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_STATUS_OFFSET],
inb(hwif->hw.io_ports[IDE_STATUS_OFFSET]));
dbg("CF CONTROL(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_CONTROL_OFFSET],
inb(hwif->hw.io_ports[IDE_CONTROL_OFFSET]));
dbg("CF IRQ(0x%08lx) = 0x%02x\n",
hwif->hw.io_ports[IDE_IRQ_OFFSET],
inb(hwif->hw.io_ports[IDE_IRQ_OFFSET]));
csb536_cf_memory();
/* Probe the hardware interface. NOTE: If ide_register_hw() is
* called AFTER initialization of IDE built-in drivers, it will do
* the following automatically.
*/
probe_hwif_init(hwif);
create_proc_ide_interfaces();
return cf_idx;
}
void __init buddha_init(void)
{
hw_regs_t hw;
ide_hwif_t *hwif;
int i, index;
struct zorro_dev *z = NULL;
u_long buddha_board = 0;
BuddhaType type;
int buddha_num_hwifs;
while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
unsigned long board;
if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_BUDDHA) {
buddha_num_hwifs = BUDDHA_NUM_HWIFS;
type=BOARD_BUDDHA;
} else if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_CATWEASEL) {
buddha_num_hwifs = CATWEASEL_NUM_HWIFS;
type=BOARD_CATWEASEL;
} else if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF) {
buddha_num_hwifs = XSURF_NUM_HWIFS;
type=BOARD_XSURF;
} else
continue;
board = z->resource.start;
/*
* FIXME: we now have selectable mmio v/s iomio transports.
*/
if(type != BOARD_XSURF) {
if (!request_mem_region(board+BUDDHA_BASE1, 0x800, "IDE"))
continue;
} else {
if (!request_mem_region(board+XSURF_BASE1, 0x1000, "IDE"))
continue;
if (!request_mem_region(board+XSURF_BASE2, 0x1000, "IDE"))
goto fail_base2;
if (!request_mem_region(board+XSURF_IRQ1, 0x8, "IDE")) {
release_mem_region(board+XSURF_BASE2, 0x1000);
fail_base2:
release_mem_region(board+XSURF_BASE1, 0x1000);
continue;
}
}
buddha_board = ZTWO_VADDR(board);
/* write to BUDDHA_IRQ_MR to enable the board IRQ */
/* X-Surf doesn't have this. IRQs are always on */
if (type != BOARD_XSURF)
z_writeb(0, buddha_board+BUDDHA_IRQ_MR);
for(i=0;i<buddha_num_hwifs;i++) {
if(type != BOARD_XSURF) {
ide_setup_ports(&hw, (buddha_board+buddha_bases[i]),
buddha_offsets, 0,
(buddha_board+buddha_irqports[i]),
buddha_ack_intr,
// budda_iops,
IRQ_AMIGA_PORTS);
} else {
ide_setup_ports(&hw, (buddha_board+xsurf_bases[i]),
xsurf_offsets, 0,
(buddha_board+xsurf_irqports[i]),
xsurf_ack_intr,
// xsurf_iops,
IRQ_AMIGA_PORTS);
}
index = ide_register_hw(&hw, NULL, 1, &hwif);
if (index != -1) {
hwif->mmio = 1;
printk("ide%d: ", index);
switch(type) {
case BOARD_BUDDHA:
printk("Buddha");
break;
case BOARD_CATWEASEL:
printk("Catweasel");
break;
case BOARD_XSURF:
printk("X-Surf");
break;
}
printk(" IDE interface\n");
}
}
}
}
void __init gayle_init(void)
{
int a4000, i;
if (!MACH_IS_AMIGA)
return;
if ((a4000 = AMIGAHW_PRESENT(A4000_IDE)) || AMIGAHW_PRESENT(A1200_IDE))
goto found;
#ifdef CONFIG_ZORRO
if (zorro_find_device(ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530_SCSI_IDE,
NULL))
goto found;
#endif
return;
found:
for (i = 0; i < GAYLE_NUM_PROBE_HWIFS; i++) {
unsigned long base, ctrlport, irqport;
ide_ack_intr_t *ack_intr;
hw_regs_t hw;
ide_hwif_t *hwif;
int index;
unsigned long phys_base, res_start, res_n;
if (a4000) {
phys_base = GAYLE_BASE_4000;
irqport = (unsigned long)ZTWO_VADDR(GAYLE_IRQ_4000);
ack_intr = gayle_ack_intr_a4000;
} else {
phys_base = GAYLE_BASE_1200;
irqport = (unsigned long)ZTWO_VADDR(GAYLE_IRQ_1200);
ack_intr = gayle_ack_intr_a1200;
}
/*
* FIXME: we now have selectable modes between mmio v/s iomio
*/
phys_base += i*GAYLE_NEXT_PORT;
res_start = ((unsigned long)phys_base) & ~(GAYLE_NEXT_PORT-1);
res_n = GAYLE_IDEREG_SIZE;
if (!request_mem_region(res_start, res_n, "IDE"))
continue;
base = (unsigned long)ZTWO_VADDR(phys_base);
ctrlport = GAYLE_HAS_CONTROL_REG ? (base + GAYLE_CONTROL) : 0;
ide_setup_ports(&hw, base, gayle_offsets,
ctrlport, irqport, ack_intr,
// &gayle_iops,
IRQ_AMIGA_PORTS);
index = ide_register_hw(&hw, &hwif);
if (index != -1) {
hwif->mmio = 2;
switch (i) {
case 0:
printk("ide%d: Gayle IDE interface (A%d style)\n", index,
a4000 ? 4000 : 1200);
break;
#ifdef CONFIG_BLK_DEV_IDEDOUBLER
case 1:
printk("ide%d: IDE doubler\n", index);
break;
#endif /* CONFIG_BLK_DEV_IDEDOUBLER */
}
} else
release_mem_region(res_start, res_n);
}
}
