/*main(int argc, char *argv[])*/ int pci_scan(pciinfo_t *pci_list,unsigned *num_pci) { unsigned int idx = 0; struct pci_config_reg pcr; int do_mode1_scan = 0; #if !defined(__alpha__) && !defined(__powerpc__) int do_mode2_scan = 0; #endif int func, hostbridges=0; int ret = -1; pci_lst = pci_list; *num_pci = 0; ret = enable_os_io(); if (ret != 0) return ret; if((pcr._configtype = pci_config_type()) == 0xFFFF) return ENODEV; /* Try pci config 1 probe first */ if ((pcr._configtype == 1) || do_mode1_scan) { /*printf("\nPCI probing configuration type 1\n");*/ pcr._ioaddr = 0xFFFF; pcr._pcibuses[0] = 0; pcr._pcinumbus = 1; pcr._pcibusidx = 0; do { /*printf("Probing for devices on PCI bus %d:\n\n", pcr._pcibusidx);*/ for (pcr._cardnum = 0x0; pcr._cardnum < MAX_PCI_DEVICES_PER_BUS; pcr._cardnum += 0x1) { func = 0; do { /* loop over the different functions, if present */ pcr._device_vendor = pci_get_vendor(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum, func); if ((pcr._vendor == 0xFFFF) || (pcr._device == 0xFFFF)) break; /* nothing there */ /*printf("\npci bus 0x%x cardnum 0x%02x function 0x%04x: vendor 0x%04x device 0x%04x\n", pcr._pcibuses[pcr._pcibusidx], pcr._cardnum, func, pcr._vendor, pcr._device);*/ pcibus = pcr._pcibuses[pcr._pcibusidx]; pcicard = pcr._cardnum; pcifunc = func; pcr._status_command = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_CMD_STAT_REG); pcr._class_revision = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_CLASS_REG); pcr._bist_header_latency_cache = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_HEADER_MISC); pcr._base0 = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_MAP_REG_START); pcr._base1 = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_MAP_REG_START+4); pcr._base2 = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_MAP_REG_START+8); pcr._base3 = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_MAP_REG_START+0x0C); pcr._base4 = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_MAP_REG_START+0x10); pcr._base5 = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_MAP_REG_START+0x14); pcr._baserom = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_MAP_ROM_REG); pcr._max_min_ipin_iline = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_INTERRUPT_REG); pcr._user_config = pci_config_read_long(pcr._pcibuses[pcr._pcibusidx], pcr._cardnum,func,PCI_REG_USERCONFIG); /* check for pci-pci bridges */ #define PCI_CLASS_MASK 0xff000000 #define PCI_SUBCLASS_MASK 0x00ff0000 #define PCI_CLASS_BRIDGE 0x06000000 #define PCI_SUBCLASS_BRIDGE_PCI 0x00040000 switch(pcr._class_revision & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: if (pcr._secondary_bus_number > 0) { pcr._pcibuses[pcr._pcinumbus++] = pcr._secondary_bus_number; } break; case PCI_CLASS_BRIDGE: if ( ++hostbridges > 1) { pcr._pcibuses[pcr._pcinumbus] = pcr._pcinumbus; pcr._pcinumbus++; } break; default: break; } if((func==0) && ((pcr._header_type & PCI_MULTIFUNC_DEV) == 0)) { /* not a multi function device */ func = 8; } else { func++; } if (idx++ >= MAX_PCI_DEVICES) continue; identify_card(&pcr, (*num_pci)++); } while( func < 8 ); } } while (++pcr._pcibusidx < pcr._pcinumbus); } #if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sh__) /* Now try pci config 2 probe (deprecated) */ if ((pcr._configtype == 2) || do_mode2_scan) { outb(PCI_MODE2_ENABLE_REG, 0xF1); outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ /*printf("\nPCI probing configuration type 2\n");*/ pcr._pcibuses[0] = 0; pcr._pcinumbus = 1; pcr._pcibusidx = 0; idx = 0; do { for (pcr._ioaddr = 0xC000; pcr._ioaddr < 0xD000; pcr._ioaddr += 0x0100) { outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ pcr._device_vendor = inl(pcr._ioaddr); outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ if ((pcr._vendor == 0xFFFF) || (pcr._device == 0xFFFF)) continue; if ((pcr._vendor == 0xF0F0) || (pcr._device == 0xF0F0)) continue; /* catch ASUS P55TP4XE motherboards */ /*printf("\npci bus 0x%x slot at 0x%04x, vendor 0x%04x device 0x%04x\n", pcr._pcibuses[pcr._pcibusidx], pcr._ioaddr, pcr._vendor, pcr._device);*/ pcibus = pcr._pcibuses[pcr._pcibusidx] ; pcicard = pcr._ioaddr ; pcifunc = 0 ; outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ pcr._status_command = inl(pcr._ioaddr + 0x04); pcr._class_revision = inl(pcr._ioaddr + 0x08); pcr._bist_header_latency_cache = inl(pcr._ioaddr + 0x0C); pcr._base0 = inl(pcr._ioaddr + 0x10); pcr._base1 = inl(pcr._ioaddr + 0x14); pcr._base2 = inl(pcr._ioaddr + 0x18); pcr._base3 = inl(pcr._ioaddr + 0x1C); pcr._base4 = inl(pcr._ioaddr + 0x20); pcr._base5 = inl(pcr._ioaddr + 0x24); pcr._baserom = inl(pcr._ioaddr + 0x30); pcr._max_min_ipin_iline = inl(pcr._ioaddr + 0x3C); pcr._user_config = inl(pcr._ioaddr + 0x40); outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ /* check for pci-pci bridges (currently we only know Digital) */ if ((pcr._vendor == 0x1011) && (pcr._device == 0x0001)) if (pcr._secondary_bus_number > 0) pcr._pcibuses[pcr._pcinumbus++] = pcr._secondary_bus_number; if (idx++ >= MAX_PCI_DEVICES) continue; identify_card(&pcr, (*num_pci)++); } } while (++pcr._pcibusidx < pcr._pcinumbus); outb(PCI_MODE2_ENABLE_REG, 0x00); } #endif /* !__alpha__ && !__powerpc__ && !__sh__ */ disable_os_io(); return 0 ; }
int main(int argc, char *argv[]) { pciConfigPtr pPCI, *pcrpp = NULL; int Verbose = 0; int i = 0; int force = 0; int c; xf86Info.pciFlags = PCIProbe1; while ((c = getopt(argc, argv, "?v12OfV:")) != -1) switch(c) { case 'v': Verbose++; break; case '1': xf86Info.pciFlags = PCIProbe1; break; case '2': xf86Info.pciFlags = PCIProbe2; break; case 'O': xf86Info.pciFlags = PCIOsConfig; break; case 'f': force = 1; break; case 'V': xf86Verbose = atoi(optarg); break; case '?': default: usage(); exit (1); break; } if (force) switch (xf86Info.pciFlags) { case PCIProbe1: xf86Info.pciFlags = PCIForceConfig1; break; case PCIProbe2: xf86Info.pciFlags = PCIForceConfig2; break; default: break; } xf86EnableIO(); pcrpp = xf86scanpci(0); if (!pcrpp) { printf("No PCI devices found\n"); xf86DisableIO(); exit (1); } while ((pPCI = pcrpp[i++])) identify_card(pPCI, Verbose); if (Verbose > 1) { printf("\nPCI bus linkages:\n\n"); for (i = 0; i < MAX_PCI_BUSES; i++) { pciBusInfo_t *pBusInfo; if (!(pBusInfo = pciBusInfo[i])) continue; if ((pPCI = pBusInfo->bridge)) printf("PCI bus 0x%04x has parent bridge 0x%04x:0x%02x:0x%1x\n", i, pPCI->busnum, pPCI->devnum, pPCI->funcnum); else printf("PCI bus 0x%04x has no parent\n", i); } } xf86DisableIO(); exit(0); }