int
an_attach(struct an_softc *sc)
{
struct ieee80211com *ic = &sc->sc_ic;
struct ifnet *ifp = &sc->sc_if;
int i, s;
struct an_rid_wepkey *akey;
int buflen, kid, rid;
int chan, chan_min, chan_max;
s = splnet();
sc->sc_invalid = 0;
an_wait(sc);
if (an_reset(sc) != 0) {
sc->sc_invalid = 1;
splx(s);
return 1;
}
/* Load factory config */
if (an_cmd(sc, AN_CMD_READCFG, 0) != 0) {
splx(s);
aprint_error_dev(sc->sc_dev, "failed to load config data\n");
return 1;
}
/* Read the current configuration */
buflen = sizeof(sc->sc_config);
if (an_read_rid(sc, AN_RID_GENCONFIG, &sc->sc_config, &buflen) != 0) {
splx(s);
aprint_error_dev(sc->sc_dev, "read config failed\n");
return 1;
}
/* Read the card capabilities */
buflen = sizeof(sc->sc_caps);
if (an_read_rid(sc, AN_RID_CAPABILITIES, &sc->sc_caps, &buflen) != 0) {
splx(s);
aprint_error_dev(sc->sc_dev, "read caps failed\n");
return 1;
}
#ifdef AN_DEBUG
if (an_debug) {
static const int dumprid[] = {
AN_RID_GENCONFIG, AN_RID_CAPABILITIES, AN_RID_SSIDLIST,
AN_RID_APLIST, AN_RID_STATUS, AN_RID_ENCAP
};
for (rid = 0; rid < sizeof(dumprid)/sizeof(dumprid[0]); rid++) {
buflen = sizeof(sc->sc_buf);
if (an_read_rid(sc, dumprid[rid], &sc->sc_buf, &buflen)
!= 0)
continue;
printf("%04x (%d):\n", dumprid[rid], buflen);
for (i = 0; i < (buflen + 1) / 2; i++)
printf(" %04x", sc->sc_buf.sc_val[i]);
printf("\n");
}
}
#endif
/* Read WEP settings from persistent memory */
akey = &sc->sc_buf.sc_wepkey;
buflen = sizeof(struct an_rid_wepkey);
rid = AN_RID_WEP_VOLATILE; /* first persistent key */
while (an_read_rid(sc, rid, akey, &buflen) == 0) {
kid = le16toh(akey->an_key_index);
DPRINTF(("an_attach: wep rid=0x%x len=%d(%zu) index=0x%04x "
"mac[0]=%02x keylen=%d\n",
rid, buflen, sizeof(*akey), kid,
akey->an_mac_addr[0], le16toh(akey->an_key_len)));
if (kid == 0xffff) {
sc->sc_tx_perskey = akey->an_mac_addr[0];
sc->sc_tx_key = -1;
break;
}
if (kid >= IEEE80211_WEP_NKID)
break;
sc->sc_perskeylen[kid] = le16toh(akey->an_key_len);
sc->sc_wepkeys[kid].an_wep_keylen = -1;
rid = AN_RID_WEP_PERSISTENT; /* for next key */
buflen = sizeof(struct an_rid_wepkey);
}
aprint_normal_dev(sc->sc_dev, "%s %s (firmware %s)\n",
sc->sc_caps.an_manufname, sc->sc_caps.an_prodname,
sc->sc_caps.an_prodvers);
memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST | IFF_NOTRAILERS | IFF_SIMPLEX |
IFF_MULTICAST | IFF_ALLMULTI;
ifp->if_ioctl = an_ioctl;
ifp->if_start = an_start;
ifp->if_init = an_init;
ifp->if_stop = an_stop;
ifp->if_watchdog = an_watchdog;
IFQ_SET_READY(&ifp->if_snd);
ic->ic_ifp = ifp;
ic->ic_phytype = IEEE80211_T_DS;
ic->ic_opmode = IEEE80211_M_STA;
ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_PMGT | IEEE80211_C_IBSS |
IEEE80211_C_MONITOR;
ic->ic_state = IEEE80211_S_INIT;
IEEE80211_ADDR_COPY(ic->ic_myaddr, sc->sc_caps.an_oemaddr);
switch (le16toh(sc->sc_caps.an_regdomain)) {
default:
case AN_REGDOMAIN_USA:
case AN_REGDOMAIN_CANADA:
chan_min = 1; chan_max = 11; break;
case AN_REGDOMAIN_EUROPE:
case AN_REGDOMAIN_AUSTRALIA:
chan_min = 1; chan_max = 13; break;
case AN_REGDOMAIN_JAPAN:
chan_min = 14; chan_max = 14; break;
case AN_REGDOMAIN_SPAIN:
chan_min = 10; chan_max = 11; break;
case AN_REGDOMAIN_FRANCE:
chan_min = 10; chan_max = 13; break;
case AN_REGDOMAIN_JAPANWIDE:
chan_min = 1; chan_max = 14; break;
}
for (chan = chan_min; chan <= chan_max; chan++) {
ic->ic_channels[chan].ic_freq =
ieee80211_ieee2mhz(chan, IEEE80211_CHAN_2GHZ);
ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_B;
}
ic->ic_ibss_chan = &ic->ic_channels[chan_min];
aprint_normal("%s: 802.11 address: %s, channel: %d-%d\n",
ifp->if_xname, ether_sprintf(ic->ic_myaddr), chan_min, chan_max);
/* Find supported rate */
for (i = 0; i < sizeof(sc->sc_caps.an_rates); i++) {
if (sc->sc_caps.an_rates[i] == 0)
continue;
ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[
ic->ic_sup_rates[IEEE80211_MODE_11B].rs_nrates++] =
sc->sc_caps.an_rates[i];
}
/*
* Call MI attach routine.
*/
if_attach(ifp);
ieee80211_ifattach(ic);
sc->sc_newstate = ic->ic_newstate;
ic->ic_newstate = an_newstate;
ieee80211_media_init(ic, an_media_change, an_media_status);
/*
* radiotap BPF device
*/
#if NBPFILTER > 0
bpfattach2(ifp, DLT_IEEE802_11_RADIO,
sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf);
#endif
memset(&sc->sc_rxtapu, 0, sizeof(sc->sc_rxtapu));
sc->sc_rxtap.ar_ihdr.it_len = htole16(sizeof(sc->sc_rxtapu));
sc->sc_rxtap.ar_ihdr.it_present = htole32(AN_RX_RADIOTAP_PRESENT);
memset(&sc->sc_txtapu, 0, sizeof(sc->sc_txtapu));
sc->sc_txtap.at_ihdr.it_len = htole16(sizeof(sc->sc_txtapu));
sc->sc_txtap.at_ihdr.it_present = htole32(AN_TX_RADIOTAP_PRESENT);
sc->sc_attached = 1;
splx(s);
ieee80211_announce(ic);
return 0;
}
Static void
athn_pci_attach(device_t parent, device_t self, void *aux)
{
struct athn_pci_softc *psc = device_private(self);
struct athn_softc *sc = &psc->psc_sc;
struct ieee80211com *ic = &sc->sc_ic;
struct pci_attach_args *pa = aux;
const char *intrstr;
pcireg_t memtype, reg;
pci_product_id_t subsysid;
int error;
sc->sc_dev = self;
sc->sc_dmat = pa->pa_dmat;
psc->psc_pc = pa->pa_pc;
psc->psc_tag = pa->pa_tag;
sc->sc_ops.read = athn_pci_read;
sc->sc_ops.write = athn_pci_write;
sc->sc_ops.write_barrier = athn_pci_write_barrier;
/*
* Get the offset of the PCI Express Capability Structure in PCI
* Configuration Space (Linux hardcodes it as 0x60.)
*/
error = pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
&psc->psc_cap_off, NULL);
if (error != 0) { /* Found. */
sc->sc_disable_aspm = athn_pci_disable_aspm;
sc->sc_flags |= ATHN_FLAG_PCIE;
}
/*
* Noone knows why this shit is necessary but there are claims that
* not doing this may cause very frequent PCI FATAL interrupts from
* the card: http://bugzilla.kernel.org/show_bug.cgi?id=13483
*/
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x40);
if (reg & 0xff00)
pci_conf_write(pa->pa_pc, pa->pa_tag, 0x40, reg & ~0xff00);
/* Change latency timer; default value yields poor results. */
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
reg |= 168 << PCI_LATTIMER_SHIFT;
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, reg);
/* Determine if bluetooth is also supported (combo chip.) */
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
subsysid = PCI_PRODUCT(reg);
if (subsysid == PCI_SUBSYSID_ATHEROS_COEX3WIRE_SA ||
subsysid == PCI_SUBSYSID_ATHEROS_COEX3WIRE_DA)
sc->sc_flags |= ATHN_FLAG_BTCOEX3WIRE;
else if (subsysid == PCI_SUBSYSID_ATHEROS_COEX2WIRE)
sc->sc_flags |= ATHN_FLAG_BTCOEX2WIRE;
/*
* Setup memory-mapping of PCI registers.
*/
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, ATHN_PCI_MMBA);
if (memtype != PCI_MAPREG_TYPE_MEM &&
memtype != PCI_MAPREG_MEM_TYPE_64BIT) {
aprint_error_dev(self, "bad pci register type %d\n",
(int)memtype);
goto fail;
}
error = pci_mapreg_map(pa, ATHN_PCI_MMBA, memtype, 0, &psc->psc_iot,
&psc->psc_ioh, NULL, &psc->psc_mapsz);
if (error != 0) {
aprint_error_dev(self, "cannot map register space\n");
goto fail;
}
/*
* Arrange interrupt line.
*/
if (pci_intr_map(pa, &psc->psc_pih) != 0) {
aprint_error_dev(self, "couldn't map interrupt\n");
goto fail1;
}
intrstr = pci_intr_string(psc->psc_pc, psc->psc_pih);
psc->psc_ih = pci_intr_establish(psc->psc_pc, psc->psc_pih, IPL_NET,
athn_intr, sc);
if (psc->psc_ih == NULL) {
aprint_error_dev(self, "couldn't map interrupt\n");
goto fail1;
}
ic->ic_ifp = &sc->sc_if;
if (athn_attach(sc) != 0)
goto fail2;
aprint_verbose_dev(self, "interrupting at %s\n", intrstr);
if (pmf_device_register(self, athn_pci_suspend, athn_pci_resume)) {
pmf_class_network_register(self, &sc->sc_if);
pmf_device_suspend(self, &sc->sc_qual);
}
else
aprint_error_dev(self, "couldn't establish power handler\n");
ieee80211_announce(ic);
return;
fail2:
pci_intr_disestablish(psc->psc_pc, psc->psc_ih);
psc->psc_ih = NULL;
fail1:
bus_space_unmap(psc->psc_iot, psc->psc_ioh, psc->psc_mapsz);
psc->psc_mapsz = 0;
fail:
return;
}
