int main()
{
int i;/**/
/******************************************************/
/*test des diférentes fonctions sur la structure data */
/******************************************************/
/*intitialisation d'un structure Data*/
Data test_data = initData();
/*intitialisation d'une liste de chaine de caractere*/
char ** testTable = initAddressTable();/**/
if(test_data!=NULL)
printf("initalisation de la strucutre test_data s'est bien passee\n");
else
erreur("initalisation de la strucutre test_data",99);
addFileInListFile("test", test_data);
printf("fichier est bien ajouté dans la structure\n");
printf("le fichier ajouté est ");
fileList(test_data);
addFileInListFile("test2", test_data);
printf("fichier est bien ajouté dans la structure\n");
printf("le fichier ajouté est ");
fileList(test_data);
addFileInListFile("test3", test_data);
printf("fichier est bien ajouté dans la structure\n");
printf("le fichier ajouté est ");
fileList(test_data);
printf("supression de la structure...\n");
deleteData(test_data);
printf("structure suprimée\n");
/***********************************************************/
/*test des diférentes fonctions sur la liste des adresse IP*/
/***********************************************************/
if(testTable!=NULL)
printf("initalisation de le tableau d'adresse IP s'est bien passee\n");
else
erreur("erreur lors de l'initialisation de la strucutre test_data",99);
for(i=0;i<6;i++)
{
addAddressInTable(testTable, "TEST");
printf("adresse %d est bien ajoutee\n",i);
}
for(i=0;i<6;i++)
{
addAddressInTable(testTable, "TEST");
printf("adresse %d est bien ajoutee\n",i);
}
printf("supression du tableau d'adresse IP\n");
deleteAddessTable(testTable);/**/
return 0;
}
/**************************************************************************
PROBE - Look for an adapter, this routine's visible to the outside
***************************************************************************/
int
gt6426x_eth_probe(void *v, bd_t *bis)
{
struct eth_device *wp = (struct eth_device *)v;
struct eth_dev_s *p = (struct eth_dev_s *)wp->priv;
int dev = p->dev;
unsigned int reg_base = p->reg_base;
unsigned long temp;
int i;
if (( dev < 0 ) || ( dev >= GAL_ETH_DEVS ))
{ /* This should never happen */
printf("%s: Invalid device %d\n", __FUNCTION__, dev );
return 0;
}
#ifdef DEBUG
printf ("%s: initializing %s\n", __FUNCTION__, wp->name );
printf ("\nCOMM_CONTROL = %08x , COMM_CONF = %08x\n",
GTREGREAD(COMM_UNIT_ARBITER_CONTROL),
GTREGREAD(COMM_UNIT_ARBITER_CONFIGURATION_REGISTER));
#endif
/* clear MIB counters */
for(i=0;i<255; i++)
temp=GTREGREAD(ETHERNET0_MIB_COUNTER_BASE + reg_base +i);
#ifdef CONFIG_INTEL_LXT97X
/* for intel LXT972 */
/* led 1: 0x1=txact
led 2: 0xc=link/rxact
led 3: 0x2=rxact (N/C)
strch: 0,2=30 ms, enable */
miiphy_write(GT6426x_MII_DEVNAME,ether_port_phy_addr[p->dev], 20, 0x1c22);
/* 2.7ns port rise time */
/*miiphy_write(ether_port_phy_addr[p->dev], 30, 0x0<<10); */
#else
/* already set up in mpsc.c */
/*GT_REG_WRITE(MAIN_ROUTING_REGISTER, 0x7ffe38); / b400 */
/* already set up in sdram_init.S... */
/* MPSC0, MPSC1, RMII */
/*GT_REG_WRITE(SERIAL_PORT_MULTIPLEX, 0x1102); / f010 */
#endif
GT_REG_WRITE(ETHERNET_PHY_ADDRESS_REGISTER,
ether_port_phy_addr[0] |
(ether_port_phy_addr[1]<<5) |
(ether_port_phy_addr[2]<<10)); /* 2000 */
/* 13:12 - 10: 4x64bit burst (cache line size = 32 bytes)
* 9 - 1: RIFB - interrupt on frame boundaries only
* 6:7 - 00: big endian rx and tx
* 5:2 - 1111: 15 retries */
GT_REG_WRITE(ETHERNET0_SDMA_CONFIGURATION_REGISTER + reg_base,
(2<<12) | (1<<9) | (0xf<<2) ); /* 2440 */
#ifndef USE_SOFTWARE_CACHE_MANAGEMENT
/* enable rx/tx desc/buffer cache snoop */
GT_REG_READ(ETHERNET_0_ADDRESS_CONTROL_LOW + dev*0x20,
&temp); /* f200 */
temp|= (1<<6)| (1<<14)| (1<<22)| (1<<30);
GT_REG_WRITE(ETHERNET_0_ADDRESS_CONTROL_LOW + dev*0x20,
temp);
#endif
/* 31 28 27 24 23 20 19 16
* 0000 0000 0000 0000 [0004]
* 15 12 11 8 7 4 3 0
* 1000 1101 0000 0000 [4d00]
* 20 - 0=MII 1=RMII
* 19 - 0=speed autoneg
* 15:14 - framesize 1536 (GT6426x_ETH_BUF_SIZE)
* 11 - no force link pass
* 10 - 1=disable fctl autoneg
* 8 - override prio ?? */
temp = 0x00004d00;
#ifndef CONFIG_ETHER_PORT_MII
temp |= (1<<20); /* RMII */
#endif
/* set En */
GT_REG_WRITE(ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER + reg_base,
temp); /* 2408 */
/* hardcode E1 also? */
/* -- according to dox, this is safer due to extra pulldowns? */
if (dev<2) {
GT_REG_WRITE(ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER + (dev+1) * 0x400,
temp); /* 2408 */
}
/* wake up MAC */ /* 2400 */
GT_REG_READ(ETHERNET0_PORT_CONFIGURATION_REGISTER + reg_base, &temp);
temp |= (1<<7); /* enable port */
#ifdef CONFIG_GT_USE_MAC_HASH_TABLE
temp |= (1<<12); /* hash size 1/2k */
#else
temp |= 1; /* promisc */
#endif
GT_REG_WRITE(ETHERNET0_PORT_CONFIGURATION_REGISTER + reg_base, temp);
/* 2400 */
#ifdef RESTART_AUTONEG
check_phy_state(p);
#endif
printf("%s: Waiting for link up..\n", wp->name);
temp = 10 * 1000;
/* wait for link back up */
while(!(GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + reg_base) & 8)
&& (--temp > 0)){
udelay(1000); /* wait 1 ms */
}
if ( temp == 0) {
printf("%s: Failed!\n", wp->name);
return (0);
}
printf("%s: OK!\n", wp->name);
p->tdn = 0;
p->rdn = 0;
p->eth_tx_desc[p->tdn].command_status = 0;
/* Initialize Rx Side */
for (temp = 0; temp < NR; temp++) {
p->eth_rx_desc[temp].buff_pointer = (uchar *)p->eth_rx_buffer[temp];
p->eth_rx_desc[temp].buff_size_byte_count = GT6426x_ETH_BUF_SIZE<<16;
/* GT96100 Owner */
p->eth_rx_desc[temp].command_status = 0x80000000;
p->eth_rx_desc[temp].next_desc =
(struct eth0_rx_desc_struct *)
&p->eth_rx_desc[(temp+1)%NR].buff_size_byte_count;
}
FLUSH_DCACHE((unsigned int)&p->eth_tx_desc[0],
(unsigned int)&p->eth_tx_desc[NR]);
FLUSH_DCACHE((unsigned int)&p->eth_rx_desc[0],
(unsigned int)&p->eth_rx_desc[NR]);
GT_REG_WRITE(ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0 + reg_base,
(unsigned int) p->eth_tx_desc);
GT_REG_WRITE(ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 + reg_base,
(unsigned int) p->eth_rx_desc);
GT_REG_WRITE(ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 + reg_base,
(unsigned int) p->eth_rx_desc);
#ifdef DEBUG
printf ("\nRx descriptor pointer is %08x %08x\n",
GTREGREAD(ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 + reg_base),
GTREGREAD(ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 + reg_base));
printf ("\n\n%08x %08x\n",
(unsigned int)p->eth_rx_desc,p->eth_rx_desc[0].command_status);
printf ("Descriptor dump:\n");
printf ("cmd status: %08x\n",p->eth_rx_desc[0].command_status);
printf ("byte_count: %08x\n",p->eth_rx_desc[0].buff_size_byte_count);
printf ("buff_ptr: %08x\n",(unsigned int)p->eth_rx_desc[0].buff_pointer);
printf ("next_desc: %08x\n\n",(unsigned int)p->eth_rx_desc[0].next_desc);
printf ("%08x\n",*(unsigned int *) ((unsigned int)p->eth_rx_desc + 0x0));
printf ("%08x\n",*(unsigned int *) ((unsigned int)p->eth_rx_desc + 0x4));
printf ("%08x\n",*(unsigned int *) ((unsigned int)p->eth_rx_desc + 0x8));
printf ("%08x\n\n",
*(unsigned int *) ((unsigned int)p->eth_rx_desc + 0xc));
#endif
#ifdef DEBUG
gt6426x_dump_mii(bis,ether_port_phy_addr[p->dev]);
#endif
#ifdef CONFIG_GT_USE_MAC_HASH_TABLE
{
unsigned int hashtable_base;
u8 *b = (u8 *)(wp->enetaddr);
u32 macH, macL;
/* twist the MAC up into the way the discovery wants it */
macH= (b[0]<<8) | b[1];
macL= (b[2]<<24) | (b[3]<<16) | (b[4]<<8) | b[5];
/* mode 0, size 0x800 */
hashtable_base =initAddressTable(dev,0,1);
if(!hashtable_base) {
printf("initAddressTable failed\n");
return 0;
}
addAddressTableEntry(dev, macH, macL, 1, 0);
GT_REG_WRITE(ETHERNET0_HASH_TABLE_POINTER_REGISTER + reg_base,
hashtable_base);
}
#endif
/* Start Rx*/
GT_REG_WRITE(ETHERNET0_SDMA_COMMAND_REGISTER + reg_base, 0x00000080);
printf("%s: gt6426x eth device %d init success \n", wp->name, dev );
return 1;
}
