int tcpci_tcpm_init(int port)
{
int rv;
int power_status;
while (1) {
rv = tcpc_read(port, TCPC_REG_POWER_STATUS, &power_status);
/*
* If read succeeds and the uninitialized bit is clear, then
* initalization is complete, clear all alert bits and write
* the initial alert mask.
*/
if (rv == EC_SUCCESS &&
!(power_status & TCPC_REG_POWER_STATUS_UNINIT)) {
tcpc_write16(port, TCPC_REG_ALERT, 0xffff);
/* Initialize power_status_mask */
init_power_status_mask(port);
/* Update VBUS status */
tcpc_vbus[port] = power_status &
TCPC_REG_POWER_STATUS_VBUS_PRES ? 1 : 0;
return init_alert_mask(port);
}
msleep(10);
}
}
int tcpm_init(int port)
{
int rv;
tcpc_init(port);
rv = init_alert_mask(port);
if (rv)
return rv;
return init_power_status_mask(port);
}
int tcpm_init(int port)
{
int rv, err = 0;
while (1) {
rv = i2c_read16(I2C_PORT_TCPC, I2C_ADDR_TCPC(port),
TCPC_REG_ERROR_STATUS, &err);
/*
* If i2c succeeds and the uninitialized bit is clear, then
* initalization is complete, clear all alert bits and write
* the initial alert mask.
*/
if (rv == EC_SUCCESS && !(err & TCPC_REG_ERROR_STATUS_UNINIT)) {
i2c_write16(I2C_PORT_TCPC, I2C_ADDR_TCPC(port),
TCPC_REG_ALERT, 0xff);
return init_alert_mask(port);
}
msleep(10);
}
}
int tcpm_init(int port)
{
tcpc_init(port);
return init_alert_mask(port);
}