int mm_physpage_alloc(int type, int allowblock)
{
mm_phys_page *p;
int flags;
flags = int_disable();
spinlock_grab(&mm_phys_pages_lock);
if(!mm_phys_pages.head)
{
// TODO: implement page stealing
panic("Out of physical memory");
}
p = mm_phys_pages.head;
mm_phys_pages.head = p->next;
p->type = type;
p->refcount = 1;
mm_phys_pages.free_pagecount--;
spinlock_release(&mm_phys_pages_lock);
int_enable(flags);
return p->physaddr;
}
int P1_V(P1_Semaphore sem){
// USLOSS_Console("In P1_V for %s\n",procTable[currPid].name);
Check_Your_Privilege();
// interrupt disable HERE!
int_disable();
Semaphore* semP=(Semaphore*)sem;
// check if the semaphore is valid
if(semP==NULL||semP->valid<0){
USLOSS_Console("Semaphore is invalid\n");
return - 1;
}
semP->value++;
if(currPid!=-1&&semP->queue->nextPCB != NULL){
// USLOSS_Console("In P1_V for %s\n",procTable[currPid].name);
int PID=semP->queue->nextPCB->PID;
// USLOSS_Console("P1_V Pid: %d",PID);
//Move first frocess from procQueue to ready queue
// if(procTable[PID].state == 4){
procTable[PID].state = 1; // ready status
procTable[currPid].waitingOnDevice=0;
//removeToProcQue(currPid,*semP);
removeFromList(PID);
addToReadyList(PID);
// USLOSS_Console("ReadyList after P1_V for %s: ",procTable[PID].name);
// printList(&readyHead);
dispatcher();
// }
}
int_enable();
// interrupt enable HERE!
return 0;
}
static void cpu_porta_install(void)
{
uint32_t i;
DEV_GPIO_PTR port_ptr = &cpu_port_a;
DEV_GPIO_INFO_PTR info_ptr = &(cpu_port_a.gpio_info);
DW_GPIO_PORT_PTR dw_port_ptr = &(cpu_dw_gpio_port_a);
info_ptr->gpio_ctrl = (void *)dw_port_ptr;
info_ptr->opn_cnt = 0;
info_ptr->method = 0;
info_ptr->direction = 0;
info_ptr->extra = 0;
dw_port_ptr->no = DW_GPIO_PORT_A;
dw_port_ptr->regs = (DW_GPIO_REG_PTR)(HSDC_GPIO_REGBASE);
dw_port_ptr->valid_bit_mask = HSDK_CPU_GPIO_A_VALID_MASK;
dw_port_ptr->intno = DW_GPIO_INVALID_INTNO; /* pass invalid interrupt number */
dw_port_ptr->int_handler = cpu_porta_isr;
for (i=0; i < cpu_dw_gpio_bit_isr_a.int_bit_max_cnt; i++) {
int_handler_install(HSDC_GPIO0_ISR + i, cpu_porta_isr);
int_disable(HSDC_GPIO0_ISR + i);
cpu_dw_gpio_bit_isr_a.int_bit_handler_ptr[i] = NULL;
}
dw_port_ptr->gpio_bit_isr = &cpu_dw_gpio_bit_isr_a;
port_ptr->gpio_open = cpu_porta_open;
port_ptr->gpio_close = cpu_porta_close;
port_ptr->gpio_control = cpu_porta_control;
port_ptr->gpio_write = cpu_porta_write;
port_ptr->gpio_read = cpu_porta_read;
}
static int32_t cpu_porta_control(uint32_t ctrl_cmd, void *param)
{
uint32_t val32;
uint32_t i;
switch (ctrl_cmd) {
case GPIO_CMD_ENA_BIT_INT:
val32 = (uint32_t)param;
for (i = 0; i < cpu_dw_gpio_bit_isr_a.int_bit_max_cnt; i ++) {
if ((1<<i) & val32) {
int_enable(HSDC_GPIO0_ISR + i);
}
}
break;
case GPIO_CMD_DIS_BIT_INT:
val32 = (uint32_t)param;
for (i = 0; i < cpu_dw_gpio_bit_isr_a.int_bit_max_cnt; i ++) {
if ((1<<i) & val32) {
int_disable(HSDC_GPIO0_ISR + i);
}
}
break;
default:
break;
}
return dw_gpio_control(&cpu_port_a, ctrl_cmd, param);
}
int level_return(int newlevel)
{
int flags;
int oldlevel;
// locking
flags = int_disable();
// we don't need locking (spinlocks etc) here - see above
oldlevel = cpu_levels[smp_cpu_id()];
// error checking
if(newlevel > oldlevel)
panic("attempting to raise CPU level with level_return");
// set the new level
cpu_levels[smp_cpu_id()] = newlevel;
// restore flags
if(newlevel < LEVEL_NOINTS)
{
if(oldlevel == LEVEL_NOINTS)
int_enable(cpu_int_restore_flags[smp_cpu_id()]);
else
int_enable(flags);
}
// done
return oldlevel;
}
uint32_t mb_tacho_get_duration( void ) {
int_disable();
uint32_t my_duration = 0;
if (got_one_pulse) {
my_duration = mb_tacho_duration;
}
got_one_pulse = FALSE;
mcu_int_enable();
return my_duration;
}
static void
rtc_alarm_update()
{
if (alarm_head) {
int_enable(IRQ_RTC_alarm);
RTC.tar = alarm_head->time;
} else {
int_disable(IRQ_RTC_alarm);
}
}
/* ----------------------------------------------------------------------------*/
static void prvSetupTimerInterrupt(void)
{
unsigned int cyc = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
int_disable(BOARD_OS_TIMER_INTNO); /* disable os timer interrupt */
timer_stop(BOARD_OS_TIMER_ID);
timer_start(BOARD_OS_TIMER_ID, TIMER_CTRL_IE | TIMER_CTRL_NH, cyc);
int_handler_install(BOARD_OS_TIMER_INTNO, (INT_HANDLER)vKernelTick);
int_enable(BOARD_OS_TIMER_INTNO);
}
/***********************************************************************
*
* Function: term_dat_out_len
*
* Purpose: Send a number of characters on the terminal interface
*
* Processing:
* Move data into the UART ring buffer.
*
* Parameters:
* dat : Data to send
* chars : Number of bytes to send
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: Will block until all bytes are sent.
*
**********************************************************************/
void term_dat_out_len(UNS_8 *dat,
int chars)
{
while (chars > 0) {
if (txsize < 512)
{
txbuff[txfill] = *dat;
txfill++;
if (txfill >= 512) {
txfill = 0;
}
dat++;
chars--;
int_disable(IRQ_UART_IIR5);
txsize++;
int_enable(IRQ_UART_IIR5);
}
int_disable(IRQ_UART_IIR5);
term_dat_send_cb();
int_enable(IRQ_UART_IIR5);
}
}
int rt_hw_timer_init(void)
{
unsigned int cyc = BOARD_CPU_CLOCK / RT_TICK_PER_SECOND;
int_disable(BOARD_OS_TIMER_INTNO); /* disable os timer interrupt */
arc_timer_stop(BOARD_OS_TIMER_ID);
arc_timer_start(BOARD_OS_TIMER_ID, TIMER_CTRL_IE | TIMER_CTRL_NH, cyc);
int_handler_install(BOARD_OS_TIMER_INTNO, (INT_HANDLER)rt_hw_timer_isr);
int_enable(BOARD_OS_TIMER_INTNO);
return 0;
}
/**
* \brief disable designware spi interrupt
* \param spi_info_ptr spi information structure pointer
*/
static void dw_spi_disable_interrupt(DEV_SPI_INFO *spi_info_ptr)
{
DW_SPI_CTRL *spi_ctrl_ptr = (DW_SPI_CTRL *)(spi_info_ptr->spi_ctrl);
/** disable spi send&receive interrupt after disable spi interrupt */
dw_spi_dis_cbr(spi_info_ptr, DW_SPI_RDY_SND);
dw_spi_dis_cbr(spi_info_ptr, DW_SPI_RDY_RCV);
dw_spi_dis_cbr(spi_info_ptr, DW_SPI_RDY_XFER);
/* disable spi interrupt */
dw_spi_mask_interrupt(spi_ctrl_ptr->dw_spi_regs, DW_SPI_IMR_XFER);
spi_info_ptr->status &= ~DW_SPI_IN_XFER;
if (spi_ctrl_ptr->intno != DW_SPI_INVALID_INTNO) {
int_disable(spi_ctrl_ptr->intno);
}
spi_ctrl_ptr->int_status &= ~(DW_SPI_GINT_ENABLE);
}
/***********************************************************************
*
* Function: tsc_read_ring
*
* Purpose: Reads data from the TSC ring buffer
*
* Processing:
* If the init flag for the TSC structure is FALSE, return 0 to
* the caller. Otherwise, save the state of the TSC interrupts and
* disable the TSC interrupts. Loop until max_bytes equals 0 or
* until the receive ring buffer is empty, whichever comes
* first. Read the data from the ring buffer indexed by the tail
* pointer and place it into the user buffer. Increment the tail
* pointer and user buffer pointer. If the tail pointer exceeds the
* buffer size, set the tail pointer to 0. Increment bytes, and
* decrement max_bytes. Exit the loop based on the loop conditions,
* re-enable the receive interrupts, and return the number of bytes
* read to the caller.
*
* Parameters:
* devid: Pointer to an TSC configuration structure
* buffer: Pointer to data buffer to copy to
* max_bytes: Number of bytes to read
*
* Outputs: None
*
* Returns: The number of bytes actually read from the ring buffer
*
* Notes: None
*
**********************************************************************/
INT_32 tsc_read_ring(INT_32 devid,
void *buffer,
INT_32 max_bytes)
{
TSC_CFG_T *tsccfgptr = (TSC_CFG_T *) devid;
INT_32 bytes = 0;
UNS_16 *data = (UNS_16 *) buffer;
if (tsccfgptr->init == TRUE)
{
/* Temporarily lock out TSC interrupts during this
read so the TSC receive interrupt won't cause problems
with the ring buffer index values */
int_disable(IRQ_TS_IRQ);
/* Loop until receive ring buffer is empty or until max_bytes
expires */
while ((max_bytes > 0) &&
(tsccfgptr->rx_tail != tsccfgptr->rx_head))
{
/* Read data from ring buffer into user buffer */
*data = tsccfgptr->rx[tsccfgptr->rx_tail];
data++;
/* Update tail pointer */
tsccfgptr->rx_tail++;
/* Make sure tail didn't overflow */
if (tsccfgptr->rx_tail >= TSC_RING_BUFSIZE)
{
tsccfgptr->rx_tail = 0;
}
/* Increment data count and decrement buffer size count */
bytes = bytes + 2;
max_bytes = max_bytes - 2;
}
/* Re-enable TSC receive interrupt(s) */
int_enable(IRQ_TS_IRQ);
}
return bytes;
}
int level_go(int newlevel)
{
int oldlevel;
int flags;
// we can't take an interrupt in this routine
flags = int_disable();
// because level is per-CPU, as long as ints are disabled we don't need
// locking
oldlevel = cpu_levels[smp_cpu_id()];
// error checking
if(newlevel < oldlevel)
{
void vid_puts_internal(char *s);
char buf[2];
buf[1] = 0;
buf[0] = '\n';
vid_puts_internal(buf);
buf[0] = '0' + oldlevel;
vid_puts_internal(buf);
buf[0] = '0' + newlevel;
vid_puts_internal(buf);
buf[0] = '\n';
vid_puts_internal(buf);
vid_puthex((int)__builtin_return_address(0));
panic("\nattempting to lower CPU level without going through level_return");
}
// save flags (with previous interrupt bit state) if we're going to level
// NOINTS
if(newlevel == LEVEL_NOINTS && oldlevel != LEVEL_NOINTS)
cpu_int_restore_flags[smp_cpu_id()] = flags;
// now set the new level
cpu_levels[smp_cpu_id()] = newlevel;
// if we're not at level NOINTS, restore interrupt flag
if(newlevel != LEVEL_NOINTS)
int_enable(flags);
return oldlevel;
}
/* panic in the style of a nokinan machine basic error response printer */
void berp( const char *message, const char *file, uint32_t line )
{
int_disable();
/* fall back to text mode */
mode_3h.setmode();
mode_3h.clear();
mode_3h.setpal(&alicepal[0]);
setfont(&biosfnt[0]);
mode_3h.fbsetcursor(0,0);
/* PANIC HARD */
mode_3h.fbsetattr(APAL_LIGHTGREEN,APAL_BLACK,EXATTR_NOSCR);
mode_3h.fbprintf("BERP\n\\%s [%s,%u]\n",message,file,line);
printk("\033[0;5;31mERR INST %s,%u (%s) BERP\033[0m\n",
file,line,message);
/* stahp */
khalt(EXIT_BERP);
}
P1_Semaphore P1_SemCreate(unsigned int value){
int_disable();
P1_Semaphore semPointer;
//Semaphore *semi = malloc(sizeof(Semaphore));
// put the semaphore in the table
int i = 0;
while(semTable[i].value != -1 && i < P1_MAXSEM){
i++;
}
semTable[i].value = value;
semTable[i].valid = i;
semTable[i].queue->nextPCB = NULL;
semTable[i].queue->prevPCB = NULL;
semPointer = &semTable[i];
int_enable();
return semPointer;
}
/***********************************************************************
*
* Function: sd1_dmatx_interrupt
*
* Purpose: DMA specific SD card data write interrupt handler
*
* Processing:
* See function.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: None
*
**********************************************************************/
static void sd1_dmatx_interrupt(void)
{
UNS_32 dint;
BOOL_32 done = FALSE;
/* A data interrupt was received */
dint = sdcarddat.regptr->sd_status;
/* Has data transfer completed? */
if ((dint & SD_DATA_END) != 0)
{
done = TRUE;
}
/* Has a data error occurred? */
if ((dint & (SD_FIFO_TXDATA_UFLOW | SD_DATA_TIMEOUT |
SD_DATA_CRC_FAIL)) != 0)
{
done = TRUE;
}
if (done == TRUE)
{
int_disable(IRQ_SD1);
sdcarddat.regptr->sd_dctrl &= ~SD_DATATRANSFER_EN;
sdcarddat.regptr->sd_mask1 = 0;
sdcarddat.dctrl.resp.data_status = dint;
if (sdcarddat.sd1_cb != NULL)
{
sdcarddat.sd1_cb();
}
/* Disable DMA */
sdcarddat.dmact.pdmaregs->sync &= ~DMA_PER_SDCARD;
sdcarddat.dmact.pdmaregs->dma_chan [sdcarddat.
dmact.dmach].config_ch &=
~DMAC_CHAN_ENABLE;
}
/* Clear checked statuses */
sdcarddat.regptr->sd_clear = dint;
}
void BIOSCALL int70_function(pusha_regs_t regs, uint16_t ds, uint16_t es, iret_addr_t iret_addr)
{
// INT 70h: IRQ 8 - CMOS RTC interrupt from periodic or alarm modes
uint8_t registerB = 0, registerC = 0;
// Check which modes are enabled and have occurred.
registerB = inb_cmos( 0xB );
registerC = inb_cmos( 0xC );
if( ( registerB & 0x60 ) != 0 ) {
if( ( registerC & 0x20 ) != 0 ) {
// Handle Alarm Interrupt.
int_enable();
call_int_4a();
int_disable();
}
if( ( registerC & 0x40 ) != 0 ) {
// Handle Periodic Interrupt.
if( read_byte( 0x40, 0xA0 ) != 0 ) {
// Wait Interval (Int 15, AH=83) active.
uint32_t time;
time = read_dword( 0x40, 0x9C ); // Time left in microseconds.
if( time < 0x3D1 ) {
// Done waiting.
uint16_t segment, offset;
segment = read_word( 0x40, 0x98 );
offset = read_word( 0x40, 0x9A );
write_byte( 0x40, 0xA0, 0 ); // Turn of status byte.
outb_cmos( 0xB, registerB & 0x37 ); // Clear the Periodic Interrupt.
write_byte( segment, offset, read_byte(segment, offset) | 0x80 ); // Write to specified flag byte.
} else {
// Continue waiting.
time -= 0x3D1;
write_dword( 0x40, 0x9C, time );
}
}
}
}
eoi_both_pics();
}
int P1_P(P1_Semaphore sem){
Check_Your_Privilege();
Semaphore* semP=(Semaphore*)sem;
if(semP->valid>Clock_Sema&&semP->valid<MMU_Sema){
// USLOSS_Console("In P1_P for %d,Sem Table Pos: %d\n",currPid,semP->valid);
procTable[currPid].waitingOnDevice=1;
}
// check if the process is killed
if(procTable[currPid].state == 2){
return -2;
}
// check if the semaphore is valid
if(semP==NULL||semP->valid<0){
USLOSS_Console("Semaphore is invalid\n");
return - 1;
}
// move process from ready queueu to semaphore->procQue
// USLOSS_Console("In P1_P for %d\n",currPid);
while(1){
int_disable();
if(semP->value > 0){
semP->value--;
break;
}
if(currPid!=-1){
procTable[currPid].state = 4; // waiting status
// USLOSS_Console("CurrPid %d has state=%d\n",currPid,procTable[currPid].state);
removeFromList(currPid);
addToProcQue(currPid,*semP);
dispatcher();
}
int_enable();
// USLOSS_Console("In P1_P for %d\n",currPid);
}
int_enable();
// USLOSS_Console("Exiting P1_P for %d\n",currPid);
//interrupt enable
return 0;
}
/* ------------------------------------------------------------------------
Name - dispatcher
Purpose - runs the highest priority runnable process
Parameters - none
Returns - nothing
Side Effects - runs a process
----------------------------------------------------------------------- */
void dispatcher()
{
Check_Your_Privilege();
int_disable();
// USLOSS_Console("dispatcher Called, ready List: ");
// printList(&readyHead);
/*Adjust Runttime for current process*/
int timeRun;
if (procTable[currPid].lastStartedTime==FIRST_RUN) {
timeRun=0;
}else{
timeRun=USLOSS_Clock()-procTable[currPid].lastStartedTime;
}
procTable[currPid].cpuTime+=timeRun;
/*
* Run the highest priority runnable process. There is guaranteed to be one
* because the sentinel is always runnable.
*/
// USLOSS_Console("In dispatcher PID -- before: %d\n", currPid);
int oldpid = currPid;
PCB* readyListPos=&readyHead;
// USLOSS_Console("dispatcher Check point 1\n");
readyListPos->nextPCB->state=0;//set state to running
/*Set Proc state to ready unless it has quit or been killed*/
if(procTable[oldpid].state==0){
procTable[oldpid].state=1;
}
// USLOSS_Console("dispatcher Check point 2\n");
currPid = readyListPos->nextPCB->PID;
procTable[currPid].lastStartedTime=USLOSS_Clock();
// USLOSS_Console("dispatcher Check point 3\n");
/*Adds currpid to end of its priority section in the Rdy list*/
removeFromList(currPid);
addToReadyList(currPid);
/*Reenable Interrupts*/
int_enable();
// USLOSS_Console("In dispatcher switching to PID: %d\n", currPid);
USLOSS_ContextSwitch(&(procTable[oldpid]).context, &(readyListPos->nextPCB->context));
}
/***********************************************************************
*
* Function: term_dat_in
*
* Purpose: Read some data from the terminal interface
*
* Processing:
* Move data from the ring buffer to the passed buffer.
*
* Parameters:
* buff : Where to place the data
* bytes : Number of bytes to read
*
* Outputs: None
*
* Returns: Number of bytes actually read
*
* Notes: None
*
**********************************************************************/
int term_dat_in(UNS_8 *buff,
int bytes) {
int bread = 0;
while ((bytes > 0) && (rxsize > 0)) {
*buff = rxbuff[rxget];
buff++;
rxget++;
if (rxget >= 512) {
rxget = 0;
}
bytes--;
bread++;
int_disable(IRQ_UART_IIR5);
rxsize--;
int_enable(IRQ_UART_IIR5);
}
return bread;
}
/** ESC interrupt disable function by the Slave stack in IRQ mode.
*
* @param[in] mask = interrupts to disable
*/
void ESC_interrupt_disable (uint32_t mask)
{
if(ESCREG_ALEVENT_DC_SYNC0 & mask)
{
mask &= ~ESCREG_ALEVENT_DC_SYNC0;
int_disable(cfg.irq);
}
if(ESCREG_ALEVENT_DC_SYNC1 & mask)
{
mask &= ~ESCREG_ALEVENT_DC_SYNC1;
UASSERT(0,EARG);
}
if(ESCREG_ALEVENT_DC_LATCH & mask)
{
mask &= ~ESCREG_ALEVENT_DC_LATCH;
UASSERT(0,EARG);
}
ecat0->AL_EVENT_MASK &= ~mask;
}
void keyboard_init(void)
{
if (int_enabled()) int_disable();
cons_printf("Initialize keyboard ............");
x86_ps2_init();
/* Start out with no shift keys enabled. */
s_shiftstate = 0;
/* Buffer is initially empty. */
s_queue_head = s_queue_tail = 0;
/* Install interrupt handler */
irq_install_handler(KEYB_IRQ, &keyboard_int_handler);
irq_enable(KEYB_IRQ);
int_enable();
g_preemption = true;
cons_printf(".... [OK]\n");
}
bool_t i2c_submit(struct i2c_periph* p, struct i2c_transaction* t) {
uint8_t idx;
idx = p->trans_insert_idx + 1;
if (idx >= I2C_TRANSACTION_QUEUE_LEN) idx = 0;
if (idx == p->trans_extract_idx) {
t->status = I2CTransFailed;
return FALSE; /* queue full */
}
t->status = I2CTransPending;
int_disable();
p->trans[p->trans_insert_idx] = t;
p->trans_insert_idx = idx;
/* if peripheral is idle, start the transaction */
if (p->status == I2CIdle)
I2cSendStart(p);
/* else it will be started by the interrupt handler */
/* when the previous transactions completes */
int_enable();
return TRUE;
}
float mb_tacho_get_averaged( void ) {
int_disable();
float ret;
float tacho;
const float tach_to_rpm = 15000000.*60./(float)MB_TACHO_NB_SLOT;
if (mb_tacho_nb_pulse)
tacho = mb_tacho_averaged / (float)mb_tacho_nb_pulse ;
else
tacho = 0.;
if (tacho ==0)
ret = 0;
else
ret = tach_to_rpm/tacho;
mb_tacho_averaged = 0.;
mb_tacho_nb_pulse = 0;
mcu_int_enable();
return ret;
}
int main() {
// Configure ISRs
int_init();
int_add(29, (void *) int_time_cmp, 0);
int_enable();
EER = 0xF0000000; // enable all timer events;
IER = 0xF0000000; // enable all timer interrupts
/* Setup Timer A */
TOCRA = 0x80;
TPRA = 0x3F; // set prescaler, enable interrupts and start timer.
while (timer_triggered < 5) {
printf("Loop Counter: %d\n", timer_triggered);
sleep();
}
set_gpio_pin_value(0, 0);
int_disable();
print_summary(0);
return 0;
}
void mm_physpage_free(int page)
{
mm_phys_page *p;
int flags;
p = &(mm_phys_pages.pages[page]);
if(atomic_sub(&(p->refcount),1) > 0)
return;
flags = int_disable();
spinlock_grab(&mm_phys_pages_lock);
p->next = mm_phys_pages.head;
mm_phys_pages.head = p;
mm_phys_pages.free_pagecount++;
p->type = PHYSPAGE_FREE;
p->refcount = 0;
spinlock_release(&mm_phys_pages_lock);
int_enable(flags);
}
/**
* \brief disable designware spi send or receive interrupt
* \param[in] DEV_SPI_INFO *spi_info_ptr
* \param[in] cbrtn control code of callback routine of send or receive
*/
static int32_t dw_spi_dis_cbr(DEV_SPI_INFO *spi_info_ptr, uint32_t cbrtn)
{
DW_SPI_CTRL *spi_ctrl_ptr = (DW_SPI_CTRL *)(spi_info_ptr->spi_ctrl);
int32_t ercd = E_OK;
if ((spi_info_ptr->status & DW_SPI_IN_XFER) != 0) { /* only in transfer need do check */
switch (cbrtn) {
case DW_SPI_RDY_SND:
DW_SPI_CHECK_EXP((spi_info_ptr->status & DW_SPI_IN_XFER) == DW_SPI_IN_TX, E_CTX);
spi_info_ptr->status &= ~(DW_SPI_IN_TX);
break;
case DW_SPI_RDY_RCV:
DW_SPI_CHECK_EXP((spi_info_ptr->status & DW_SPI_IN_XFER) == DW_SPI_IN_RX, E_CTX);
spi_info_ptr->status &= ~(DW_SPI_IN_RX);
break;
case DW_SPI_RDY_XFER:
DW_SPI_CHECK_EXP((spi_info_ptr->status & DW_SPI_IN_XFER) == DW_SPI_IN_XFER, E_CTX);
spi_info_ptr->status &= ~(DW_SPI_IN_XFER);
break;
default:
break;
}
}
dw_spi_mask_interrupt(spi_ctrl_ptr->dw_spi_regs, DW_SPI_IMR_XFER);
if (spi_ctrl_ptr->int_status & DW_SPI_GINT_ENABLE) {
if (spi_ctrl_ptr->intno != DW_SPI_INVALID_INTNO) {
int_disable(spi_ctrl_ptr->intno);
}
spi_ctrl_ptr->int_status &= ~DW_SPI_GINT_ENABLE;
}
error_exit:
return ercd;
}
/***********************************************************************
*
* Function: term_deinit
*
* Purpose: Shutdown terminal I/O
*
* Processing:
* Close the serial port through the UART driver.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: None
*
**********************************************************************/
void term_deinit(void) {
int_disable(IRQ_UART_IIR5);
uart_close(uartdev);
}
/***********************************************************************
*
* Function: c_entry
*
* Purpose: Application entry point from the startup code
*
* Processing:
* See function.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Always returns 1, or <0 on an error
*
* Notes: None
*
**********************************************************************/
int c_entry(void)
{
SWIM_WINDOW_T win1;
COLOR_T *fblog;
INT_32 lcddev;
/* Disable interrupts in ARM core */
disable_irq_fiq();
/* Setup miscellaneous board functions */
phy3250_board_init();
/* Set virtual address of MMU table */
cp15_set_vmmu_addr((void *)
(IRAM_BASE + (256 * 1024) - (16 * 1024)));
/* Initialize interrupt system */
int_initialize(0xFFFFFFFF);
/* Install standard IRQ dispatcher at ARM IRQ vector */
int_install_arm_vec_handler(IRQ_VEC, (PFV) lpc32xx_irq_handler);
/* Install RTC interrupt handler as a IRQ interrupts */
int_install_irq_handler(IRQ_RTC, (PFV) rtc_user_interrupt);
/* Open RTC */
rtcdev = rtc_open(RTC, 0);
if (rtcdev == 0)
{
/* Error */
return -1;
}
/* Set a 1s match rate */
secs = lsecs = 0;
mstp.match_num = 0;
mstp.use_match_int = TRUE;
mstp.enable_onsw = FALSE;
mstp.match_tick_val = secs + 1;
rtc_ioctl(rtcdev, RTC_ENABLE, 0);
rtc_ioctl(rtcdev, RTC_SET_COUNT, 0);
rtc_ioctl(rtcdev, RTC_CLEAR_INTS, RTC_MATCH0_INT_STS);
rtc_ioctl(rtcdev, RTC_SETUP_MATCH, (INT_32) &mstp);
/* Setup LCD muxing for STN Color 16BPP */
clkpwr_setup_lcd(CLKPWR_LCDMUX_TFT16, 1);
/* Enable clock to LCD block (HCLK_EN)*/
clkpwr_clk_en_dis(CLKPWR_LCD_CLK, 1);
/* Setup LCD paramaters in the LCD controller */
lcddev = lcd_open(CLCDC, (INT_32) & LCD_DISPLAY);
/* Upper Panel Frame Base Address register */
lcd_ioctl(lcddev, LCD_SET_UP_FB, PHY_LCD_FRAME_BUF);
/* Enable LCD controller and power signals */
lcd_ioctl(lcddev, LCD_PWENABLE, 1);
/* Enable LCD backlight */
phy3250_lcd_backlight_enable(TRUE);
/* Enable LCD power */
phy3250_lcd_power_enable(TRUE);
/* Set frame buffer address */
fblog = (COLOR_T *) cp15_map_physical_to_virtual(PHY_LCD_FRAME_BUF);
/* Create a SWIM window */
swim_window_open(&win1, LCD_DISPLAY.pixels_per_line,
LCD_DISPLAY.lines_per_panel, fblog, 0, 0,
(LCD_DISPLAY.pixels_per_line - 1), (LCD_DISPLAY.lines_per_panel - 1),
1, WHITE, BLACK, BLACK);
swim_put_ltext(&win1, "RTC example: This example will print the message "
"TICK whenever an RTC interrupt occurs (1 second intervals). It will "
"quit after 10 seconds\n");
/* Enable RTC (starts counting) */
rtc_ioctl(rtcdev, RTC_ENABLE, 1);
/* Enable RTC interrupt in the interrupt controller */
int_enable(IRQ_RTC);
/* Enable IRQ interrupts in the ARM core */
enable_irq();
/* Loop for 10 seconds and let interrupts toggle the LEDs */
while (secs < 10)
{
if (lsecs < secs)
{
swim_put_ltext(&win1, "TICK\n");
lsecs = secs;
}
}
/* Disable RTC interrupt in the interrupt controller */
int_disable(IRQ_RTC);
/* Disable interrupts in ARM core */
disable_irq_fiq();
/* Prior to closing the RTC, the ONSW key value is set. This will
allow the RTC to keep it's value across resets as long as RTC
power is maintained */
rtc_ioctl(rtcdev, RTC_SETCLR_KEY, 1);
/* Close RTC and LCD */
rtc_close(rtcdev);
lcd_close(lcddev);
return 1;
}
/***********************************************************************
*
* Function: c_entry
*
* Purpose: Application entry point from the startup code
*
* Processing:
* See function.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Always returns 1, or <0 on an error
*
* Notes: None
*
**********************************************************************/
int c_entry(void)
{
MST_MATCH_SETUP_T mstp;
/* Disable interrupts in ARM core */
disable_irq_fiq();
/* Set virtual address of MMU table */
cp15_set_vmmu_addr((void *)
(IRAM_BASE + (256 * 1024) - (16 * 1024)));
/* Initialize interrupt system */
int_initialize(0xFFFFFFFF);
/* Install standard IRQ dispatcher at ARM IRQ vector */
int_install_arm_vec_handler(IRQ_VEC, (PFV) lpc32xx_irq_handler);
/* Install mstimer interrupts handlers as a IRQ interrupts */
int_install_irq_handler(IRQ_MSTIMER, (PFV) mstimer_user_interrupt);
/* Open mstimer */
mstimerdev = mstimer_open(MSTIMER, 0);
if (mstimerdev == 0)
{
/* Error */
return -1;
}
/* Set a 10mS match rate */
mstp.timer_num = 0;
mstp.use_int = TRUE;
mstp.stop_on_match = FALSE;
mstp.reset_on_match = TRUE;
mstp.tick_val = 0;
mstp.ms_val = MSTICKRATE;
mstimer_ioctl(mstimerdev, MST_CLEAR_INT, 0);
mstimer_ioctl(mstimerdev, MST_TMR_SETUP_MATCH, (INT_32) &mstp);
/* Reset terminal count */
mstimer_ioctl(mstimerdev, MST_TMR_RESET, 0);
/* Enable mstimer (starts counting) */
msecs = 0;
mstimer_ioctl(mstimerdev, MST_TMR_ENABLE, 1);
/* Enable mstimer interrupts in the interrupt controller */
int_enable(IRQ_MSTIMER);
/* Enable IRQ interrupts in the ARM core */
enable_irq();
/* Loop for 10 seconds and let interrupts toggle the LEDs */
while (msecs < MSTIMEOUT);
/* Disable mstimer interrupts in the interrupt controller */
int_disable(IRQ_MSTIMER);
/* Disable interrupts in ARM core */
disable_irq_fiq();
/* Close mstimer */
mstimer_close(mstimerdev);
return 1;
}
