struct intel_region * intel_region_alloc_for_handle(struct intel_screen *screen, GLuint cpp, GLuint width, GLuint height, GLuint pitch, GLuint handle, const char *name) { struct intel_region *region; drm_intel_bo *buffer; int ret; uint32_t bit_6_swizzle, tiling; buffer = intel_bo_gem_create_from_name(screen->bufmgr, name, handle); if (buffer == NULL) return NULL; ret = drm_intel_bo_get_tiling(buffer, &tiling, &bit_6_swizzle); if (ret != 0) { fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", handle, name, strerror(-ret)); drm_intel_bo_unreference(buffer); return NULL; } region = intel_region_alloc_internal(screen, cpp, width, height, pitch, tiling, buffer); if (region == NULL) { drm_intel_bo_unreference(buffer); return NULL; } region->name = handle; return region; }
struct intel_region * intel_region_alloc_for_handle(struct intel_context *intel, GLuint cpp, GLuint width, GLuint height, GLuint pitch, GLuint handle, const char *name) { struct intel_region *region; dri_bo *buffer; int ret; buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle); region = intel_region_alloc_internal(intel, cpp, width, height, pitch, buffer); if (region == NULL) return region; ret = dri_bo_get_tiling(region->buffer, ®ion->tiling, ®ion->bit_6_swizzle); if (ret != 0) { fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", handle, name, strerror(-ret)); intel_region_release(®ion); return NULL; } return region; }
LOCAL dri_bo* intel_driver_share_buffer(intel_driver_t *driver, const char *sname, uint32_t name) { assert(!driver->master); dri_bo *bo = intel_bo_gem_create_from_name(driver->bufmgr, sname, name); return bo; }
static struct intel_region * intel_recreate_static(struct intel_context *intel, const char *name, struct intel_region *region, intelRegion *region_desc) { intelScreenPrivate *intelScreen = intel->intelScreen; int ret; if (region == NULL) { region = calloc(sizeof(*region), 1); region->refcount = 1; } if (intel->ctx.Visual.rgbBits == 24) region->cpp = 4; else region->cpp = intel->ctx.Visual.rgbBits / 8; region->pitch = intelScreen->pitch; region->width = intelScreen->width; region->height = intelScreen->height; if (region->buffer != NULL) { dri_bo_unreference(region->buffer); region->buffer = NULL; } if (intel->ttm) { assert(region_desc->bo_handle != -1); region->buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, region_desc->bo_handle); ret = dri_bo_get_tiling(region->buffer, ®ion->tiling, ®ion->bit_6_swizzle); if (ret != 0) { fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", region_desc->bo_handle, name, strerror(-ret)); intel_region_release(®ion); return NULL; } } else { if (region->classic_map != NULL) { drmUnmap(region->classic_map, region->pitch * region->cpp * region->height); region->classic_map = NULL; } ret = drmMap(intel->driFd, region_desc->handle, region->pitch * region->cpp * region->height, ®ion->classic_map); if (ret != 0) { fprintf(stderr, "Failed to drmMap %s buffer\n", name); free(region); return NULL; } region->buffer = intel_bo_fake_alloc_static(intel->bufmgr, name, region_desc->offset, region->pitch * region->cpp * region->height, region->classic_map); /* The sarea just gives us a boolean for whether it's tiled or not, * instead of which tiling mode it is. Guess. */ if (region_desc->tiled) { if (IS_965(intel->intelScreen->deviceID) && region_desc == &intelScreen->depth) region->tiling = I915_TILING_Y; else region->tiling = I915_TILING_X; } else { region->tiling = I915_TILING_NONE; } region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE; } assert(region->buffer != NULL); return region; }