void LIR_Assembler::emit_op2(LIR_Op2* op) {
    switch (op->code()) {
    case lir_cmp:
        if (op->info() != NULL) {
            assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
                   "shouldn't be codeemitinfo for non-address operands");
            add_debug_info_for_null_check_here(op->info()); // exception possible
        }
        comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
        break;

    case lir_cmp_l2i:
    case lir_cmp_fd2i:
    case lir_ucmp_fd2i:
        comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
        break;

    case lir_cmove:
        cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
        break;

    case lir_shl:
    case lir_shr:
    case lir_ushr:
        if (op->in_opr2()->is_constant()) {
            shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
        } else {
            shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
        }
        break;

    case lir_add:
    case lir_sub:
    case lir_mul:
    case lir_mul_strictfp:
    case lir_div:
    case lir_div_strictfp:
    case lir_rem:
        assert(op->fpu_pop_count() < 2, "");
        arith_op(
            op->code(),
            op->in_opr1(),
            op->in_opr2(),
            op->result_opr(),
            op->info(),
            op->fpu_pop_count() == 1);
        break;

    case lir_abs:
    case lir_sqrt:
    case lir_sin:
    case lir_tan:
    case lir_cos:
    case lir_log10:
        intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
        break;

    case lir_logic_and:
    case lir_logic_or:
    case lir_logic_xor:
        logic_op(
            op->code(),
            op->in_opr1(),
            op->in_opr2(),
            op->result_opr());
        break;

    case lir_throw:
        throw_op(op->in_opr1(), op->in_opr2(), op->info());
        break;

    case lir_xadd:
    case lir_xchg:
        atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
        break;

    default:
        Unimplemented();
        break;
    }
}
void LIR_Assembler::emit_op2(LIR_Op2* op) {
  switch (op->code()) {
    case lir_cmp:
      comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
      break;
    
    case lir_cmp_l2i:
    case lir_cmp_fd2i:
    case lir_ucmp_fd2i:
      comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
      break;

    case lir_cmove:
cmove(op->condition(),op->in_opr1(),op->in_opr2(),op->tmp_opr(),op->result_opr());
      break;

    case lir_shl:
    case lir_shr:
    case lir_ushr:
      if (op->in_opr2()->is_constant()) {
        shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
      } else {
        shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp_opr());
      }
      break;

    case lir_add:
    case lir_sub:
    case lir_mul:
    case lir_mul_strictfp:
    case lir_div:
    case lir_div_strictfp:
    case lir_rem:
      arith_op(
        op->code(),
        op->in_opr1(),
        op->in_opr2(),
        op->result_opr(),
op->info());
      break;
    
    case lir_abs:
    case lir_sqrt:
    case lir_sin:
    case lir_tan:
    case lir_cos:
    case lir_log:
    case lir_log10:
      intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
      break;

    case lir_logic_and:
    case lir_logic_or:
    case lir_logic_xor:
      logic_op(
        op->code(),
        op->in_opr1(),
        op->in_opr2(),
        op->result_opr());
      break;

    case lir_throw:
    case lir_unwind:
throw_op(op->in_opr2(),op->in_opr1(),op->info(),op->code()==lir_unwind);
      break;

    default:
      Unimplemented();
      break;
  }
}