void deinit_hardware(void)
{
// Restore MPU to default state (enabled)
MPU->CESR |= (uint32_t)MPU_CESR_VLD_MASK;
// Restore configuration for Secondary I2C slave address section pin
#if BL_FEATURE_SECONDARY_I2C_SLAVE_ADDRESS
secondary_i2c_slave_address_select_pin_deinit();
#endif // BL_FEATURE_SECONDARY_I2C_SLAVE_ADDRESS
#if BL_ENABLE_CRC_CHECK && BL_FEATURE_CRC_ASSERT
restore_crc_check_failure_pin();
#endif
// Keep enabling PORTE clock since it is needed for QSPI module
if (is_quadspi_configured())
{
SIM->SCGC5 &= (uint32_t) ~(SIM_SCGC5_PTA_MASK | SIM_SCGC5_PTB_MASK | SIM_SCGC5_PTC_MASK | SIM_SCGC5_PTD_MASK);
}
else
{
SIM->SCGC5 = (uint32_t) ~(SIM_SCGC5_PTA_MASK | SIM_SCGC5_PTB_MASK | SIM_SCGC5_PTC_MASK | SIM_SCGC5_PTD_MASK |
SIM_SCGC5_PTE_MASK);
}
// Restore SIM_SOPTx related bits being changed
SIM->SOPT2 &= (uint32_t) ~(SIM_SOPT2_LPUARTSRC_MASK | SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
// Restore Intmux
INTMUX_Deinit((INTMUX_Type *)s_intmuxBase[0]);
}
// See bootloader_common.h for documentation on this function
bool is_qspi_present(void)
{
#if BL_FEATURE_QSPI_MODULE
return is_quadspi_configured();
#else
return false;
#endif // BL_FEATURE_QSPI_MODULE
}
