static inline __le16 iwl_mvm_scan_rx_chain(struct iwl_mvm *mvm) { u16 rx_chain; u8 rx_ant = iwl_fw_valid_rx_ant(mvm->fw); rx_chain = rx_ant << PHY_RX_CHAIN_VALID_POS; rx_chain |= rx_ant << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS; rx_chain |= rx_ant << PHY_RX_CHAIN_FORCE_SEL_POS; rx_chain |= 0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS; return cpu_to_le16(rx_chain); }
static struct iwl_nvm_data * iwl_parse_nvm_sections(struct iwl_mvm *mvm) { struct iwl_nvm_section *sections = mvm->nvm_sections; const __le16 *hw, *sw, *calib; /* Checking for required sections */ if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data || !mvm->nvm_sections[NVM_SECTION_TYPE_HW].data) { IWL_ERR(mvm, "Can't parse empty NVM sections\n"); return NULL; } if (WARN_ON(!mvm->cfg)) return NULL; hw = (const __le16 *)sections[NVM_SECTION_TYPE_HW].data; sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data; calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data; return iwl_parse_nvm_data(mvm->trans->dev, mvm->cfg, hw, sw, calib, iwl_fw_valid_tx_ant(mvm->fw), iwl_fw_valid_rx_ant(mvm->fw)); }