void __init ks8695p_init(void *sysdata)
{
#ifdef DEBUG_THIS
printk(KERN_INFO "%s\n", __FUNCTION__);
#endif
/* note that we need a stage 1 initialization in .S file to set 0x202c,
* before the stage 2 initialization here
*/
KS8695_WRITE(KS8695_202C, 0x00010001); /* stage 1 initialization, subid, subdevice = 0x0001 */
/* stage 2 initialization */
KS8695_WRITE(KS8695_2204, 0x40000000); /* prefetch limits with 16 words, retru enable */
/* configure memory mapping */
KS8695_WRITE(KS8695_2208, KS8695P_PCIBG_MEM_BASE);
//KS8695_WRITE(KS8695_220C, PMBAC_TRANS_ENABLE); /* enable memory address translation */
KS8695_WRITE(KS8695_2210, KS8695P_PCI_MEM_MASK); /* mask bits */
KS8695_WRITE(KS8695_2214, KS8695P_PCI_MEM_BASE); /* physical memory address */
/* configure IO mapping */
KS8695_WRITE(KS8695_2218, KS8695P_PCIBG_IO_BASE);
//KS8695_WRITE(KS8695_221C, PMBAC_TRANS_ENABLE); /* enable IO address translation */
KS8695_WRITE(KS8695_2220, KS8695P_PCI_IO_MASK); /* mask bits */
KS8695_WRITE(KS8695_2224, KS8695P_PCI_IO_BASE);
ks8695p_configure_interrupt();
pci_scan_bus(0, &ks8695p_ops, sysdata);
}
void __init ks8695p_init(void *sysdata)
{
#ifdef DEBUG_THIS
printk(KERN_INFO "%s\n", __FUNCTION__);
#endif
#if defined(CONFIG_MACH_CM4008) || defined(CONFIG_MACH_CM41xx)
/* Enable PCI reset line as output */
*((volatile unsigned int *) (IO_ADDRESS(KS8695_IO_BASE) + KS8695_GPIO_MODE)) |= 0x2;
*((volatile unsigned int *) (IO_ADDRESS(KS8695_IO_BASE) + KS8695_GPIO_DATA)) &= ~0x2;
udelay(10000);
*((volatile unsigned int *) (IO_ADDRESS(KS8695_IO_BASE) + KS8695_GPIO_DATA)) |= 0x2;
#endif
/* note that we need a stage 1 initialization in .S file to set 0x202c,
* before the stage 2 initialization here
*/
KS8695_WRITE(KS8695_202C, 0x00010001); /* stage 1 initialization, subid, subdevice = 0x0001 */
/* stage 2 initialization */
KS8695_WRITE(KS8695_2204, 0x40000000); /* prefetch limits with 16 words, retru enable */
/* configure memory mapping */
KS8695_WRITE(KS8695_2208, KS8695P_PCIBG_MEM_BASE);
//KS8695_WRITE(KS8695_220C, PMBAC_TRANS_ENABLE); /* enable memory address translation */
KS8695_WRITE(KS8695_2210, KS8695P_PCI_MEM_MASK); /* mask bits */
KS8695_WRITE(KS8695_2214, KS8695P_PCI_MEM_BASE); /* physical memory address */
/* configure IO mapping */
KS8695_WRITE(KS8695_2218, KS8695P_PCIBG_IO_BASE);
//KS8695_WRITE(KS8695_221C, PMBAC_TRANS_ENABLE); /* enable IO address translation */
KS8695_WRITE(KS8695_2220, KS8695P_PCI_IO_MASK); /* mask bits */
KS8695_WRITE(KS8695_2224, KS8695P_PCI_IO_BASE);
ks8695p_configure_interrupt();
pci_scan_bus(0, &ks8695p_ops, sysdata);
}
