void l2x0_disable(void) { if (readl(l2x0_base + L2X0_CTRL) && !(readl(l2x0_base + L2X0_DEBUG_CTRL) & 0x2)) { l2x0_flush_all(); writel(0, l2x0_base + L2X0_CTRL); l2x0_flush_all(); } }
static void l2x0_shutdown(void) { unsigned long flags; if (l2x0_disabled) return; BUG_ON(num_online_cpus() > 1); local_irq_save(flags); if (readl(l2x0_base + L2X0_CTRL) & 1) { int m; /* lockdown all ways, all masters to prevent new line * allocation during maintenance */ for (m=0; m<8; m++) { writel(0xffff, l2x0_base + L2X0_LOCKDOWN_WAY_D + (m*8)); writel(0xffff, l2x0_base + L2X0_LOCKDOWN_WAY_I + (m*8)); } l2x0_flush_all(); writel(0, l2x0_base + L2X0_CTRL); /* unlock cache ways */ for (m=0; m<8; m++) { writel(0, l2x0_base + L2X0_LOCKDOWN_WAY_D + (m*8)); writel(0, l2x0_base + L2X0_LOCKDOWN_WAY_I + (m*8)); } } local_irq_restore(flags); }
void l2x0_suspend(void) { /* Save aux control register value */ aux_ctrl_save = readl(l2x0_base + L2X0_AUX_CTRL); /* Flush all cache */ l2x0_flush_all(); /* Disable the cache */ writel(0, l2x0_base + L2X0_CTRL); }
void l2x0_cache_flush_all(void) { l2x0_flush_all(); }