// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { kinit1(end, P2V(4*1024*1024)); // phys page allocator // kmem. freelist added cprintf("%x \n", end); kvmalloc(); // kernel page table #ifdef CONFIG_MULTI_PROCESS mpinit(); // collect info about this machine #endif lapicinit(); seginit(); // set up segments picinit(); // interrupt controller: Programmable Interrupt Controller #ifdef CONFIG_MULTI_PROCESS ioapicinit(); // another interrupt controller #endif consoleinit(); // I/O devices & their interrupts uartinit(); // serial port pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table iinit(); // inode cache ideinit(); // disk if(!ismp) timerinit(); // uniprocessor timer #ifdef CONFIG_MULTI_PROCESS startothers(); // start other processors kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers() #endif userinit(); // first user process // Finish setting up this processor in mpmain. mpmain(); }
// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { kinit1(end, P2V(4*1024*1024)); // phys page allocator kvmalloc(); // kernel page table mpinit(); // detect other processors lapicinit(); // interrupt controller seginit(); // segment descriptors cprintf("\ncpu%d: starting xv6\n\n", cpunum()); picinit(); // another interrupt controller ioapicinit(); // another interrupt controller consoleinit(); // console hardware uartinit(); // serial port pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table ideinit(); // disk if(!ismp) timerinit(); // uniprocessor timer startothers(); // start other processors kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers() userinit(); // first user process mpmain(); // finish this processor's setup init_semaphores_on_boot(); }
static void squidboy(Apic* apic) { // iprint("Hello Squidboy\n"); machinit(); fpsavealloc(); mmuinit(); cpuidentify(); cpuidprint(); checkmtrr(); apic->online = 1; coherence(); lapicinit(apic); lapiconline(); syncclock(); timersinit(); fpoff(); lock(&active); active.machs |= 1<<m->machno; unlock(&active); while(!active.thunderbirdsarego) microdelay(100); schedinit(); }
// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { kinit1(end, P2V(4*1024*1024)); // phys page allocator kvmalloc(); // kernel page table mpinit(); // collect info about this machine lapicinit(); seginit(); // set up segments cprintf("\ncpu%d: starting xv6\n\n", cpu->id); picinit(); // interrupt controller ioapicinit(); // another interrupt controller consoleinit(); // I/O devices & their interrupts uartinit(); // serial port pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table ideinit(); // disk if(!ismp) timerinit(); // uniprocessor timer startothers(); // start other processors kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers() userinit(); // first user process mpmain(); }
static void squidboy(Apic* apic) { // iprint("Hello Squidboy\n"); machinit(); mmuinit(); cpuidentify(); cpuidprint(); checkmtrr(); lock(&mprdthilock); mprdthi |= (1<<apic->apicno)<<24; unlock(&mprdthilock); lapicinit(apic); lapiconline(); syncclock(); timersinit(); fpoff(); lock(&active); active.machs |= 1<<m->machno; unlock(&active); while(!active.thunderbirdsarego) microdelay(100); schedinit(); }
// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { unsigned char FB[]="MESSAGE WRITTEN THROUGH FRAMEBUFFER!!"; fb_init(); // initialize framebuffer device (2015.11.02) cprintf("\nUsing Framebuffer still presents some problems :(\n\n"); cprintf("\nSuggestion: review the way it is used in console.c\n\n"); fb_write(FB, sizeof(FB)); // Framebuffer maybe could be used before this moment (2015.11.02) see_mylock(MYLOCK); kinit1(end, P2V(4*1024*1024)); // phys page allocator kvmalloc(); // kernel page table mpinit(); // collect info about this machine lapicinit(); seginit(); // set up segments cprintf("\ncpu%d: starting xv6\n\n", cpu->id); picinit(); // interrupt controller ioapicinit(); // another interrupt controller consoleinit(); // I/O devices & their interrupts uartinit(); // serial port pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table ideinit(); // disk if(!ismp) timerinit(); // uniprocessor timer startothers(); // start other processors kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers() userinit(); // first user process // Finish setting up this processor in mpmain. mpmain(); }
// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { monitor_clear (); // Print basic system information. cprintf ("Ensidia\n\n"); cprintf ("Copyright (c) 2013-2014 Fotis Koutoulakis\n"); cprintf ("Based on xv6 by Russ Cox et al, at MIT CSAIL\n"); kinit1(end, P2V(4*1024*1024)); // phys page allocator kvmalloc(); // kernel page table mpinit(); // collect info about this machine lapicinit(); seginit(); // set up segments cprintf("\ncpu%d: starting xng kernel\n\n", cpu->id); picinit(); // interrupt controller ioapicinit(); // another interrupt controller consoleinit(); // I/O devices & their interrupts uartinit(); // serial port pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table iinit(); // inode cache ideinit(); // disk if(!ismp) timerinit(); // uniprocessor timer startothers(); // start other processors kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers() userinit(); // first user process // Finish setting up this processor in mpmain. mpmain(); }
/*int main(void){*/ void kmain(void){ // vga_init(); // puts((uint8_t*)"Hello kernel world!\n"); /*do some work here, like initialize timer or paging*/ kinit1(end, P2V(4*1024*1024)); // phys page allocator kvmalloc(); // kernel page table mpinit(); // collect info about this machine lapicinit(); // gdt_descriptor(); // puts((uint8_t*)"GDT initialized...\n"); // idt_descriptor(); // puts((uint8_t*)"IDT initialized...\n"); // cprintf("IDT initialized...\n"); seginit(); // set up segments cprintf("\ncpu%d: starting xv6\n\n", cpu->id); picinit(); // interrupt controller ioapicinit(); // another interrupt controller consoleinit(); // I/O devices & their interrupts uartinit(); // serial port pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table ideinit(); // disk if(!ismp) timerinit(); // uniprocessor timer startothers(); // start other processors kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers() userinit(); // first user process // Finish setting up this processor in mpmain. mpmain(); }
// Bootstrap processor starts running C code here. int main(int memsize) { mpinit(); // collect info about this machine lapicinit(mpbcpu()); ksegment(); picinit(); // interrupt controller ioapicinit(); // another interrupt controller consoleinit(); // I/O devices & their interrupts uartinit(); // serial port cprintf("cpus %p cpu %p\n", cpus, cpu); cprintf("\ncpu%d: starting xv6\n\n", cpu->id); cprintf("mem: %d kb\n", memsize); kinit(memsize); // physical memory allocator pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table iinit(); // inode cache ideinit(); // disk if(!ismp) timerinit(); // uniprocessor timer pageinit(); // enable paging userinit(); // first user process bootothers(); // start other processors // Finish setting up this processor in mpmain. mpmain(); }
// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { kvmalloc(); // kernel page table mpinit(); // collect info about this machine lapicinit(mpbcpu()); seginit(); // set up segments cprintf("\ncpu%d: starting xv6\n\n", cpu->id); picinit(); // interrupt controller ioapicinit(); // another interrupt controller consoleinit(); // I/O devices & their interrupts uartinit(); // serial port pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table iinit(); // inode cache ideinit(); // disk if(!ismp) timerinit(); // uniprocessor timer startothers(); // start other processors (must come before kinit) kinit(); // initialize memory allocator userinit(); // first user process (must come after kinit) // Finish setting up this processor in mpmain. mpmain(); }
// Other CPUs jump here from entryother.S. static void mpenter(void) { switchkvm(); seginit(); lapicinit(); mpmain(); }
// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { kinit1(end, P2V(4*1024*1024)); // phys page allocator kvmalloc(); // kernel page table mpinit(); // collect info about this machine lapicinit(); seginit(); // set up segments cprintf("\ncpu%d: starting xv6\n\n", cpu->id); picinit(); // interrupt controller ioapicinit(); // another interrupt controller consoleinit(); // I/O devices & their interrupts uartinit(); // serial port initGraphMode(); initDom(); tryOnce(); toggleOn(); pinit(); // process table toggleOn(); tvinit(); // trap vectors toggleOn(); binit(); // buffer cache toggleOn(); fileinit(); // file table toggleOn(); iinit(); // inode cache toggleOn(); ideinit(); // disk toggleOn(); if(!ismp) timerinit(); // uniprocessor timer toggleOn(); startothers(); // start other processors toggleOn(); kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers() toggleOn(); txt_initLock(); mouseEnable(); initProcessMsgMap(); userinit(); // first user process toggleOn(); endToggle(); // Finish setting up this processor in mpmain. mpmain(); }
// Bootstrap processor gets here after setting up the hardware. // Additional processors start here. static void mpmain(void) { if(cpunum() != mpbcpu()) lapicinit(cpunum()); ksegment(); cprintf("cpu%d: mpmain\n", cpu->id); idtinit(); cpu->dir = kernel_dir; enable_page(cpu->dir); cprintf("-- mpmain -- cpu%d enable paging dir: %x \n", cpu->id, cpu->dir); xchg(&cpu->booted, 1); cprintf("cpu%d: scheduling\n", cpu->id); scheduler(); }
// Os procedimentos de inicialização começam a executar o // código .C a partir daqui. // Aloca uma pilha real e troca para ela, primeiro fazendo // algumas configurações necessárias par o alocador de memória funcionar. int main(void) { kinit1(end, P2V(4*1024*1024)); // alocador de páginas de memória física kvmalloc(); // tabela de páginas do kernel mpinit(); // detecta outros processadores lapicinit(); // controlador de interrupções seginit(); // descritores de segmentos picinit(); // desabilita pic ioapicinit(); // outro controlador de interrupções consoleinit(); // console hardware uartinit(); // porta serial pinit(); // tabela de processos tvinit(); // vetores trap binit(); // buffer cache fileinit(); // tabela de arquivo ideinit(); // disco startothers(); // inicia outros processadores kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // deve vir após startothers() userinit(); // primeiro processo no modo usuário mpmain(); // encerra esta configuração de processadores }
// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { kinit1(end, P2V(4*1024*1024)); // phys page allocator kvmalloc(); // kernel page table mpinit(); // detect other processors lapicinit(); // interrupt controller seginit(); // segment descriptors picinit(); // disable pic ioapicinit(); // another interrupt controller consoleinit(); // console hardware uartinit(); // serial port pinit(); // process table shminit(); // shared memory tvinit(); // trap vectors binit(); // buffer cache fileinit(); // file table ideinit(); // disk startothers(); // start other processors kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers() userinit(); // first user process mpmain(); // finish this processor's setup }
// Bootstrap processor starts running C code here. // Allocate a real stack and switch to it, first // doing some setup required for memory allocator to work. int main(void) { monitor_clear(); xylos_logo(); kinit1(end, P2V(4 * 1024 * 1024)); // phys page allocator, 16MB for kernel kvmalloc(); // kernel page table mpinit(); // collect info about this machine lapicinit(); seginit(); // set up segments cprintf("Initializing interrupts... "); init_generic_irq_table(); picinit(); // interrupt controller ioapicinit(); // another interrupt controller cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); cprintf("Initializing console and serial... "); consoleinit(); // I/O devices & their interrupts uartinit(); // serial port cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); cprintf("Setting up swap space disk... "); swapinit(); cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); cprintf("Initializing tasking... "); pinit(); // process table tvinit(); // trap vectors binit(); // buffer cache cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); cprintf("Initializing pipe IPC... "); init_pipe_ipc_system(); if(pipe_ipc_sanitycheck() == 0) { cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); } cprintf("Initializing direct IPC... "); init_direct_ipc_table(); if(direct_ipc_sanitycheck() == 0) { cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); } cprintf("Mounting root filesystem... "); fileinit(); // file table ideinit(); // disk cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); if(!ismp) { cprintf("Starting up uniprocessor CPU... "); timerinit(); // uniprocessor timer cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); } if(ismp) { if(ncpu > 1) { cprintf("Starting up %d CPU cores... ", ncpu); } else { cprintf("Starting up %d CPU core... ", ncpu); } } startothers(); // start other processors kinit2(P2V(4 * 1024 * 1024), P2V(PHYSTOP)); // 16MB to PHYSTOP [234MB] if(ismp) { cprintf_color(COLOR_BLACK, COLOR_LIGHT_GREEN, false, "done\n"); } // detects and starts km drivers auto_enable_nic(); // first user process userinit(); // Finish setting up this processor in mpmain. mpmain(); }
void mpinit(void) { int ncpu; char *cp; PCMP *pcmp; uchar *e, *p; Apic *apic, *bpapic; i8259init(); syncclock(); if(_mp_ == 0) return; pcmp = KADDR(_mp_->physaddr); /* * Map the local APIC. */ if(mmukmap(pcmp->lapicbase, 0, 1024) == 0) return; bpapic = nil; /* * Run through the table saving information needed for starting * application processors and initialising any I/O APICs. The table * is guaranteed to be in order such that only one pass is necessary. */ p = ((uchar*)pcmp)+sizeof(PCMP); e = ((uchar*)pcmp)+pcmp->length; while(p < e) switch(*p){ default: print("mpinit: unknown PCMP type 0x%uX (e-p 0x%luX)\n", *p, e-p); while(p < e){ print("%uX ", *p); p++; } break; case PcmpPROCESSOR: if(apic = mkprocessor((PCMPprocessor*)p)){ /* * Must take a note of bootstrap processor APIC * now as it will be needed in order to start the * application processors later and there's no * guarantee that the bootstrap processor appears * first in the table before the others. */ apic->addr = KADDR(pcmp->lapicbase); if(apic->flags & PcmpBP) bpapic = apic; } p += sizeof(PCMPprocessor); continue; case PcmpBUS: mkbus((PCMPbus*)p); p += sizeof(PCMPbus); continue; case PcmpIOAPIC: if(apic = mkioapic((PCMPioapic*)p)) ioapicinit(apic, ((PCMPioapic*)p)->apicno); p += sizeof(PCMPioapic); continue; case PcmpIOINTR: mkiointr((PCMPintr*)p); p += sizeof(PCMPintr); continue; case PcmpLINTR: mklintr((PCMPintr*)p); p += sizeof(PCMPintr); continue; } /* * No bootstrap processor, no need to go further. */ if(bpapic == 0) return; lapicinit(bpapic); lock(&mprdthilock); mprdthi |= (1<<bpapic->apicno)<<24; unlock(&mprdthilock); /* * These interrupts are local to the processor * and do not appear in the I/O APIC so it is OK * to set them now. */ intrenable(IrqTIMER, lapicclock, 0, BUSUNKNOWN, "clock"); intrenable(IrqERROR, lapicerror, 0, BUSUNKNOWN, "lapicerror"); intrenable(IrqSPURIOUS, lapicspurious, 0, BUSUNKNOWN, "lapicspurious"); lapiconline(); checkmtrr(); /* * Initialise the application processors. */ if(cp = getconf("*ncpu")){ ncpu = strtol(cp, 0, 0); if(ncpu < 1) ncpu = 1; } else ncpu = MaxAPICNO; memmove((void*)APBOOTSTRAP, apbootstrap, sizeof(apbootstrap)); for(apic = mpapic; apic <= &mpapic[MaxAPICNO]; apic++){ if(ncpu <= 1) break; if((apic->flags & (PcmpBP|PcmpEN)) == PcmpEN && apic->type == PcmpPROCESSOR){ mpstartap(apic); conf.nmach++; ncpu--; } } /* * we don't really know the number of processors till * here. * * set conf.copymode here if nmach > 1. * Should look for an ExtINT line and enable it. */ if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1) conf.copymode = 1; }
void mpinit(void) { int ncpu, cpuson; char *cp; PCMP *pcmp; uchar *e, *p; Apic *apic, *bpapic; void *va; mpdebug = getconf("*debugmp") != nil; i8259init(); syncclock(); bpapic = nil; cpuson = 0; if(_mp_ == 0) { /* * We can easily get processor info from ACPI, but * interrupt routing, etc. would require interpreting AML. */ print("mpinit: no mp table found, assuming uniprocessor\n"); archrevert(); return; } pcmp = KADDR(_mp_->physaddr); /* * Map the local APIC. */ if((va = vmap(pcmp->lapicbase, 1024)) == nil) return; mppcmp = pcmp; print("LAPIC: %#lux %#lux\n", pcmp->lapicbase, (ulong)va); /* * Run through the table saving information needed for starting * application processors and initialising any I/O APICs. The table * is guaranteed to be in order such that only one pass is necessary. */ p = ((uchar*)pcmp)+sizeof(PCMP); e = ((uchar*)pcmp)+pcmp->length; while(p < e) switch(*p){ default: print("mpinit: unknown PCMP type 0x%uX (e-p 0x%luX)\n", *p, e-p); while(p < e){ print("%uX ", *p); p++; } break; case PcmpPROCESSOR: if(apic = mkprocessor((PCMPprocessor*)p)){ /* * Must take a note of bootstrap processor APIC * now as it will be needed in order to start the * application processors later and there's no * guarantee that the bootstrap processor appears * first in the table before the others. */ apic->addr = va; apic->paddr = pcmp->lapicbase; if(apic->flags & PcmpBP) bpapic = apic; cpuson++; } p += sizeof(PCMPprocessor); continue; case PcmpBUS: mkbus((PCMPbus*)p); p += sizeof(PCMPbus); continue; case PcmpIOAPIC: if(apic = mkioapic((PCMPioapic*)p)) ioapicinit(apic, ((PCMPioapic*)p)->apicno); p += sizeof(PCMPioapic); continue; case PcmpIOINTR: mkiointr((PCMPintr*)p); p += sizeof(PCMPintr); continue; case PcmpLINTR: mklintr((PCMPintr*)p); p += sizeof(PCMPintr); continue; } dprint("mpinit: mp table describes %d cpus\n", cpuson); /* For now, always scan ACPI's MADT for processors that MP missed. */ trympacpi(); if (bpapic == nil) bpapic = bootapic; /* * No bootstrap processor, no need to go further. */ if(bpapic == 0) return; bpapic->online = 1; lapicinit(bpapic); /* * These interrupts are local to the processor * and do not appear in the I/O APIC so it is OK * to set them now. */ intrenable(IrqTIMER, lapicclock, 0, BUSUNKNOWN, "clock"); intrenable(IrqERROR, lapicerror, 0, BUSUNKNOWN, "lapicerror"); intrenable(IrqSPURIOUS, lapicspurious, 0, BUSUNKNOWN, "lapicspurious"); lapiconline(); checkmtrr(); /* * Initialise the application processors. */ if(cp = getconf("*ncpu")){ ncpu = strtol(cp, 0, 0); if(ncpu < 1) ncpu = 1; else if(ncpu > MAXMACH) ncpu = MAXMACH; } else ncpu = MAXMACH; memmove((void*)APBOOTSTRAP, apbootstrap, sizeof(apbootstrap)); for(apic = mpapic; apic <= &mpapic[MaxAPICNO]; apic++){ if(ncpu <= 1) break; if((apic->flags & (PcmpBP|PcmpEN)) == PcmpEN && apic->type == PcmpPROCESSOR){ mpstartap(apic); conf.nmach++; ncpu--; } } /* * we don't really know the number of processors till * here. * * set conf.copymode here if nmach > 1. * Should look for an ExtINT line and enable it. */ if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1) conf.copymode = 1; }