void m65ce02_set_reg (int regnum, unsigned val) { switch( regnum ) { case M65CE02_PC: m65ce02.pc.w.l = val; break; case M65CE02_S: m65ce02.sp.w.l = val; break; case M65CE02_P: m65ce02.p = val; break; case M65CE02_A: m65ce02.a = val; break; case M65CE02_X: m65ce02.x = val; break; case M65CE02_Y: m65ce02.y = val; break; case M65CE02_Z: m65ce02.z = val; break; case M65CE02_B: m65ce02.zp.b.h = val; break; case M65CE02_EA: m65ce02.ea.w.l = val; break; case M65CE02_ZP: m65ce02.zp.b.l = val; break; case M65CE02_NMI_STATE: m65ce02_set_nmi_line( val ); break; case M65CE02_IRQ_STATE: m65ce02_set_irq_line( 0, val ); break; default: if( regnum <= REG_SP_CONTENTS ) { unsigned offset = S + 2 * (REG_SP_CONTENTS - regnum); if( offset < 0x1ff ) { WRMEM( offset, val & 0xfff ); WRMEM( offset + 1, (val >> 8) & 0xff ); } }
void m65ce02_set_reg (int regnum, unsigned val) { switch( regnum ) { case REG_PC: PCW = val; change_pc(PCD); break; case M65CE02_PC: m65ce02.pc.w.l = val; break; case REG_SP: S = val; break; case M65CE02_S: m65ce02.sp.w.l = val; break; case M65CE02_P: m65ce02.p = val; break; case M65CE02_A: m65ce02.a = val; break; case M65CE02_X: m65ce02.x = val; break; case M65CE02_Y: m65ce02.y = val; break; case M65CE02_Z: m65ce02.z = val; break; case M65CE02_B: m65ce02.zp.b.h = val; break; case M65CE02_EA: m65ce02.ea.w.l = val; break; case M65CE02_ZP: m65ce02.zp.b.l = val; break; case M65CE02_NMI_STATE: m65ce02_set_irq_line( INPUT_LINE_NMI, val ); break; case M65CE02_IRQ_STATE: m65ce02_set_irq_line( 0, val ); break; } }
static CPU_SET_INFO( m65ce02 ) { m65ce02_Regs *cpustate = get_safe_token(device); switch( state ) { /* --- the following bits of info are set as 64-bit signed integers --- */ case CPUINFO_INT_INPUT_STATE + M65CE02_IRQ_STATE: m65ce02_set_irq_line( cpustate, M65CE02_IRQ_LINE, info->i ); break; case CPUINFO_INT_INPUT_STATE + M65CE02_NMI_STATE: m65ce02_set_irq_line( cpustate, INPUT_LINE_NMI, info->i ); break; case CPUINFO_INT_PC: PCW = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: cpustate->sp.b.l = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_S: cpustate->sp.w.l = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_P: cpustate->p = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_A: cpustate->a = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_X: cpustate->x = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_Y: cpustate->y = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_Z: cpustate->z = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_B: cpustate->zp.b.h = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_EA: cpustate->ea.w.l = info->i; break; case CPUINFO_INT_REGISTER + M65CE02_ZP: cpustate->zp.b.l = info->i; break; } }