/* Reset the PHYXS MMD. This is documented (for the Quake PHY) as doing * a complete soft reset. */ static int xfp_reset_phy(struct efx_nic *efx) { int rc; rc = mdio_clause45_reset_mmd(efx, MDIO_MMD_PHYXS, XFP_MAX_RESET_TIME / XFP_RESET_WAIT, XFP_RESET_WAIT); if (rc < 0) goto fail; /* Wait 250ms for the PHY to complete bootup */ msleep(250); /* Check that all the MMDs we expect are present and responding. We * expect faults on some if the link is down, but not on the PHY XS */ rc = mdio_clause45_check_mmds(efx, XFP_REQUIRED_DEVS, MDIO_MMDREG_DEVS_PHYXS); if (rc < 0) goto fail; efx->board_info.init_leds(efx); return rc; fail: EFX_ERR(efx, "XFP: reset timed out!\n"); return rc; }
static int tenxpress_phy_init(struct efx_nic *efx) { struct tenxpress_phy_data *phy_data; int rc = 0; phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL); if (!phy_data) return -ENOMEM; efx->phy_data = phy_data; phy_data->phy_mode = efx->phy_mode; if (!(efx->phy_mode & PHY_MODE_SPECIAL)) { if (efx->phy_type == PHY_TYPE_SFT9001A) { int reg; reg = mdio_clause45_read(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG); reg |= (1 << PMA_PMD_EXT_SSR_LBN); mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg); mdelay(200); } rc = mdio_clause45_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS); if (rc < 0) goto fail; rc = mdio_clause45_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0); if (rc < 0) goto fail; } rc = tenxpress_init(efx); if (rc < 0) goto fail; mdio_clause45_set_pause(efx); if (efx->phy_type == PHY_TYPE_SFT9001B) { rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_short_reach); if (rc) goto fail; } schedule_timeout_uninterruptible(HZ / 5); /* 200ms */ /* Let XGXS and SerDes out of reset */ falcon_reset_xaui(efx); return 0; fail: kfree(efx->phy_data); efx->phy_data = NULL; return rc; }