static u32 mdss_mdp_res_init(struct mdss_data_type *mdata)
{
u32 rc = 0;
if (mdata->res_init) {
pr_err("mdss resources already initialized\n");
return -EPERM;
}
mdata->res_init = true;
mdata->clk_ena = false;
mdata->irq_mask = MDSS_MDP_DEFAULT_INTR_MASK;
mdata->irq_ena = false;
rc = mdss_mdp_irq_clk_setup(mdata);
if (rc)
return rc;
mdata->iclient = msm_ion_client_create(-1, mdata->pdev->name);
if (IS_ERR_OR_NULL(mdata->iclient)) {
pr_err("msm_ion_client_create() return error (%p)\n",
mdata->iclient);
mdata->iclient = NULL;
}
rc = mdss_iommu_init(mdata);
init_completion(&mdata->iommu_attach_done);
return rc;
}
static u32 mdss_mdp_res_init(struct platform_device *pdev)
{
u32 rc;
rc = mdss_mdp_irq_clk_setup(pdev);
if (rc)
return rc;
mdss_res->clk_ctrl_wq = create_singlethread_workqueue("mdp_clk_wq");
INIT_DELAYED_WORK(&mdss_res->clk_ctrl_worker,
mdss_mdp_clk_ctrl_workqueue_handler);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
mdss_res->rev = MDSS_MDP_REG_READ(MDSS_REG_HW_VERSION);
mdss_res->mdp_rev = MDSS_MDP_REG_READ(MDSS_MDP_REG_HW_VERSION);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
mdss_res->smp_mb_cnt = MDSS_MDP_SMP_MMB_BLOCKS;
mdss_res->smp_mb_size = MDSS_MDP_SMP_MMB_SIZE;
mdss_res->pipe_type_map = mdss_mdp_pipe_type_map;
mdss_res->mixer_type_map = mdss_mdp_mixer_type_map;
pr_info("mdss_revision=%x\n", mdss_res->rev);
pr_info("mdp_hw_revision=%x\n", mdss_res->mdp_rev);
mdss_res->res_init = true;
mdss_res->timeout = HZ/20;
mdss_res->clk_ena = false;
mdss_res->irq_mask = MDSS_MDP_DEFAULT_INTR_MASK;
mdss_res->suspend = false;
mdss_res->prim_ptype = NO_PANEL;
mdss_res->irq_ena = false;
return 0;
}
static u32 mdss_mdp_res_init(struct mdss_data_type *mdata)
{
u32 rc = 0;
rc = mdss_mdp_irq_clk_setup(mdata);
if (rc)
return rc;
mdata->clk_ctrl_wq = create_singlethread_workqueue("mdp_clk_wq");
INIT_DELAYED_WORK(&mdata->clk_ctrl_worker,
mdss_mdp_clk_ctrl_workqueue_handler);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
mdata->rev = MDSS_MDP_REG_READ(MDSS_REG_HW_VERSION);
mdata->mdp_rev = MDSS_MDP_REG_READ(MDSS_MDP_REG_HW_VERSION);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
mdata->smp_mb_cnt = MDSS_MDP_SMP_MMB_BLOCKS;
mdata->smp_mb_size = MDSS_MDP_SMP_MMB_SIZE;
mdata->pipe_type_map = mdss_mdp_pipe_type_map;
mdata->mixer_type_map = mdss_mdp_mixer_type_map;
pr_info("mdss_revision=%x\n", mdata->rev);
pr_info("mdp_hw_revision=%x\n", mdata->mdp_rev);
mdata->res_init = true;
mdata->timeout = HZ/20;
mdata->clk_ena = false;
mdata->irq_mask = MDSS_MDP_DEFAULT_INTR_MASK;
mdata->suspend = false;
mdata->prim_ptype = NO_PANEL;
mdata->irq_ena = false;
mdata->iclient = msm_ion_client_create(-1, mdata->pdev->name);
if (IS_ERR_OR_NULL(mdata->iclient)) {
pr_err("msm_ion_client_create() return error (%p)\n",
mdata->iclient);
mdata->iclient = NULL;
}
rc = mdss_iommu_init();
if (!IS_ERR_VALUE(rc))
mdss_iommu_attach();
rc = mdss_hw_init(mdata);
return rc;
}
static struct msm_panel_common_pdata *mdss_mdp_populate_pdata(
struct device *dev)
{
struct msm_panel_common_pdata *pdata;
struct msm_iova_layout layout;
struct iommu_domain *domain;
struct mdss_iommu_map_type *iomap;
int i;
if (mdata->iommu_map) {
pr_warn("iommu already initialized\n");
return 0;
}
for (i = 0; i < MDSS_IOMMU_MAX_DOMAIN; i++) {
iomap = &mdss_iommu_map[i];
layout.client_name = iomap->client_name;
layout.partitions = iomap->partitions;
layout.npartitions = iomap->npartitions;
layout.is_secure = (i == MDSS_IOMMU_DOMAIN_SECURE);
iomap->domain_idx = msm_register_domain(&layout);
if (IS_ERR_VALUE(iomap->domain_idx))
return -EINVAL;
domain = msm_get_iommu_domain(iomap->domain_idx);
if (!domain) {
pr_err("unable to get iommu domain(%d)\n",
iomap->domain_idx);
return -EINVAL;
}
iommu_set_fault_handler(domain, mdss_iommu_fault_handler, NULL);
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
dev_err(dev, "could not allocate memory for pdata\n");
return pdata;
}
static u32 mdss_mdp_res_init(struct platform_device *pdev)
{
u32 rc;
rc = mdss_mdp_irq_clk_setup(pdev);
if (rc)
return rc;
mdss_res->clk_ctrl_wq = create_singlethread_workqueue("mdp_clk_wq");
INIT_DELAYED_WORK(&mdss_res->clk_ctrl_worker,
mdss_mdp_clk_ctrl_workqueue_handler);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
mdss_res->rev = MDSS_MDP_REG_READ(MDSS_REG_HW_VERSION);
mdss_res->mdp_rev = MDSS_MDP_REG_READ(MDSS_MDP_REG_HW_VERSION);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
mdss_res->smp_mb_cnt = MDSS_MDP_SMP_MMB_BLOCKS;
mdss_res->smp_mb_size = MDSS_MDP_SMP_MMB_SIZE;
mdss_res->pipe_type_map = mdss_mdp_pipe_type_map;
mdss_res->mixer_type_map = mdss_mdp_mixer_type_map;
pr_info("mdss_revision=%x\n", mdss_res->rev);
pr_info("mdp_hw_revision=%x\n", mdss_res->mdp_rev);
mdss_res->res_init = true;
mdss_res->timeout = HZ/20;
mdss_res->clk_ena = false;
mdss_res->irq_mask = MDSS_MDP_DEFAULT_INTR_MASK;
mdss_res->suspend = false;
mdss_res->prim_ptype = NO_PANEL;
mdss_res->irq_ena = false;
return 0;
}
