static int mdss_mdp_irq_clk_setup(struct platform_device *pdev) { int ret; int i; ret = request_irq(mdss_res->irq, mdss_irq_handler, IRQF_DISABLED, "MDSS", 0); if (ret) { pr_err("mdp request_irq() failed!\n"); return ret; } disable_irq(mdss_res->irq); mdss_res->fs = regulator_get(&pdev->dev, "vdd"); if (IS_ERR_OR_NULL(mdss_res->fs)) { mdss_res->fs = NULL; pr_err("unable to get gdsc regulator\n"); goto error; } regulator_enable(mdss_res->fs); mdss_res->fs_ena = true; if (mdss_mdp_irq_clk_register(pdev, "bus_clk", MDSS_CLK_AXI) || mdss_mdp_irq_clk_register(pdev, "iface_clk", MDSS_CLK_AHB) || mdss_mdp_irq_clk_register(pdev, "core_clk_src", MDSS_CLK_MDP_SRC) || mdss_mdp_irq_clk_register(pdev, "core_clk", MDSS_CLK_MDP_CORE) || mdss_mdp_irq_clk_register(pdev, "lut_clk", MDSS_CLK_MDP_LUT) || mdss_mdp_irq_clk_register(pdev, "vsync_clk", MDSS_CLK_MDP_VSYNC)) goto error; mdss_mdp_set_clk_rate(MDP_CLK_DEFAULT_RATE); pr_debug("mdp clk rate=%ld\n", mdss_mdp_get_clk_rate(MDSS_CLK_MDP_SRC)); return 0; error: for (i = 0; i < MDSS_MAX_CLK; i++) { if (mdss_res->mdp_clk[i]) clk_put(mdss_res->mdp_clk[i]); } if (mdss_res->fs) regulator_put(mdss_res->fs); if (mdss_res->irq) free_irq(mdss_res->irq, 0); return -EINVAL; }
static int mdss_mdp_irq_clk_setup(struct platform_device *pdev) { int ret; int i; ret = request_irq(mdss_res->irq, mdss_irq_handler, IRQF_DISABLED, "MDSS", 0); if (ret) { pr_err("mdp request_irq() failed!\n"); return ret; } disable_irq(mdss_res->irq); mdss_res->fs = regulator_get(&pdev->dev, "vdd"); if (IS_ERR_OR_NULL(mdss_res->fs)) { mdss_res->fs = NULL; pr_err("unable to get gdsc regulator\n"); goto error; } regulator_enable(mdss_res->fs); mdss_res->fs_ena = true; if (mdss_mdp_irq_clk_register(pdev, "bus_clk", MDSS_CLK_AXI) || mdss_mdp_irq_clk_register(pdev, "iface_clk", MDSS_CLK_AHB) || mdss_mdp_irq_clk_register(pdev, "core_clk_src", MDSS_CLK_MDP_SRC) || mdss_mdp_irq_clk_register(pdev, "core_clk", MDSS_CLK_MDP_CORE) || mdss_mdp_irq_clk_register(pdev, "lut_clk", MDSS_CLK_MDP_LUT) || mdss_mdp_irq_clk_register(pdev, "vsync_clk", MDSS_CLK_MDP_VSYNC)) goto error; mdss_mdp_set_clk_rate(MDP_CLK_DEFAULT_RATE); pr_debug("mdp clk rate=%ld\n", mdss_mdp_get_clk_rate(MDSS_CLK_MDP_SRC)); return 0; error: for (i = 0; i < MDSS_MAX_CLK; i++) { if (mdss_res->mdp_clk[i]) clk_put(mdss_res->mdp_clk[i]); } static int mdss_iommu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *token) { pr_err("MDP IOMMU page fault: iova 0x%lx\n", iova); return 0; }
static int mdss_mdp_irq_clk_setup(struct mdss_data_type *mdata) { int ret; ret = of_property_read_u32(mdata->pdev->dev.of_node, "qcom,max-clk-rate", &mdata->max_mdp_clk_rate); if (ret) { pr_err("failed to get max mdp clock rate\n"); return ret; } pr_debug("max mdp clk rate=%d\n", mdata->max_mdp_clk_rate); ret = request_irq(mdata->irq, mdss_irq_handler, IRQF_DISABLED, "MDSS", mdata); if (ret) { pr_err("mdp request_irq() failed!\n"); return ret; } disable_irq(mdata->irq); mdata->fs = devm_regulator_get(&mdata->pdev->dev, "vdd"); if (IS_ERR_OR_NULL(mdata->fs)) { mdata->fs = NULL; pr_err("unable to get gdsc regulator\n"); return -EINVAL; } mdata->fs_ena = false; if (mdss_mdp_irq_clk_register(mdata, "bus_clk", MDSS_CLK_AXI) || mdss_mdp_irq_clk_register(mdata, "iface_clk", MDSS_CLK_AHB) || mdss_mdp_irq_clk_register(mdata, "core_clk_src", MDSS_CLK_MDP_SRC) || mdss_mdp_irq_clk_register(mdata, "core_clk", MDSS_CLK_MDP_CORE) || mdss_mdp_irq_clk_register(mdata, "lut_clk", MDSS_CLK_MDP_LUT) || mdss_mdp_irq_clk_register(mdata, "vsync_clk", MDSS_CLK_MDP_VSYNC)) return -EINVAL; mdss_mdp_set_clk_rate(MDP_CLK_DEFAULT_RATE); pr_debug("mdp clk rate=%ld\n", mdss_mdp_get_clk_rate(MDSS_CLK_MDP_SRC)); return 0; }
static int mdss_mdp_ctl_perf_commit(u32 flags) { struct mdss_mdp_ctl *ctl; int cnum; unsigned long clk_rate = 0; u64 bus_ab_quota = 0, bus_ib_quota = 0; if (!flags) { pr_err("nothing to update\n"); return -EINVAL; } mutex_lock(&mdss_mdp_ctl_lock); for (cnum = 0; cnum < MDSS_MDP_MAX_CTL; cnum++) { ctl = &mdss_mdp_ctl_list[cnum]; if (ctl->power_on) { bus_ab_quota += ctl->bus_ab_quota; bus_ib_quota += ctl->bus_ib_quota; if (ctl->clk_rate > clk_rate) clk_rate = ctl->clk_rate; } } if (flags & MDSS_MDP_PERF_UPDATE_BUS) { bus_ab_quota = bus_ab_quota << MDSS_MDP_BUS_FACTOR_SHIFT; bus_ib_quota = MDSS_MDP_BUS_FUDGE_FACTOR(bus_ib_quota); bus_ib_quota <<= MDSS_MDP_BUS_FACTOR_SHIFT; if ((bus_ib_quota == 0) && (clk_rate > 0)) { /* allocate min bw for panel cmds if mdp is active */ bus_ib_quota = SZ_16M; } mdss_mdp_bus_scale_set_quota(bus_ab_quota, bus_ib_quota); } if (flags & MDSS_MDP_PERF_UPDATE_CLK) { clk_rate = MDSS_MDP_CLK_FUDGE_FACTOR(clk_rate); pr_debug("update clk rate = %lu\n", clk_rate); mdss_mdp_set_clk_rate(clk_rate); } mutex_unlock(&mdss_mdp_ctl_lock); return 0; }
static int mdss_mdp_ctl_perf_commit(struct mdss_data_type *mdata, u32 flags) { struct mdss_mdp_ctl *ctl; int cnum; unsigned long clk_rate = 0; u64 bus_ab_quota = 0, bus_ib_quota = 0; if (!flags) { pr_err("nothing to update\n"); return -EINVAL; } mutex_lock(&mdss_mdp_ctl_lock); for (cnum = 0; cnum < mdata->nctl; cnum++) { ctl = mdata->ctl_off + cnum; if (ctl->power_on) { struct mdss_mdp_perf_params *perf = &ctl->cur_perf; bus_ab_quota += perf->ab_quota; bus_ib_quota += perf->ib_quota; if (perf->mdp_clk_rate > clk_rate) clk_rate = perf->mdp_clk_rate; } } if (flags & MDSS_MDP_PERF_UPDATE_BUS) { bus_ab_quota = bus_ib_quota; __mdss_mdp_ctrl_perf_ovrd(mdata, &bus_ab_quota, &bus_ib_quota); pr_debug("update ab=%llu ib=%llu\n", bus_ab_quota, bus_ib_quota); mdss_mdp_bus_scale_set_quota(bus_ab_quota, bus_ib_quota); } if (flags & MDSS_MDP_PERF_UPDATE_CLK) { clk_rate = MDSS_MDP_CLK_FUDGE_FACTOR(clk_rate); pr_debug("update clk rate = %lu HZ\n", clk_rate); mdss_mdp_set_clk_rate(clk_rate); } mutex_unlock(&mdss_mdp_ctl_lock); return 0; }