paddr_t vga_jazzio_mmap(void *v, off_t offset, int prot) { if (offset >= 0xa0000 && offset < 0xc0000) return mips_btop(PICA_P_LOCAL_VIDEO + offset); if (offset >= 0x0000 && offset < 0x10000) return mips_btop(PICA_P_LOCAL_VIDEO_CTRL + offset); if (offset >= 0x40000000 && offset < 0x40800000) return mips_btop(PICA_P_LOCAL_VIDEO + offset - 0x40000000); return -1; }
paddr_t __BS(mmap)(void *v, bus_addr_t addr, off_t off, int prot, int flags) { #ifdef CHIP_IO /* Not supported for I/O space. */ return (-1); #elif defined(CHIP_MEM) struct mips_bus_space_translation mbst; int error; /* * Get the translation for this address. */ error = __BS(translate)(v, addr, off + PAGE_SIZE, flags, &mbst); if (error) return (-1); return (mips_btop(mbst.mbst_sys_start + (addr - mbst.mbst_bus_start) + off)); #else # error must define one of CHIP_IO or CHIP_MEM #endif }
static paddr_t __BS(mmap)(void *v, bus_addr_t addr, off_t off, int prot, int flags) { #ifdef CHIP_IO /* Not supported for I/O space. */ return (-1); #elif defined(CHIP_MEM) paddr_t ret; struct mips_bus_space_translation mbst; int error; /* * Get the translation for this address. */ error = __BS(translate)(v, addr, off + PAGE_SIZE, flags, &mbst); if (error) return (-1); ret = mbst.mbst_sys_start + (addr - mbst.mbst_bus_start) + off; #if defined(_MIPS_PADDR_T_64BIT) || defined(_LP64) if (flags & BUS_SPACE_MAP_PREFETCHABLE) { ret |= PGC_PREFETCH; } #endif return (mips_btop(ret)); #else # error must define one of CHIP_IO or CHIP_MEM #endif }
/* * Common functin for mmap(2)'ing DMA-safe memory. May be called by * bus-specific DMA mmap(2)'ing functions. */ paddr_t _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, off_t off, int prot, int flags) { int i; paddr_t pa; for (i = 0; i < nsegs; i++) { #ifdef DIAGNOSTIC if (off & PGOFSET) panic("_bus_dmamem_mmap: offset unaligned"); if (segs[i].ds_addr & PGOFSET) panic("_bus_dmamem_mmap: segment unaligned"); if (segs[i].ds_len & PGOFSET) panic("_bus_dmamem_mmap: segment size not multiple" " of page size"); #endif if (off >= segs[i].ds_len) { off -= segs[i].ds_len; continue; } pa = (paddr_t)segs[i].ds_addr + off; return mips_btop(pa); } /* Page not found. */ return (-1); }
void tx3912video_hpcfbinit(struct tx3912video_softc *sc) { struct video_chip *chip = sc->sc_chip; struct hpcfb_fbconf *fb = &sc->sc_fbconf; vaddr_t fbvaddr = (vaddr_t)MIPS_PHYS_TO_KSEG1(chip->vc_fbpaddr); memset(fb, 0, sizeof(struct hpcfb_fbconf)); fb->hf_conf_index = 0; /* configuration index */ fb->hf_nconfs = 1; /* how many configurations */ strncpy(fb->hf_name, "TX3912 built-in video", HPCFB_MAXNAMELEN); /* frame buffer name */ strncpy(fb->hf_conf_name, "LCD", HPCFB_MAXNAMELEN); /* configuration name */ fb->hf_height = chip->vc_fbheight; fb->hf_width = chip->vc_fbwidth; fb->hf_baseaddr = (u_long)fbvaddr; fb->hf_offset = (u_long)fbvaddr - mips_ptob(mips_btop(fbvaddr)); /* frame buffer start offset */ fb->hf_bytes_per_line = (chip->vc_fbwidth * chip->vc_fbdepth) / NBBY; fb->hf_nplanes = 1; fb->hf_bytes_per_plane = chip->vc_fbheight * fb->hf_bytes_per_line; fb->hf_access_flags |= HPCFB_ACCESS_BYTE; fb->hf_access_flags |= HPCFB_ACCESS_WORD; fb->hf_access_flags |= HPCFB_ACCESS_DWORD; if (video_reverse_color()) fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; switch (chip->vc_fbdepth) { default: panic("tx3912video_hpcfbinit: not supported color depth"); /* NOTREACHED */ case 2: fb->hf_class = HPCFB_CLASS_GRAYSCALE; fb->hf_access_flags |= HPCFB_ACCESS_STATIC; fb->hf_pack_width = 8; fb->hf_pixels_per_pack = 4; fb->hf_pixel_width = 2; fb->hf_class_data_length = sizeof(struct hf_gray_tag); /* reserved for future use */ fb->hf_u.hf_gray.hf_flags = 0; break; case 8: fb->hf_class = HPCFB_CLASS_INDEXCOLOR; fb->hf_access_flags |= HPCFB_ACCESS_STATIC; fb->hf_pack_width = 8; fb->hf_pixels_per_pack = 1; fb->hf_pixel_width = 8; fb->hf_class_data_length = sizeof(struct hf_indexed_tag); /* reserved for future use */ fb->hf_u.hf_indexed.hf_flags = 0; break; } }
/*ARGSUSED*/ paddr_t mmmmap(dev_t dev, off_t off, int prot) { #ifdef APERTURE if (minor(dev) == 4) { if (off >= 0x0000 && off < 0x10000) { off += sys_config.pci_io[0].bus_base; return mips_btop(off); } else if (off >= 0xa0000 && off < 0x10000000) { off += sys_config.pci_mem[0].bus_base; return mips_btop(off); } else { return -1; } } #endif return -1; }
static paddr_t light_mmap(void *c, void *vs, off_t off, int prot) { struct light_devconfig *dc = c; if (off >= 0x7fff) return (-1); return (mips_btop(dc->dc_addr + off)); }
paddr_t mq200_mmap(void *ctx, off_t offset, int prot) { struct mq200_softc *sc = (struct mq200_softc *)ctx; if (offset < 0 || MQ200_MAPSIZE <= offset) return -1; return mips_btop(sc->sc_baseaddr + offset); }
static paddr_t newport_mmap(void *c, off_t offset, int prot) { struct newport_devconfig *dc = c; if ( offset >= 0xfffff) return -1; return mips_btop(dc->dc_addr + offset); }
/* * Common functin for mmap(2)'ing DMA-safe memory. May be called by * bus-specific DMA mmap(2)'ing functions. */ paddr_t _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, off_t off, int prot, int flags) { int i; paddr_t pa; for (i = 0; i < nsegs; i++) { #ifdef DIAGNOSTIC if (off & PGOFSET) panic("_bus_dmamem_mmap: offset unaligned"); if (segs[i].ds_addr & PGOFSET) panic("_bus_dmamem_mmap: segment unaligned"); if (segs[i].ds_len & PGOFSET) panic("_bus_dmamem_mmap: segment size not multiple" " of page size"); #endif if (off >= segs[i].ds_len) { off -= segs[i].ds_len; continue; } pa = (paddr_t)segs[i].ds_addr + off; /* * This is for machines which use normal RAM as video memory, so userland can * mmap() it and treat it like device memory, which is normally uncached. * Needed for X11 on SGI O2, will likely be needed on things like CI20. */ #if defined(_MIPS_PADDR_T_64BIT) || defined(_LP64) if (flags & BUS_DMA_PREFETCHABLE ) { return (mips_btop(pa | PGC_NOCACHE)); } else return mips_btop(pa); #else return mips_btop(pa); #endif } /* Page not found. */ return (-1); }
/* * Common functin for mmap(2)'ing DMA-safe memory. May be called by * bus-specific DMA mmap(2)'ing functions. */ paddr_t _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, off_t off, int prot, int flags) { bus_addr_t rv; rv = _bus_dmamem_mmap_common(t, segs, nsegs, off, prot, flags); if (rv == (bus_addr_t)-1) return (-1); return (mips_btop((char *)rv)); }
paddr_t xafb_mmap(void *v, void *vs, off_t offset, int prot) { struct xafb_softc *sc = v; struct xafb_devconfig *dc = sc->sc_dc; struct rasops_info *ri = &dc->dc_ri; if (offset >= (ri->ri_stride * ri->ri_height) || offset < 0) return -1; return mips_btop(dc->dc_fbpaddr + offset); }
paddr_t tx3912video_mmap(void *ctx, off_t offset, int prot) { struct tx3912video_softc *sc = (struct tx3912video_softc *)ctx; if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane + sc->sc_fbconf.hf_offset) < offset) { return (-1); } return (mips_btop(sc->sc_chip->vc_fbpaddr + offset)); }
paddr_t au_himem_mmap(void *cookie, bus_addr_t addr, off_t off, int prot, int flags) { au_himem_cookie_t *c = (au_himem_cookie_t *)cookie; /* I/O spaces should not be directly mmap'ed */ if (c->c_flags & AU_HIMEM_SPACE_IO) return -1; if (addr < c->c_start || (addr + off) >= c->c_end) return -1; return mips_btop(c->c_physoff + addr + off); }
paddr_t arc_bus_space_mmap(bus_space_tag_t bst, bus_addr_t addr, off_t off, int prot, int flags) { /* * XXX We do not disallow mmap'ing of EISA/PCI I/O space here, * XXX which we should be doing. */ if (addr < bst->bs_start || (addr + off) >= (bst->bs_start + bst->bs_size)) return -1; return mips_btop(bst->bs_pbase + (addr - bst->bs_start) + off); }
static int mq200_fbinit(struct hpcfb_fbconf *fb) { /* * get fb settings from bootinfo */ if (bootinfo == NULL || bootinfo->fb_addr == 0 || bootinfo->fb_line_bytes == 0 || bootinfo->fb_width == 0 || bootinfo->fb_height == 0) { printf("no frame buffer information.\n"); return (-1); } /* zero fill */ memset(fb, 0, sizeof(*fb)); fb->hf_conf_index = 0; /* configuration index */ fb->hf_nconfs = 1; /* how many configurations */ strcpy(fb->hf_name, "built-in video"); /* frame buffer name */ strcpy(fb->hf_conf_name, "default"); /* configuration name */ fb->hf_height = bootinfo->fb_height; fb->hf_width = bootinfo->fb_width; fb->hf_baseaddr = mips_ptob(mips_btop(bootinfo->fb_addr)); fb->hf_offset = (u_long)bootinfo->fb_addr - fb->hf_baseaddr; /* frame buffer start offset */ fb->hf_bytes_per_line = bootinfo->fb_line_bytes; fb->hf_nplanes = 1; fb->hf_bytes_per_plane = bootinfo->fb_height * bootinfo->fb_line_bytes; fb->hf_access_flags |= HPCFB_ACCESS_BYTE; fb->hf_access_flags |= HPCFB_ACCESS_WORD; fb->hf_access_flags |= HPCFB_ACCESS_DWORD; switch (bootinfo->fb_type) { /* * monochrome */ case BIFB_D1_M2L_1: fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; /* fall through */ case BIFB_D1_M2L_0: fb->hf_class = HPCFB_CLASS_GRAYSCALE; fb->hf_access_flags |= HPCFB_ACCESS_STATIC; fb->hf_pack_width = 8; fb->hf_pixels_per_pack = 8; fb->hf_pixel_width = 1; fb->hf_class_data_length = sizeof(struct hf_gray_tag); fb->hf_u.hf_gray.hf_flags = 0; /* reserved for future use */ break; /* * gray scale */ case BIFB_D2_M2L_3: case BIFB_D2_M2L_3x2: fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; /* fall through */ case BIFB_D2_M2L_0: case BIFB_D2_M2L_0x2: fb->hf_class = HPCFB_CLASS_GRAYSCALE; fb->hf_access_flags |= HPCFB_ACCESS_STATIC; fb->hf_pack_width = 8; fb->hf_pixels_per_pack = 4; fb->hf_pixel_width = 2; fb->hf_class_data_length = sizeof(struct hf_gray_tag); fb->hf_u.hf_gray.hf_flags = 0; /* reserved for future use */ break; case BIFB_D4_M2L_F: case BIFB_D4_M2L_Fx2: fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; /* fall through */ case BIFB_D4_M2L_0: case BIFB_D4_M2L_0x2: fb->hf_class = HPCFB_CLASS_GRAYSCALE; fb->hf_access_flags |= HPCFB_ACCESS_STATIC; fb->hf_pack_width = 8; fb->hf_pixels_per_pack = 2; fb->hf_pixel_width = 4; fb->hf_class_data_length = sizeof(struct hf_gray_tag); fb->hf_u.hf_gray.hf_flags = 0; /* reserved for future use */ break; /* * indexed color */ case BIFB_D8_FF: fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; /* fall through */ case BIFB_D8_00: fb->hf_class = HPCFB_CLASS_INDEXCOLOR; fb->hf_access_flags |= HPCFB_ACCESS_STATIC; fb->hf_pack_width = 8; fb->hf_pixels_per_pack = 1; fb->hf_pixel_width = 8; fb->hf_class_data_length = sizeof(struct hf_indexed_tag); fb->hf_u.hf_indexed.hf_flags = 0; /* reserved for future use */ break; /* * RGB color */ case BIFB_D16_FFFF: fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; /* fall through */ case BIFB_D16_0000: fb->hf_class = HPCFB_CLASS_RGBCOLOR; fb->hf_access_flags |= HPCFB_ACCESS_STATIC; fb->hf_order_flags = HPCFB_REVORDER_BYTE; fb->hf_pack_width = 16; fb->hf_pixels_per_pack = 1; fb->hf_pixel_width = 16; fb->hf_class_data_length = sizeof(struct hf_rgb_tag); fb->hf_u.hf_rgb.hf_flags = 0; /* reserved for future use */ fb->hf_u.hf_rgb.hf_red_width = 5; fb->hf_u.hf_rgb.hf_red_shift = 11; fb->hf_u.hf_rgb.hf_green_width = 6; fb->hf_u.hf_rgb.hf_green_shift = 5; fb->hf_u.hf_rgb.hf_blue_width = 5; fb->hf_u.hf_rgb.hf_blue_shift = 0; fb->hf_u.hf_rgb.hf_alpha_width = 0; fb->hf_u.hf_rgb.hf_alpha_shift = 0; break; default: printf("unknown type (=%d).\n", bootinfo->fb_type); return (-1); break; } return (0); /* no error */ }
void mq200_attach(struct mq200_softc *sc) { unsigned long regval; struct hpcfb_attach_args ha; int console = (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) ? 0 : 1; printf(": "); if (mq200_fbinit(&sc->sc_fbconf) != 0) { /* just return so that hpcfb will not be attached */ return; } sc->sc_fbconf.hf_baseaddr = (u_long)bootinfo->fb_addr; sc->sc_fbconf.hf_offset = (u_long)sc->sc_fbconf.hf_baseaddr - MIPS_PHYS_TO_KSEG1(mips_ptob(mips_btop(sc->sc_baseaddr))); DPRINTF("hf_baseaddr=%lx\n", sc->sc_fbconf.hf_baseaddr); DPRINTF("hf_offset=%lx\n", sc->sc_fbconf.hf_offset); regval = mq200_read(sc, MQ200_PC08R); printf("MQ200 Rev.%02lx video controller", regval & 0xff); if (console) { printf(", console"); } printf("\n"); printf("%s: framebuffer address: 0x%08lx\n", device_xname(sc->sc_dev), (u_long)bootinfo->fb_addr); /* * setup registers */ sc->sc_flags = 0; sc->sc_baseclock = 12288; /* 12.288 MHz */ #ifdef MQ200_DEBUG if (bootverbose) { /* dump current setting */ mq200_dump_all(sc); mq200_dump_pll(sc); } #endif mq200_setup_regctx(sc); mq200_mdsetup(sc); if (sc->sc_md) { int mode; switch (sc->sc_fbconf.hf_pixel_width) { case 1: mode = MQ200_GCC_1BPP; break; case 2: mode = MQ200_GCC_2BPP; break; case 4: mode = MQ200_GCC_4BPP; break; case 8: mode = MQ200_GCC_8BPP; break; case 16: mode = MQ200_GCC_16BPP_DIRECT; break; default: printf("%s: %dbpp isn't supported\n", device_xname(sc->sc_dev), sc->sc_fbconf.hf_pixel_width); return; } if (sc->sc_md->md_flags & MQ200_MD_HAVEFP) { sc->sc_flags |= MQ200_SC_GC2_ENABLE; /* FP */ } #if MQ200_USECRT if (sc->sc_md->md_flags & MQ200_MD_HAVECRT) { int i; sc->sc_flags |= MQ200_SC_GC1_ENABLE; /* CRT */ for (i = 0; i < mq200_crt_nparams; i++) { sc->sc_crt = &mq200_crt_params[i]; if (sc->sc_md->md_fp_width <= mq200_crt_params[i].width && sc->sc_md->md_fp_height <= mq200_crt_params[i].height) break; } } #endif mq200_setup(sc); if (sc->sc_flags & MQ200_SC_GC2_ENABLE) /* FP */ mq200_win_enable(sc, MQ200_GC2, mode, sc->sc_fbconf.hf_baseaddr, sc->sc_fbconf.hf_width, sc->sc_fbconf.hf_height, sc->sc_fbconf.hf_bytes_per_plane); if (sc->sc_flags & MQ200_SC_GC1_ENABLE) /* CRT */ mq200_win_enable(sc, MQ200_GC1, mode, sc->sc_fbconf.hf_baseaddr, sc->sc_fbconf.hf_width, sc->sc_fbconf.hf_height, sc->sc_fbconf.hf_bytes_per_plane); } #ifdef MQ200_DEBUG if (sc->sc_md == NULL || bootverbose) { mq200_dump_pll(sc); } #endif /* Add a power hook to power saving */ sc->sc_mq200pwstate = MQ200_POWERSTATE_D0; sc->sc_powerhook = powerhook_establish(device_xname(sc->sc_dev), mq200_power, sc); if (sc->sc_powerhook == NULL) printf("%s: WARNING: unable to establish power hook\n", device_xname(sc->sc_dev)); /* Add a hard power hook to power saving */ sc->sc_hardpowerhook = config_hook(CONFIG_HOOK_PMEVENT, CONFIG_HOOK_PMEVENT_HARDPOWER, CONFIG_HOOK_SHARE, mq200_hardpower, sc); if (sc->sc_hardpowerhook == NULL) printf("%s: WARNING: unable to establish hard power hook\n", device_xname(sc->sc_dev)); /* initialize backlight brightness and lcd contrast */ sc->sc_lcd_inited = 0; mq200_init_brightness(sc, 1); mq200_init_contrast(sc, 1); mq200_init_backlight(sc, 1); if (console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { panic("mq200_attach: can't init fb console"); } ha.ha_console = console; ha.ha_accessops = &mq200_ha; ha.ha_accessctx = sc; ha.ha_curfbconf = 0; ha.ha_nfbconf = 1; ha.ha_fbconflist = &sc->sc_fbconf; ha.ha_curdspconf = 0; ha.ha_ndspconf = 1; ha.ha_dspconflist = &sc->sc_dspconf; config_found(sc->sc_dev, &ha, hpcfbprint); #if NBIVIDEO > 0 /* * bivideo is no longer need */ bivideo_dont_attach = 1; #endif /* NBIVIDEO > 0 */ }