static int mantis_uart_setup(struct mantis_pci *mantis, struct mantis_uart_params *params) { u32 reg; mmwrite((mmread(MANTIS_UART_CTL) | (params->parity & 0x3)), MANTIS_UART_CTL); reg = mmread(MANTIS_UART_BAUD); switch (params->baud_rate) { case MANTIS_BAUD_9600: reg |= 0xd8; break; case MANTIS_BAUD_19200: reg |= 0x6c; break; case MANTIS_BAUD_38400: reg |= 0x36; break; case MANTIS_BAUD_57600: reg |= 0x23; break; case MANTIS_BAUD_115200: reg |= 0x11; break; default: return -EINVAL; } mmwrite(reg, MANTIS_UART_BAUD); return 0; }
void mantis_pcmcia_exit(struct mantis_ca *ca) { struct mantis_pci *mantis = ca->ca_priv; mmwrite(mmread(MANTIS_GPIF_STATUS) & (~MANTIS_CARD_PLUGOUT | ~MANTIS_CARD_PLUGIN), MANTIS_GPIF_STATUS); mmwrite(mmread(MANTIS_INT_MASK) & ~MANTIS_INT_IRQ0, MANTIS_INT_MASK); }
int mantis_pcmcia_init(struct mantis_ca *ca) { struct mantis_pci *mantis = ca->ca_priv; u32 gpif_stat, card_stat; mmwrite(mmread(MANTIS_INT_MASK) | MANTIS_INT_IRQ0, MANTIS_INT_MASK); gpif_stat = mmread(MANTIS_GPIF_STATUS); card_stat = mmread(MANTIS_GPIF_IRQCFG); if (gpif_stat & MANTIS_GPIF_DETSTAT) { dprintk(MANTIS_DEBUG, 1, "CAM found on Adapter(%d) Slot(0)", mantis->num); mmwrite(card_stat | MANTIS_MASK_PLUGOUT, MANTIS_GPIF_IRQCFG); ca->slot_state = MODULE_INSERTED; dvb_ca_en50221_camchange_irq(&ca->en50221, 0, DVB_CA_EN50221_CAMCHANGE_INSERTED); } else { dprintk(MANTIS_DEBUG, 1, "Empty Slot on Adapter(%d) Slot(0)", mantis->num); mmwrite(card_stat | MANTIS_MASK_PLUGIN, MANTIS_GPIF_IRQCFG); ca->slot_state = MODULE_XTRACTED; dvb_ca_en50221_camchange_irq(&ca->en50221, 0, DVB_CA_EN50221_CAMCHANGE_REMOVED); } return 0; }
static void mantis_hifevm_work(struct work_struct *work) { struct mantis_ca *ca = container_of(work, struct mantis_ca, hif_evm_work); struct mantis_pci *mantis = ca->ca_priv; u32 gpif_stat, gpif_mask; gpif_stat = mmread(MANTIS_GPIF_STATUS); gpif_mask = mmread(MANTIS_GPIF_IRQCFG); if (gpif_stat & MANTIS_GPIF_DETSTAT) { if (gpif_stat & MANTIS_CARD_PLUGIN) { dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): CAM Plugin", mantis->num); mmwrite(0xdada0000, MANTIS_CARD_RESET); mantis_event_cam_plugin(ca); dvb_ca_en50221_camchange_irq(&ca->en50221, 0, DVB_CA_EN50221_CAMCHANGE_INSERTED); } } else { if (gpif_stat & MANTIS_CARD_PLUGOUT) { dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): CAM Unplug", mantis->num); mmwrite(0xdada0000, MANTIS_CARD_RESET); mantis_event_cam_unplug(ca); dvb_ca_en50221_camchange_irq(&ca->en50221, 0, DVB_CA_EN50221_CAMCHANGE_REMOVED); } } if (mantis->gpif_status & MANTIS_GPIF_EXTIRQ) dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Ext IRQ", mantis->num); if (mantis->gpif_status & MANTIS_SBUF_WSTO) dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Timeout", mantis->num); if (mantis->gpif_status & MANTIS_GPIF_OTHERR) dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Alignment Error", mantis->num); if (gpif_stat & MANTIS_SBUF_OVFLW) dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Overflow", mantis->num); if (gpif_stat & MANTIS_GPIF_BRRDY) dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Read Ready", mantis->num); if (gpif_stat & MANTIS_GPIF_INTSTAT) dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): GPIF IRQ", mantis->num); if (gpif_stat & MANTIS_SBUF_EMPTY) dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Empty", mantis->num); if (gpif_stat & MANTIS_SBUF_OPDONE) { dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer operation complete", mantis->num); ca->sbuf_status = MANTIS_SBUF_DATA_AVAIL; ca->hif_event = MANTIS_SBUF_OPDONE; wake_up(&ca->hif_opdone_wq); } }
void mantis_dma_stop(struct mantis_pci *mantis) { dprintk(MANTIS_DEBUG, 1, "Mantis Stop DMA engine"); mmwrite((mmread(MANTIS_GPIF_ADDR) & (~(MANTIS_GPIF_HIFRDWRN))), MANTIS_GPIF_ADDR); mmwrite((mmread(MANTIS_DMA_CTL) & ~(MANTIS_FIFO_EN | MANTIS_DCAP_EN | MANTIS_RISC_EN)), MANTIS_DMA_CTL); mmwrite(mmread(MANTIS_INT_STAT), MANTIS_INT_STAT); mantis_mask_ints(mantis, MANTIS_INT_RISCI | MANTIS_INT_RISCEN); }
static int mantis_ca_slot_reset(struct dvb_ca_en50221 *en50221, int slot) { struct mantis_ca *ca = en50221->data; struct mantis_pci *mantis = ca->ca_priv; dprintk(MANTIS_DEBUG, 1, "Slot(%d): Slot RESET", slot); udelay(500); /* Wait.. */ mmwrite(0xda, MANTIS_PCMCIA_RESET); /* Leading edge assert */ udelay(500); mmwrite(0x00, MANTIS_PCMCIA_RESET); /* Trailing edge deassert */ msleep(1000); dvb_ca_en50221_camready_irq(&ca->en50221, 0); return 0; }
int mantis_hif_init(struct mantis_ca *ca) { struct mantis_slot *slot = ca->slot; struct mantis_pci *mantis = ca->ca_priv; u32 irqcfg; slot[0].slave_cfg = 0x70773028; #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num); #else d; #endif mutex_lock(&ca->ca_lock); irqcfg = mmread(MANTIS_GPIF_IRQCFG); irqcfg = MANTIS_MASK_BRRDY | MANTIS_MASK_WRACK | MANTIS_MASK_EXTIRQ | MANTIS_MASK_WSTO | MANTIS_MASK_OTHERR | MANTIS_MASK_OVFLW; mmwrite(irqcfg, MANTIS_GPIF_IRQCFG); mutex_unlock(&ca->ca_lock); return 0; }
int vp1034_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) { struct mantis_pci *mantis = fe->dvb->priv; switch (voltage) { case SEC_VOLTAGE_13: dprintk(MANTIS_ERROR, 1, "Polarization=[13V]"); mantis_gpio_set_bits(mantis, 13, 1); mantis_gpio_set_bits(mantis, 14, 0); break; case SEC_VOLTAGE_18: dprintk(MANTIS_ERROR, 1, "Polarization=[18V]"); mantis_gpio_set_bits(mantis, 13, 1); mantis_gpio_set_bits(mantis, 14, 1); break; case SEC_VOLTAGE_OFF: dprintk(MANTIS_ERROR, 1, "Frontend (dummy) POWERDOWN"); break; default: dprintk(MANTIS_ERROR, 1, "Invalid = (%d)", (u32) voltage); return -EINVAL; } mmwrite(0x00, MANTIS_GPIF_DOUT); return 0; }
void mantis_dma_start(struct mantis_pci *mantis) { dprintk(MANTIS_DEBUG, 1, "Mantis Start DMA engine"); mantis_risc_program(mantis); mmwrite(mantis->risc_dma, MANTIS_RISC_START); mmwrite(mmread(MANTIS_GPIF_ADDR) | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR); mmwrite(0, MANTIS_DMA_CTL); mantis->last_block = mantis->busy_block = 0; mmwrite(mmread(MANTIS_INT_MASK) | MANTIS_INT_RISCI, MANTIS_INT_MASK); mmwrite(MANTIS_FIFO_EN | MANTIS_DCAP_EN | MANTIS_RISC_EN, MANTIS_DMA_CTL); }
static int mantis_i2c_read(struct mantis_pci *mantis, const struct i2c_msg *msg) { u32 rxd, i, stat, trials; dprintk(MANTIS_INFO, 0, " %s: Address=[0x%02x] <R>[ ", __func__, msg->addr); for (i = 0; i < msg->len; i++) { rxd = (msg->addr << 25) | (1 << 24) | MANTIS_I2C_RATE_3 | MANTIS_I2C_STOP | MANTIS_I2C_PGMODE; if (i == (msg->len - 1)) rxd &= ~MANTIS_I2C_STOP; mmwrite(MANTIS_INT_I2CDONE, MANTIS_INT_STAT); mmwrite(rxd, MANTIS_I2CDATA_CTL); /* wait for xfer completion */ for (trials = 0; trials < TRIALS; trials++) { stat = mmread(MANTIS_INT_STAT); if (stat & MANTIS_INT_I2CDONE) break; } dprintk(MANTIS_TMG, 0, "I2CDONE: trials=%d\n", trials); /* wait for xfer completion */ for (trials = 0; trials < TRIALS; trials++) { stat = mmread(MANTIS_INT_STAT); if (stat & MANTIS_INT_I2CRACK) break; } dprintk(MANTIS_TMG, 0, "I2CRACK: trials=%d\n", trials); rxd = mmread(MANTIS_I2CDATA_CTL); msg->buf[i] = (u8)((rxd >> 8) & 0xFF); dprintk(MANTIS_INFO, 0, "%02x ", msg->buf[i]); } dprintk(MANTIS_INFO, 0, "]\n"); return 0; }
/* * If Slot state is already UN_PLUG event and we are called * again, definitely it is jitter alone */ void mantis_event_cam_unplug(struct mantis_ca *ca) { struct mantis_pci *mantis = ca->ca_priv; u32 gpif_irqcfg; if (ca->slot_state == MODULE_INSERTED) { dprintk(MANTIS_DEBUG, 1, "Event: CAM Unplugged: Adapter(%d) Slot(0)", mantis->num); udelay(50); mmwrite(0x00da0000, MANTIS_CARD_RESET); gpif_irqcfg = mmread(MANTIS_GPIF_IRQCFG); gpif_irqcfg |= MANTIS_MASK_PLUGIN; gpif_irqcfg &= ~MANTIS_MASK_PLUGOUT; mmwrite(gpif_irqcfg, MANTIS_GPIF_IRQCFG); udelay(500); ca->slot_state = MODULE_XTRACTED; } udelay(100); }
void mantis_dma_stop(struct mantis_pci *mantis) { u32 stat = 0, mask = 0; stat = mmread(MANTIS_INT_STAT); mask = mmread(MANTIS_INT_MASK); dprintk(MANTIS_DEBUG, 1, "Mantis Stop DMA engine"); mmwrite((mmread(MANTIS_GPIF_ADDR) & (~(MANTIS_GPIF_HIFRDWRN))), MANTIS_GPIF_ADDR); mmwrite((mmread(MANTIS_DMA_CTL) & ~(MANTIS_FIFO_EN | MANTIS_DCAP_EN | MANTIS_RISC_EN)), MANTIS_DMA_CTL); mmwrite(mmread(MANTIS_INT_STAT), MANTIS_INT_STAT); mmwrite(mmread(MANTIS_INT_MASK) & ~(MANTIS_INT_RISCI | MANTIS_INT_RISCEN), MANTIS_INT_MASK); }
int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr) { struct mantis_pci *mantis = ca->ca_priv; u32 data, hif_addr = 0; #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num); #else d; #endif mutex_lock(&ca->ca_lock); hif_addr &= ~MANTIS_GPIF_PCMCIAREG; hif_addr |= MANTIS_GPIF_PCMCIAIOM; hif_addr |= MANTIS_HIF_STATUS; hif_addr |= addr; mmwrite(hif_addr, MANTIS_GPIF_BRADDR); mmwrite(1, MANTIS_GPIF_BRBYTES); udelay(20); mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR); if (mantis_hif_sbuf_opdone_wait(ca) != 0) { #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num); #else d; #endif mutex_unlock(&ca->ca_lock); return -EREMOTEIO; } data = mmread(MANTIS_GPIF_DIN); #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data); #else d; #endif udelay(50); mutex_unlock(&ca->ca_lock); return (u8) data; }
int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data) { struct mantis_slot *slot = ca->slot; struct mantis_pci *mantis = ca->ca_priv; u32 hif_addr = 0; #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num); #else d; #endif mutex_lock(&ca->ca_lock); hif_addr &= ~MANTIS_GPIF_HIFRDWRN; hif_addr &= ~MANTIS_GPIF_PCMCIAREG; hif_addr &= ~MANTIS_GPIF_PCMCIAIOM; hif_addr |= MANTIS_HIF_STATUS; hif_addr |= addr; mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */ mmwrite(hif_addr, MANTIS_GPIF_ADDR); mmwrite(data, MANTIS_GPIF_DOUT); if (mantis_hif_write_wait(ca) != 0) { #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num); #else d; #endif mutex_unlock(&ca->ca_lock); return -EREMOTEIO; } #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr); #else d; #endif mutex_unlock(&ca->ca_lock); return 0; }
static int mantis_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) { int ret = 0, i = 0, trials; u32 stat, data, txd; struct mantis_pci *mantis; struct mantis_hwconfig *config; mantis = i2c_get_adapdata(adapter); BUG_ON(!mantis); config = mantis->hwconfig; BUG_ON(!config); dprintk(MANTIS_DEBUG, 1, "Messages:%d", num); mutex_lock(&mantis->i2c_lock); while (i < num) { /* Byte MODE */ if ((config->i2c_mode & MANTIS_BYTE_MODE) && ((i + 1) < num) && (msgs[i].len < 2) && (msgs[i + 1].len < 2) && (msgs[i + 1].flags & I2C_M_RD)) { dprintk(MANTIS_DEBUG, 0, " Byte MODE:\n"); /* Read operation */ txd = msgs[i].addr << 25 | (0x1 << 24) | (msgs[i].buf[0] << 16) | MANTIS_I2C_RATE_3; mmwrite(txd, MANTIS_I2CDATA_CTL); /* wait for xfer completion */ for (trials = 0; trials < TRIALS; trials++) { stat = mmread(MANTIS_INT_STAT); if (stat & MANTIS_INT_I2CDONE) break; } /* check for xfer completion */ if (stat & MANTIS_INT_I2CDONE) { /* check xfer was acknowledged */ if (stat & MANTIS_INT_I2CRACK) { data = mmread(MANTIS_I2CDATA_CTL); msgs[i + 1].buf[0] = (data >> 8) & 0xff; dprintk(MANTIS_DEBUG, 0, " Byte <%d> RXD=0x%02x [%02x]\n", 0x0, data, msgs[i + 1].buf[0]); } else { /* I/O error */ dprintk(MANTIS_ERROR, 1, " I/O error, LINE:%d", __LINE__); ret = -EIO; break; } } else {
int mantis_uart_init(struct mantis_pci *mantis) { struct mantis_hwconfig *config = mantis->hwconfig; struct mantis_uart_params params; /* default parity: */ params.baud_rate = config->baud_rate; params.parity = config->parity; dprintk(MANTIS_INFO, 1, "Initializing UART @ %sbps parity:%s", rates[params.baud_rate].string, parity[params.parity].string); init_waitqueue_head(&mantis->uart_wq); spin_lock_init(&mantis->uart_lock); INIT_WORK(&mantis->uart_work, mantis_uart_work); /* disable interrupt */ mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL); mantis_uart_setup(mantis, ¶ms); /* default 1 byte */ mmwrite((mmread(MANTIS_UART_BAUD) | (config->bytes << 8)), MANTIS_UART_BAUD); /* flush buffer */ mmwrite((mmread(MANTIS_UART_CTL) | MANTIS_UART_RXFLUSH), MANTIS_UART_CTL); /* enable interrupt */ mmwrite(mmread(MANTIS_INT_MASK) | 0x800, MANTIS_INT_MASK); mmwrite(mmread(MANTIS_UART_CTL) | MANTIS_UART_RXINT, MANTIS_UART_CTL); schedule_work(&mantis->uart_work); dprintk(MANTIS_DEBUG, 1, "UART successfully initialized"); return 0; }
void mantis_hif_exit(struct mantis_ca *ca) { struct mantis_pci *mantis = ca->ca_priv; u32 irqcfg; #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num); #else d; #endif mutex_lock(&ca->ca_lock); irqcfg = mmread(MANTIS_GPIF_IRQCFG); irqcfg &= ~MANTIS_MASK_BRRDY; mmwrite(irqcfg, MANTIS_GPIF_IRQCFG); mutex_unlock(&ca->ca_lock); }
int mantis_dma_init(struct mantis_pci *mantis) { int err = 0; dprintk(MANTIS_DEBUG, 1, "Mantis DMA init"); if (mantis_alloc_buffers(mantis) < 0) { dprintk(MANTIS_ERROR, 1, "Error allocating DMA buffer"); /* Stop RISC Engine */ mmwrite(0, MANTIS_DMA_CTL); goto err; } return 0; err: return err; }
void mantis_uart_exit(struct mantis_pci *mantis) { /* disable interrupt */ mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL); flush_work(&mantis->uart_work); }
static irqreturn_t hopper_irq_handler(int irq, void *dev_id) { u32 stat = 0, mask = 0; u32 rst_stat = 0, rst_mask = 0; struct mantis_pci *mantis; struct mantis_ca *ca; mantis = (struct mantis_pci *) dev_id; if (unlikely(mantis == NULL)) { dprintk(MANTIS_ERROR, 1, "Mantis == NULL"); return IRQ_NONE; } ca = mantis->mantis_ca; stat = mmread(MANTIS_INT_STAT); mask = mmread(MANTIS_INT_MASK); if (!(stat & mask)) return IRQ_NONE; rst_mask = MANTIS_GPIF_WRACK | MANTIS_GPIF_OTHERR | MANTIS_SBUF_WSTO | MANTIS_GPIF_EXTIRQ; rst_stat = mmread(MANTIS_GPIF_STATUS); rst_stat &= rst_mask; mmwrite(rst_stat, MANTIS_GPIF_STATUS); mantis->mantis_int_stat = stat; mantis->mantis_int_mask = mask; dprintk(MANTIS_DEBUG, 0, "\n-- Stat=<%02x> Mask=<%02x> --", stat, mask); if (stat & MANTIS_INT_RISCEN) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[0]); } if (stat & MANTIS_INT_IRQ0) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[1]); mantis->gpif_status = rst_stat; wake_up(&ca->hif_write_wq); schedule_work(&ca->hif_evm_work); } if (stat & MANTIS_INT_IRQ1) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[2]); spin_lock(&mantis->intmask_lock); mmwrite(mmread(MANTIS_INT_MASK) & ~MANTIS_INT_IRQ1, MANTIS_INT_MASK); spin_unlock(&mantis->intmask_lock); schedule_work(&mantis->uart_work); } if (stat & MANTIS_INT_OCERR) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[3]); } if (stat & MANTIS_INT_PABORT) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[4]); } if (stat & MANTIS_INT_RIPERR) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[5]); } if (stat & MANTIS_INT_PPERR) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[6]); } if (stat & MANTIS_INT_FTRGT) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[7]); } if (stat & MANTIS_INT_RISCI) { dprintk(MANTIS_DEBUG, 0, "<%s>", label[8]); mantis->busy_block = (stat & MANTIS_INT_RISCSTAT) >> 28; tasklet_schedule(&mantis->tasklet); }
static int mantis_i2c_write(struct mantis_pci *mantis, const struct i2c_msg *msg) { int i; u32 txd = 0, stat, trials; #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_INFO, 0, " %s: Address=[0x%02x] <W>[ ", __func__, msg->addr); #else d; #endif for (i = 0; i < msg->len; i++) { #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_INFO, 0, "%02x ", msg->buf[i]); #else d; #endif txd = (msg->addr << 25) | (msg->buf[i] << 8) | MANTIS_I2C_RATE_3 | MANTIS_I2C_STOP | MANTIS_I2C_PGMODE; if (i == (msg->len - 1)) txd &= ~MANTIS_I2C_STOP; mmwrite(MANTIS_INT_I2CDONE, MANTIS_INT_STAT); mmwrite(txd, MANTIS_I2CDATA_CTL); /* wait for xfer completion */ for (trials = 0; trials < TRIALS; trials++) { stat = mmread(MANTIS_INT_STAT); if (stat & MANTIS_INT_I2CDONE) break; } #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_TMG, 0, "I2CDONE: trials=%d\n", trials); #else d; #endif /* wait for xfer completion */ for (trials = 0; trials < TRIALS; trials++) { stat = mmread(MANTIS_INT_STAT); if (stat & MANTIS_INT_I2CRACK) break; } #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_TMG, 0, "I2CRACK: trials=%d\n", trials); #else d; #endif } #ifdef CONFIG_DEBUG_PRINTK dprintk(MANTIS_INFO, 0, "]\n"); #else d; #endif return 0; }