void UARTStdioInit(void) {
/* Performing the Pin Multiplexing for UART0 instance. */
/* RXD */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RXD(0)) =
(CONTROL_CONF_UART0_RXD_CONF_UART0_RXD_PUTYPESEL |
CONTROL_CONF_UART0_RXD_CONF_UART0_RXD_RXACTIVE);
/* TXD */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_TXD(0)) =
CONTROL_CONF_UART0_TXD_CONF_UART0_TXD_PUTYPESEL;
moduleEnable(MODULE_ID_UART0);
UARTModuleReset(UART_CONSOLE_BASE);
/* Performing FIFO configurations. */
UartFIFOConfigure(1, 1);
/* Performing Baud Rate settings. */
UartBaudRateSet(115200);
/* Switching to Configuration Mode B. */
UARTRegConfigModeEnable(UART_CONSOLE_BASE, UART_REG_CONFIG_MODE_B);
/* Programming the Line Characteristics. */
UARTLineCharacConfig(UART_CONSOLE_BASE,
(UART_FRAME_WORD_LENGTH_8 | UART_FRAME_NUM_STB_1),
UART_PARITY_NONE);
/* Disabling write access to Divisor Latches. */
UARTDivisorLatchDisable(UART_CONSOLE_BASE);
/* Disabling Break Control. */
UARTBreakCtl(UART_CONSOLE_BASE, UART_BREAK_COND_DISABLE);
/* Switching to UART16x operating mode. */
UARTOperatingModeSelect(UART_CONSOLE_BASE, UART16x_OPER_MODE);
}
int main(void) {
volatile unsigned int initFlg = 1;
platformInit();
static char buf[512];
static char fmmirrorbuf[512];
for(int i=0;i < sizeof buf; i++){
buf[i] = i;
}
////////////////////////////////////////////
//dmtimerInitForMatch(MODULE_ID_TIMER3,0xffffffff-0x7ffffff,(0xffffffff-0x7ffffff/2),DMTIMER_FLAG_INTENABLE_MATCH);
//////////////////////////////////////////////////////
/* spiFmromInit(fmmirrorbuf, sizeof fmmirrorbuf);
spiFmromRead(0, buf, 1);
spiFmromWren();
delay(500);
spiFmromWrite(0, buf, sizeof buf);
delay(500);
spiFmromRead(0, buf, sizeof buf);
while (1);*/
moduleEnable(MODULE_ID_GPIO0);
LCDRasterStart(); //lcd
LCDBackLightON();
MMCSDP_CtrlInfoInit(&mmcsdctr[0], MODULE_ID_MMCSD0, 48000000, MMCSD_BUSWIDTH_4BIT, 0,
&card0, NULL, NULL, NULL);
MMCSDP_CtrlInit(&mmcsdctr[0]);
MMCSDP_CardInit(&mmcsdctr[0], MMCSD_CARD_AUTO);
TouchCalibrate(0);
static FATFS inandfs;
f_mount(0, &inandfs);
initFont(FONT_LOAD_ADDR);
drawText();
}
/**
* @brief CAN控制器初始化
* @param [in] moduleId CAN控制器模块号 \b MODULE_ID_DCANX
* @param [in] mode
* - CAN_MODE_NORMAL \n - CAN_MODE_TEST_LOOPBACK \n
* - CAN_MODE_TEST_LOOPBACK_SILENT
* @param [in] bitRate CAN总线频率
* @return void
* @date 2013/5/7
* @note
* 示例代码如下：
* @code
*
* @endcode
*
* @pre
*
* @see
*/
void DCANInit(unsigned int moduleId,unsigned int mode,unsigned int bitRate){
MODULE *module = modulelist+moduleId;
unsigned int index = module->index;
g_can[index].fgSendFinish = 1;
unsigned int baseAdd = module->baseAddr;
unsigned int clkInFreq = module->moduleClk->fClk[0]->clockSpeedHz;
moduleEnable(moduleId);
DCANMsgRAMInit(index);
DCANReset(baseAdd);
DCANIntLineEnable(baseAdd,DCAN_INT_LINE0);
DCANIntEnable(baseAdd,DCAN_ERROR_INT);
if ((CAN_MODE_TEST_LOOPBACK==mode)){
DCANTestModeControl(baseAdd,DCAN_TEST_MODE_ENABLE);
DCANTestModesEnable(baseAdd,DCAN_TST_LPBCK_MD);
}
if (CAN_MODE_TEST_LOOPBACK_SILENT==mode) {
DCANTestModeControl(baseAdd,DCAN_TEST_MODE_ENABLE);
DCANTestModesEnable(baseAdd,DCAN_TST_LPBCK_SILENT_MD);
}
DCANConfigRegWriteAccessControl(baseAdd,DCAN_CONF_REG_WR_ACCESS_ENABLE);
CANSetBitTiming(baseAdd,clkInFreq,bitRate);
DCANConfigRegWriteAccessControl(baseAdd,DCAN_CONF_REG_WR_ACCESS_DISABLE);
CANRxMsgObjectConfig(baseAdd);
DCANNormalModeSet(baseAdd);
moduleIntConfigure(moduleId);
}
int main(void)
{
unsigned long i;
// Configurations.
clockConfiguration();
moduleEnable();
// Port.
portSetup();
// USB.
usbModuleSetup();
usbPipeSetup();
usbInterruptSetup();
//
irqConfiguration();
DEBUGFIFO_Init();
//HW_Init();
// TODO: add application code here
DEBUGFIFO_OutLine("============================");
DEBUGFIFO_OutLine("=== RX62 USB TEST Start! ===");
DEBUGFIFO_OutLine("============================");
DEBUGFIFO_OutLine("");
// Wait for setup;
for(i = 0; i < 0x017FFFFF; i++);
ledOn();
DEBUGFIFO_OutLine("LED ON.");
while (1) {
unsigned char c[3] = {0x00, 0x40, 0x40};
for(i = 0; i < 0x00400000; i++);
DEBUGFIFO_OutLine("Loop!");
p_pipe2Buf = &c[0];
pipe2BufCnt = 3;
USB0.BRDYENB.BIT.PIPE1BRDYE = 1;
}
return 0;
}
/**
* @brief LCDÄ£¿é³õʼ»¯
* @return none
* @date 2013/8/8
* @note
* @code
* @endcode
* @pre
* @see
*/
void LCDRasterInit() {
MODULE *module = modulelist+MODULE_ID_LCDC;
unsigned int baseaddr = module->baseAddr;
lcdCtrl.baseAddr = baseaddr;
lcdCtrl.lcd_clk = module->moduleClk->fClk[0]->clockSpeedHz;
const tLCD_PANEL *panel = lcd_panels + TFT_PANEL;
lcdCtrl.panel = panel;
lcdCtrl.activeframe = 0;
lcdCtrl.contexFrame = 0;
unsigned int pixsize = lcdCtrl.pixsize;
unsigned int width = lcd_panels[TFT_PANEL].width;
unsigned int height = lcd_panels[TFT_PANEL].height;
lcdCtrl.palettesize[0] = 32;
lcdCtrl.palettesize[1] = 32;
lcdCtrl.framesize[0] = (unsigned int)(pixsize * width * height);
lcdCtrl.framesize[1] = (unsigned int)(pixsize * width * height);
lcdCtrl.palette[0] = framebuffer;
lcdCtrl.frameaddr[0] = (void *)((unsigned int)framebuffer + 32);
lcdCtrl.palette[1] = (void *)((unsigned int)(lcdCtrl.frameaddr[0]) + lcdCtrl.framesize[0]);
lcdCtrl.frameaddr[1] = (void *)((unsigned int)lcdCtrl.palette[1] + 32);
lcdCtrl.activeframe = 0;
//init palette and framebuffer
memcpy(lcdCtrl.palette[0],palette_32b,lcdCtrl.palettesize[0]);
memcpy(lcdCtrl.palette[1],palette_32b,lcdCtrl.palettesize[1]);
memset(lcdCtrl.frameaddr[0], 0, lcdCtrl.pixsize * lcdCtrl.panel->height * lcdCtrl.panel->width);
memset(lcdCtrl.frameaddr[1], 0, lcdCtrl.pixsize * lcdCtrl.panel->height * lcdCtrl.panel->width);
moduleEnable(MODULE_ID_LCDC);
RasterClocksEnable(baseaddr);
RasterAutoUnderFlowEnable(baseaddr);
RasterIntEnable(baseaddr, RASTER_END_OF_FRAME0_INT | RASTER_END_OF_FRAME1_INT );
RasterDisable(baseaddr);
RasterClkConfig(baseaddr, lcdCtrl.panel->pxl_clk, lcdCtrl.lcd_clk);
RasterDMAConfig(baseaddr, RASTER_DOUBLE_FRAME_BUFFER,
RASTER_BURST_SIZE_16, RASTER_FIFO_THRESHOLD_8,
RASTER_BIG_ENDIAN_DISABLE);
/* Configuring modes(ex:tft or stn,color or monochrome etc) for raster controller */
if (2 == pixsize) {
RasterModeConfig(baseaddr, RASTER_DISPLAY_MODE_TFT | (LCDC_RASTER_CTRL_PLM_DATA << LCDC_RASTER_CTRL_PLM_SHIFT),
RASTER_PALETTE_DATA, RASTER_COLOR, RASTER_RIGHT_ALIGNED);
} else {
mdError("pixsize should equal 2");
}
/* Configuring the polarity of timing parameters of raster controller */
RasterTiming2Configure(baseaddr, RASTER_FRAME_CLOCK_LOW |
RASTER_LINE_CLOCK_HIGH | //RASTER_LINE_CLOCK_LOW |
RASTER_PIXEL_CLOCK_HIGH |
RASTER_SYNC_EDGE_RISING |
RASTER_SYNC_CTRL_ACTIVE |
RASTER_AC_BIAS_HIGH, 0, 255);
RasterHparamConfig(baseaddr, panel->width, panel->hsw, panel->hfp, panel->hbp);
RasterVparamConfig(baseaddr, panel->height, panel->vsw, panel->vfp, panel->vbp);
RasterFIFODMADelayConfig(baseaddr, 128);
moduleIntConfigure(MODULE_ID_LCDC);
}
