예제 #1
0
/*
 * Setup the architecture
 */
static void __init
gp3_setup_arch(void)
{
	bd_t *binfo = (bd_t *) __res;
	unsigned int freq;
	struct gianfar_platform_data *pdata;

	cpm2_reset();

	/* get the core frequency */
	freq = binfo->bi_intfreq;

	if (ppc_md.progress)
		ppc_md.progress("gp3_setup_arch()", 0);

	/* Set loops_per_jiffy to a half-way reasonable value,
	   for use until calibrate_delay gets called. */
	loops_per_jiffy = freq / HZ;

#ifdef CONFIG_PCI
	/* setup PCI host bridges */
	mpc85xx_setup_hose();
#endif

	/* setup the board related information for the enet controllers */
	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
	if (pdata) {
	/*	pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
		pdata->interruptPHY = MPC85xx_IRQ_EXT5;
		pdata->phyid = 2;
		pdata->phy_reg_addr += binfo->bi_immr_base;
		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
	}

	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
	if (pdata) {
	/*	pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
		pdata->interruptPHY = MPC85xx_IRQ_EXT5;
		pdata->phyid = 4;
		/* fixup phy address */
		pdata->phy_reg_addr += binfo->bi_immr_base;
		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
	}

#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
#ifdef	CONFIG_ROOT_NFS
		ROOT_DEV = Root_NFS;
#else
		ROOT_DEV = Root_HDA1;
#endif

	printk ("bi_immr_base = %8.8lx\n", binfo->bi_immr_base);
}
예제 #2
0
/* ************************************************************************
 *
 * Setup the architecture
 *
 */
static void __init
sbc8560_setup_arch(void)
{
	struct ocp_def *def;
	struct ocp_gfar_data *einfo;
	bd_t *binfo = (bd_t *) __res;
	unsigned int freq;

	/* get the core frequency */
	freq = binfo->bi_intfreq;

	if (ppc_md.progress)
		ppc_md.progress("sbc8560_setup_arch()", 0);

	/* Set loops_per_jiffy to a half-way reasonable value,
	   for use until calibrate_delay gets called. */
	loops_per_jiffy = freq / HZ;

#ifdef CONFIG_PCI
	/* setup PCI host bridges */
	mpc85xx_setup_hose();
#endif
#ifdef CONFIG_SERIAL_8250
	sbc8560_early_serial_map();
#endif
#ifdef CONFIG_SERIAL_TEXT_DEBUG
	/* Invalidate the entry we stole earlier the serial ports
	 * should be properly mapped */ 
	invalidate_tlbcam_entry(NUM_TLBCAMS - 1);
#endif

	/* Set up MAC addresses for the Ethernet devices */
	def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0);
	if (def) {
		einfo = (struct ocp_gfar_data *) def->additions;
		memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6);
	}

	def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1);
	if (def) {
		einfo = (struct ocp_gfar_data *) def->additions;
		memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6);
	}

#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
#ifdef  CONFIG_ROOT_NFS
		ROOT_DEV = Root_NFS;
#else
		ROOT_DEV = Root_HDA1;
#endif

	ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
}
예제 #3
0
/* ************************************************************************
 *
 * Setup the architecture
 *
 */
static void __init
sbc8560_setup_arch(void)
{
	bd_t *binfo = (bd_t *) __res;
	unsigned int freq;
	struct gianfar_platform_data *pdata;
	struct gianfar_mdio_data *mdata;

	/* get the core frequency */
	freq = binfo->bi_intfreq;

	if (ppc_md.progress)
		ppc_md.progress("sbc8560_setup_arch()", 0);

	/* Set loops_per_jiffy to a half-way reasonable value,
	   for use until calibrate_delay gets called. */
	loops_per_jiffy = freq / HZ;

#ifdef CONFIG_PCI
	/* setup PCI host bridges */
	mpc85xx_setup_hose();
#endif
#ifdef CONFIG_SERIAL_8250
	sbc8560_early_serial_map();
#endif
#ifdef CONFIG_SERIAL_TEXT_DEBUG
	/* Invalidate the entry we stole earlier the serial ports
	 * should be properly mapped */ 
	invalidate_tlbcam_entry(num_tlbcam_entries - 1);
#endif

	/* setup the board related info for the MDIO bus */
	mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);

	mdata->irq[25] = MPC85xx_IRQ_EXT6;
	mdata->irq[26] = MPC85xx_IRQ_EXT7;
	mdata->irq[31] = -1;

	/* setup the board related information for the enet controllers */
	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
	if (pdata) {
		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
		pdata->bus_id = 0;
		pdata->phy_id = 25;
		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
	}

	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
	if (pdata) {
		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
		pdata->bus_id = 0;
		pdata->phy_id = 26;
		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
	}

#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
#ifdef  CONFIG_ROOT_NFS
		ROOT_DEV = Root_NFS;
#else
		ROOT_DEV = Root_HDA1;
#endif
}
예제 #4
0
/* ************************************************************************
 *
 * Setup the architecture
 *
 */
static void __init
mpc8540ads_setup_arch(void)
{
	bd_t *binfo = (bd_t *) __res;
	unsigned int freq;
	struct gianfar_platform_data *pdata;

	/* get the core frequency */
	freq = binfo->bi_intfreq;

	if (ppc_md.progress)
		ppc_md.progress("mpc8540ads_setup_arch()", 0);

	/* Set loops_per_jiffy to a half-way reasonable value,
	   for use until calibrate_delay gets called. */
	loops_per_jiffy = freq / HZ;

#ifdef CONFIG_PCI
	/* setup PCI host bridges */
	mpc85xx_setup_hose();
#endif

#ifdef CONFIG_SERIAL_8250
	mpc85xx_early_serial_map();
#endif

#ifdef CONFIG_SERIAL_TEXT_DEBUG
	/* Invalidate the entry we stole earlier the serial ports
	 * should be properly mapped */
	invalidate_tlbcam_entry(NUM_TLBCAMS - 1);
#endif

	/* setup the board related information for the enet controllers */
	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
	pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
	pdata->interruptPHY = MPC85xx_IRQ_EXT5;
	pdata->phyid = 0;
	/* fixup phy address */
	pdata->phy_reg_addr += binfo->bi_immr_base;
	memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);

	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
	pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
	pdata->interruptPHY = MPC85xx_IRQ_EXT5;
	pdata->phyid = 1;
	/* fixup phy address */
	pdata->phy_reg_addr += binfo->bi_immr_base;
	memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);

	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
	pdata->board_flags = 0;
	pdata->interruptPHY = MPC85xx_IRQ_EXT5;
	pdata->phyid = 3;
	/* fixup phy address */
	pdata->phy_reg_addr += binfo->bi_immr_base;
	memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);

#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
#ifdef  CONFIG_ROOT_NFS
		ROOT_DEV = Root_NFS;
#else
		ROOT_DEV = Root_HDA1;
#endif
}
예제 #5
0
static void __init
mpc8560ads_setup_arch(void)
{
	bd_t *binfo = (bd_t *) __res;
	unsigned int freq;
	struct gianfar_platform_data *pdata;
	struct gianfar_mdio_data *mdata;
	struct fs_platform_info *fpi;

	cpm2_reset();

	/* get the core frequency */
	freq = binfo->bi_intfreq;

	if (ppc_md.progress)
		ppc_md.progress("mpc8560ads_setup_arch()", 0);

	/* Set loops_per_jiffy to a half-way reasonable value,
	   for use until calibrate_delay gets called. */
	loops_per_jiffy = freq / HZ;

#ifdef CONFIG_PCI
	/* setup PCI host bridges */
	mpc85xx_setup_hose();
#endif

	/* setup the board related info for the MDIO bus */
	mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);

	mdata->irq[0] = MPC85xx_IRQ_EXT5;
	mdata->irq[1] = MPC85xx_IRQ_EXT5;
	mdata->irq[2] = PHY_POLL;
	mdata->irq[3] = MPC85xx_IRQ_EXT5;
	mdata->irq[31] = PHY_POLL;

	/* setup the board related information for the enet controllers */
	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
	if (pdata) {
		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
		pdata->bus_id = 0;
		pdata->phy_id = 0;
		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
	}

	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
	if (pdata) {
		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
		pdata->bus_id = 0;
		pdata->phy_id = 1;
		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
	}

	init_fcc_ioports();
	ppc_sys_device_remove(MPC85xx_CPM_FCC1);

	fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC2);
	if (fpi) {
		memcpy(fpi->macaddr, binfo->bi_enet2addr, 6);
		fpi->bus_id = "0:02";
		fpi->phy_addr = 2;
		fpi->dpram_offset = (u32)cpm2_immr->im_dprambase;
		fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[1];
	}

	fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC3);
	if (fpi) {
		memcpy(fpi->macaddr, binfo->bi_enet2addr, 6);
		fpi->macaddr[5] += 1;
		fpi->bus_id = "0:03";
		fpi->phy_addr = 3;
		fpi->dpram_offset = (u32)cpm2_immr->im_dprambase;
		fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[2];
	}

#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
#ifdef  CONFIG_ROOT_NFS
		ROOT_DEV = Root_NFS;
#else
		ROOT_DEV = Root_HDA1;
#endif
}
예제 #6
0
static void __init
mpc8560ads_setup_arch(void)
{
    bd_t *binfo = (bd_t *) __res;
    unsigned int freq;
    struct gianfar_platform_data *pdata;
    struct gianfar_mdio_data *mdata;
    struct fs_platform_info *fpi;
    struct fs_mii_bb_platform_info *bb_pdata;

    cpm2_reset();

    /* get the core frequency */
    freq = binfo->bi_intfreq;

    if (ppc_md.progress)
        ppc_md.progress("mpc8560ads_setup_arch()", 0);

#if !defined(CONFIG_BDI_SWITCH)
    /*
     * The Abatron BDI JTAG debugger does not tolerate others
     * mucking with the debug registers.
     */
    mtspr(SPRN_DBCR0, (DBCR0_IDM));
    mtspr(SPRN_DBSR, 0xffffffff);
#endif

    /* Set loops_per_jiffy to a half-way reasonable value,
       for use until calibrate_delay gets called. */
    loops_per_jiffy = freq / HZ;

#ifdef CONFIG_PCI
    /* setup PCI host bridges */
    mpc85xx_setup_hose();
#endif

    /* setup the board related info for the MDIO bus */
    mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);

    mdata->irq[0] = MPC85xx_IRQ_EXT5;
    mdata->irq[1] = MPC85xx_IRQ_EXT5;
    mdata->irq[2] = -1;
    mdata->irq[3] = -1;
    mdata->irq[31] = -1;

    bb_pdata = (struct fs_mii_bb_platform_info *) ppc_sys_get_pdata (MPC85xx_MDIO_BB);

    bb_pdata->irq[0] = -1;
    bb_pdata->irq[1] = -1;
    bb_pdata->irq[2] = MPC85xx_IRQ_EXT7;
    bb_pdata->irq[3] = MPC85xx_IRQ_EXT7;
    bb_pdata->irq[4] = -1;
    bb_pdata->irq[31] = -1;


    /* setup the board related information for the enet controllers */
    pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
    if (pdata) {
        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR | FSL_GIANFAR_BRD_PHY_ANEG;
        pdata->bus_id = 0;
        pdata->phy_id = 0;
        memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
    }

    pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
    if (pdata) {
        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR | FSL_GIANFAR_BRD_PHY_ANEG;
        pdata->bus_id = 0;
        pdata->phy_id = 1;
        memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
    }

    init_fcc_ioports();

    ppc_sys_device_remove(MPC85xx_CPM_FCC1);
    ppc_sys_device_remove(MPC85xx_CPM_SCC1);
    ppc_sys_device_remove(MPC85xx_CPM_SCC2);
    ppc_sys_device_remove(MPC85xx_CPM_SCC3);
    ppc_sys_device_remove(MPC85xx_CPM_SCC4);

    fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC2);
    if (fpi) {
        fpi->board_flags = FS_ENET_BRD_PHY_ANEG;
        memcpy(fpi->macaddr, binfo->bi_enet2addr, 6);
        fpi->bus_id = "0:02";
        fpi->phy_addr = 2;
        fpi->dpram_offset = (u32)cpm2_immr->im_dprambase;
        fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[1];
    }

    fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC3);
    if (fpi) {
        fpi->board_flags = FS_ENET_BRD_PHY_ANEG;
        memcpy(fpi->macaddr, binfo->bi_enet2addr, 6);
        fpi->macaddr[5] += 1;
        fpi->bus_id = "0:03";
        fpi->phy_addr = 3;
        fpi->dpram_offset = (u32)cpm2_immr->im_dprambase;
        fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[2];
    }

#ifdef CONFIG_MTD
    mpc85xx_ads_mtd_setup();
#endif

#ifdef CONFIG_BLK_DEV_INITRD
    if (initrd_start)
        ROOT_DEV = Root_RAM0;
    else
#endif
#ifdef  CONFIG_ROOT_NFS
        ROOT_DEV = Root_NFS;
#else
        ROOT_DEV = Root_HDA1;
#endif
}