static int msm_sata_resume(struct device *ahci_dev) { int ret; struct device *dev = ahci_dev->parent; ret = msm_sata_clk_init(dev); if (ret) { dev_err(dev, "SATA clk init failed with err=%d\n", ret); BUG(); } ret = msm_sata_hard_reset(dev); if (ret) goto out; ret = msm_sata_vreg_init(dev); if (ret) { dev_err(dev, "SATA vreg init failed with err=%d\n", ret); goto out; } ret = msm_sata_phy_init(dev); if (ret) { dev_err(dev, "SATA PHY init failed with err=%d\n", ret); msm_sata_vreg_deinit(dev); goto out; } out: return ret; }
static int msm_sata_resume(struct device *ahci_dev) { int ret; struct device *dev = ahci_dev->parent; ret = msm_sata_clk_init(dev); if (ret) { dev_err(dev, "SATA clk init failed with err=%d\n", ret); /* * If clock initialization failed, that means ahci driver * cannot access any register going further. Since there is * no check within ahci driver to check for clock failures, * panic here instead of making an unclocked register access. */ BUG(); /* Take proper error path, if BUG() is not defined */ goto out; } /* Issue asynchronous reset to reset PHY */ ret = msm_sata_hard_reset(dev); if (ret) goto out; #ifndef CONFIG_SATA_SNPS_PHY ret = msm_sata_vreg_init(dev); if (ret) { dev_err(dev, "SATA vreg init failed with err=%d\n", ret); /* Do not turn off clks, AHCI driver might do register access */ goto out; } #endif ret = msm_sata_phy_init(dev); if (ret) { dev_err(dev, "SATA PHY init failed with err=%d\n", ret); /* Do not turn off clks, AHCI driver might do register access */ msm_sata_vreg_deinit(dev); goto out; } out: return ret; }