static void g3d_dvfs_enable(void)
{
int iDVFS_Level = 0;
unsigned long loading = gpu_get_current_utilization();// 0 ~ 100
unsigned long cpi = mali_utilization_bw_get_period();
if(loading >= loading_threshold)
{
switch(g_current_freq_level)
{
case 0:
if (cpi <= CPI_level0_threshold)
{
iDVFS_Level = 1;
}
break;
case 1:
if (cpi <= CPI_level1_threshold)
{
iDVFS_Level = 1;
}
break;
}
}
mt_soc_dvfs(SOC_DVFS_TYPE_GPU_HP, iDVFS_Level);
g_current_freq_level = iDVFS_Level;
}
static void mt_power_pef_transfer_work()
{
unsigned long long refill, access, per, t_per, t_refill;
unsigned long long emi_bw;
int cpu;
int cpu_num=0;
int perf_mode = 0;
int high_count = 0;
int low_count = 0;
t_refill = 0;
t_per = 0;
int depth = 0;
for_each_online_cpu(cpu) {
cpu_num++;
refill = (unsigned long long)get_cache_refill(cpu);
access = (unsigned long long)get_cache_access(cpu);
if(refill!=0) {
per = refill*100;
do_div(per, access);
t_per += per;
}
t_refill += refill;
per > 10 ? high_count++:low_count++;
//printk(KERN_EMERG"CPU %2d: %3llu%% %10llu/%10llu\n", cpu, per, refill, access);
// fliper_pmu_reset();
}
if(t_per!=0)
do_div(t_per, cpu_num);
/* 1. Get EMI*/
emi_bw = get_mem_bw();
/***/
/*MT POWER-PERF TRANSFER algorithm*/
/* if(t_per > 20 || high_count > low_count){
perf_mode = 1;
}*/
if(emi_bw > 1300)
perf_mode = 1;
if(perf_mode == 1) {
if(pp_index == 0)
mt_soc_dvfs(SOC_DVFS_TYPE_BENCHMARK, 1);
//pp_index = 0x100;
pp_index = 1 << Y_steps;
} else {
if(pp_index == 1)
mt_soc_dvfs(SOC_DVFS_TYPE_BENCHMARK, 0);
pp_index = pp_index >> 1;
}
//printk(KERN_EMERG"Rate %10llu%%, %4d\n", t_per, pp_index);
// refill
if(t_refill!=0)
do_div(t_refill, cpu_num);
//printk(KERN_EMERG"Miss %10llu%%, %4d, %llu\n", t_refill, pp_index, t_per);
printk(KERN_EMERG"EMI:Rate:count:mode %6llu:%3llu:%6llu:%4d\n", emi_bw, t_per, t_refill, pp_index);
//printk(KERN_EMERG"======\n");
}
static void g3d_dvfs_disable(void)
{
mt_soc_dvfs(SOC_DVFS_TYPE_GPU_HP, 0);
}
