static void musbfsh_port_reset(struct musbfsh *musbfsh, bool do_reset)
{
u8 power;
void __iomem *mbase = musbfsh->mregs;
/* NOTE: caller guarantees it will turn off the reset when
* the appropriate amount of time has passed
*/
power = musbfsh_readb(mbase, MUSBFSH_POWER);
WARNING("reset=%d power=0x%x\n", do_reset, power);
if (do_reset) {
if (power & MUSBFSH_POWER_SUSPENDM) {
WARNING("reset a suspended device\n");
#ifdef CONFIG_MTK_DT_USB_SUPPORT
request_wakeup_md_timeout(0, 0);
#endif
#ifdef MTK_USB_RUNTIME_SUPPORT
/* ERR("EINT to wake up MD for reset\n"); */
/* wx, we may have to reset a suspended MD */
/* request_wakeup_md_timeout(0, 0); */
#endif
musbfsh_writeb(mbase,
MUSBFSH_POWER, power |
MUSBFSH_POWER_RESUME);
mdelay(20);
musbfsh_writeb(mbase, MUSBFSH_POWER,
power & ~MUSBFSH_POWER_RESUME);
}
/*
* If RESUME is set, we must make sure it stays minimum 20 ms.
* Then we must clear RESUME and wait a bit to let musb start
* generating SOFs. If we don't do this, OPT HS A 6.8 tests
* fail with "Error! Did not receive an SOF before suspend
* detected".
*/
if (power & MUSBFSH_POWER_RESUME) {
WARNING("reset a resuming device\n");
while (time_before(jiffies, musbfsh->rh_timer))
mdelay(1);
/* stop the resume signal */
musbfsh_writeb(mbase, MUSBFSH_POWER,
power & ~MUSBFSH_POWER_RESUME);
mdelay(1);
}
musbfsh->ignore_disconnect = true;
power &= 0xf0;
musbfsh_writeb(mbase, MUSBFSH_POWER,
power | MUSBFSH_POWER_RESET);
mb(); /* flush POWER and PHY setting immediately */
musbfsh->port1_status |= USB_PORT_STAT_RESET;
musbfsh->port1_status &= ~USB_PORT_STAT_ENABLE;
musbfsh->rh_timer = jiffies + msecs_to_jiffies(50);
} else {
INFO("Root port reset stopped\n");
#ifdef CONFIG_MTK_ICUSB_SUPPORT
if (resistor_control_attr.value) {
/* improve signal quality, from Dingjun */
#if 0
/* FS_DISC_DISABLE */
u32 TM1;
TM1 = musbfsh_readl(mbase, 0x604);
musbfsh_writel(mbase, 0x604, TM1 | 0x4);
MYDBG("set FS_DISC_DISABLE\n");
#endif
/* original flow from SS5 */
USB11PHY_SET8(U1PHTCR2,
force_usb11_dm_rpd | force_usb11_dp_rpd);
/*
* disconnect host port's pull down resistors
* on D+ and D-
*/
USB11PHY_CLR8(U1PHTCR2,
RG_USB11_DM_RPD | RG_USB11_DP_RPD);
/*
* Tell MAC there still is a device attached,
* ohterwise we will get disconnect interrupt
*/
USB11PHY_SET8(U1PHTCR2,
force_usb11_dp_rpu | RG_USB11_DP_RPU);
/* force */
USB11PHY_SET8(0x6a, 0x20 | 0x10);
/* RG */
/*
* disconnect host port's pull down resistors
* on D+ and D-
*/
USB11PHY_CLR8(0x68, 0x80 | 0x40);
/*
* Tell MAC there still is a device attached,
* ohterwise we will get disconnect interrupt.
*/
/* USB11PHY_SET8(U1PHTCR2,
* force_usb11_dp_rpu |
* RG_USB11_DP_RPU);
*/
MYDBG("USB1.1 PHY special config for IC-USB\n");
} else {
MYDBG("");
}
#endif
musbfsh_writeb(mbase,
MUSBFSH_POWER, power & ~MUSBFSH_POWER_RESET);
#ifdef CONFIG_MTK_ICUSB_SUPPORT
if (resistor_control_attr.value)
USB11PHY_CLR8(0x6a, 0x20 | 0x10);
else
MYDBG("");
#endif
mb(); /* flush POWER and PHY setting immediately */
musbfsh->ignore_disconnect = false;
power = musbfsh_readb(mbase, MUSBFSH_POWER);
if (power & MUSBFSH_POWER_HSMODE) {
INFO("high-speed device connected\n");
musbfsh->port1_status |= USB_PORT_STAT_HIGH_SPEED;
}
#if 0 /* IC_USB from SS5 */
#ifdef IC_USB
USB11PHY_SET8(U1PHTCR2,
force_usb11_dm_rpd | force_usb11_dp_rpd);
/* disconnect host port's pull down resistors on D+ and D- */
USB11PHY_CLR8(U1PHTCR2, RG_USB11_DM_RPD | RG_USB11_DP_RPD);
/*
* tell MAC there still is a device attached,
* ohterwise we will get disconnect interrupt
*/
USB11PHY_SET8(U1PHTCR2, force_usb11_dp_rpu | RG_USB11_DP_RPU);
WARNING("USB1.1 PHY special config for IC-USB 0x%X=%x\n",
U1PHTCR2, USB11PHY_READ8(U1PHTCR2));
#endif
#endif
musbfsh->port1_status &= ~USB_PORT_STAT_RESET;
musbfsh->port1_status |=
USB_PORT_STAT_ENABLE | (USB_PORT_STAT_C_RESET << 16) |
(USB_PORT_STAT_C_ENABLE << 16);
/* call back func to notify the hub thread the state of hub! */
usb_hcd_poll_rh_status(musbfsh_to_hcd(musbfsh));
musbfsh->vbuserr_retry = VBUSERR_RETRY_COUNT;
}
}
void musbfs_check_mpu_violation(u32 addr, int wr_vio)
{
void __iomem *mregs = (void *)USB_BASE;
printk(KERN_CRIT "MUSB checks EMI MPU violation.\n");
printk(KERN_CRIT "addr = 0x%x, %s violation.\n", addr, wr_vio? "Write": "Read");
printk(KERN_CRIT "POWER = 0x%x,DEVCTL= 0x%x.\n", musbfsh_readb(mregs, MUSBFSH_POWER),musbfsh_readb(USB11_BASE,MUSBFSH_DEVCTL));
printk(KERN_CRIT "DMA_CNTLch0 0x%04x,DMA_ADDRch0 0x%08x,DMA_COUNTch0 0x%08x \n",musbfsh_readw(mregs, 0x204),musbfsh_readl(mregs,0x208),musbfsh_readl(mregs,0x20C));
printk(KERN_CRIT "DMA_CNTLch1 0x%04x,DMA_ADDRch1 0x%08x,DMA_COUNTch1 0x%08x \n",musbfsh_readw(mregs, 0x214),musbfsh_readl(mregs,0x218),musbfsh_readl(mregs,0x21C));
printk(KERN_CRIT "DMA_CNTLch2 0x%04x,DMA_ADDRch2 0x%08x,DMA_COUNTch2 0x%08x \n",musbfsh_readw(mregs, 0x224),musbfsh_readl(mregs,0x228),musbfsh_readl(mregs,0x22C));
printk(KERN_CRIT "DMA_CNTLch3 0x%04x,DMA_ADDRch3 0x%08x,DMA_COUNTch3 0x%08x \n",musbfsh_readw(mregs, 0x234),musbfsh_readl(mregs,0x238),musbfsh_readl(mregs,0x23C));
printk(KERN_CRIT "DMA_CNTLch4 0x%04x,DMA_ADDRch4 0x%08x,DMA_COUNTch4 0x%08x \n",musbfsh_readw(mregs, 0x244),musbfsh_readl(mregs,0x248),musbfsh_readl(mregs,0x24C));
printk(KERN_CRIT "DMA_CNTLch5 0x%04x,DMA_ADDRch5 0x%08x,DMA_COUNTch5 0x%08x \n",musbfsh_readw(mregs, 0x254),musbfsh_readl(mregs,0x258),musbfsh_readl(mregs,0x25C));
printk(KERN_CRIT "DMA_CNTLch6 0x%04x,DMA_ADDRch6 0x%08x,DMA_COUNTch6 0x%08x \n",musbfsh_readw(mregs, 0x264),musbfsh_readl(mregs,0x268),musbfsh_readl(mregs,0x26C));
printk(KERN_CRIT "DMA_CNTLch7 0x%04x,DMA_ADDRch7 0x%08x,DMA_COUNTch7 0x%08x \n",musbfsh_readw(mregs, 0x274),musbfsh_readl(mregs,0x278),musbfsh_readl(mregs,0x27C));
}
