/******************************************************************************* ** ** Function nfc_hal_dm_check_xtal ** ** Description check if need to send xtal command. ** If not, proceed to next step get_patch_version. ** ** Returns void ** *******************************************************************************/ static void nfc_hal_dm_check_xtal (void) { UINT16 xtal_freq; tNFC_HAL_XTAL_INDEX xtal_index; /* if NFCC needs to set Xtal frequency before getting patch version */ xtal_index = nfc_hal_dm_get_xtal_index (nfc_hal_cb.dev_cb.brcm_hw_id, &xtal_freq); if ((xtal_index < NFC_HAL_XTAL_INDEX_MAX) || (xtal_index == NFC_HAL_XTAL_INDEX_SPECIAL)) { { /* set Xtal index before getting patch version */ nfc_hal_dm_set_xtal_freq_index (); return; } } NFC_HAL_SET_INIT_STATE (NFC_HAL_INIT_STATE_W4_PATCH_INFO); nfc_hal_dm_send_nci_cmd (nfc_hal_dm_get_patch_version_cmd, NCI_MSG_HDR_SIZE, NULL); }
/******************************************************************************* ** ** Function nfc_hal_dm_proc_msg_during_init ** ** Description Process NCI message while initializing NFCC ** ** Returns void ** *******************************************************************************/ void nfc_hal_dm_proc_msg_during_init (NFC_HDR *p_msg) { UINT8 *p; UINT8 reset_reason, reset_type; UINT8 mt, pbf, gid, op_code; UINT8 *p_old, old_gid, old_oid, old_mt; UINT8 u8; tNFC_HAL_NCI_CBACK *p_cback = NULL; UINT8 chipverlen; UINT8 chipverstr[NCI_SPD_HEADER_CHIPVER_LEN]; UINT16 xtal_freq; HAL_TRACE_DEBUG1 ("nfc_hal_dm_proc_msg_during_init(): init state:%d", nfc_hal_cb.dev_cb.initializing_state); p = (UINT8 *) (p_msg + 1) + p_msg->offset; NCI_MSG_PRS_HDR0 (p, mt, pbf, gid); NCI_MSG_PRS_HDR1 (p, op_code); /* check if waiting for this response */ if ( (nfc_hal_cb.ncit_cb.nci_wait_rsp == NFC_HAL_WAIT_RSP_CMD) ||(nfc_hal_cb.ncit_cb.nci_wait_rsp == NFC_HAL_WAIT_RSP_VSC) ) { if (mt == NCI_MT_RSP) { p_old = nfc_hal_cb.ncit_cb.last_hdr; NCI_MSG_PRS_HDR0 (p_old, old_mt, pbf, old_gid); old_oid = ((*p_old) & NCI_OID_MASK); /* make sure this is the RSP we are waiting for before updating the command window */ if ((old_gid == gid) && (old_oid == op_code)) { nfc_hal_cb.ncit_cb.nci_wait_rsp = NFC_HAL_WAIT_RSP_NONE; p_cback = (tNFC_HAL_NCI_CBACK *)nfc_hal_cb.ncit_cb.p_vsc_cback; nfc_hal_cb.ncit_cb.p_vsc_cback = NULL; nfc_hal_main_stop_quick_timer (&nfc_hal_cb.ncit_cb.nci_wait_rsp_timer); } } } if (gid == NCI_GID_CORE) { if (op_code == NCI_MSG_CORE_RESET) { if (mt == NCI_MT_NTF) { if ( (nfc_hal_cb.dev_cb.initializing_state == NFC_HAL_INIT_STATE_W4_NFCC_ENABLE) ||(nfc_hal_cb.dev_cb.initializing_state == NFC_HAL_INIT_STATE_POST_XTAL_SET) ) { /* ** Core reset ntf in the following cases; ** 1) after power up (raising REG_PU) ** 2) after setting xtal index ** Start pre-initializing NFCC */ nfc_hal_main_stop_quick_timer (&nfc_hal_cb.timer); nfc_hal_dm_pre_init_nfcc (); } else { /* Core reset ntf after post-patch download, Call reset notification callback */ p++; /* Skip over param len */ STREAM_TO_UINT8 (reset_reason, p); STREAM_TO_UINT8 (reset_type, p); nfc_hal_prm_spd_reset_ntf (reset_reason, reset_type); } } } else if (p_cback) { (*p_cback) ((tNFC_HAL_NCI_EVT) (op_code), p_msg->len, (UINT8 *) (p_msg + 1) + p_msg->offset); } } else if (gid == NCI_GID_PROP) /* this is for download patch */ { if (mt == NCI_MT_NTF) op_code |= NCI_NTF_BIT; else op_code |= NCI_RSP_BIT; if (nfc_hal_cb.dev_cb.initializing_state == NFC_HAL_INIT_STATE_W4_XTAL_SET) { if (op_code == (NCI_RSP_BIT|NCI_MSG_GET_XTAL_INDEX_FROM_DH)) { /* start timer in case that NFCC doesn't send RESET NTF after loading patch from NVM */ NFC_HAL_SET_INIT_STATE (NFC_HAL_INIT_STATE_POST_XTAL_SET); nfc_hal_main_start_quick_timer (&nfc_hal_cb.timer, NFC_HAL_TTYPE_NFCC_ENABLE, ((p_nfc_hal_cfg->nfc_hal_post_xtal_timeout)*QUICK_TIMER_TICKS_PER_SEC)/1000); } } else if ( (op_code == NFC_VS_GET_BUILD_INFO_EVT) &&(nfc_hal_cb.dev_cb.initializing_state == NFC_HAL_INIT_STATE_W4_BUILD_INFO) ) { p += NCI_BUILD_INFO_OFFSET_HWID; STREAM_TO_UINT32 (nfc_hal_cb.dev_cb.brcm_hw_id, p); STREAM_TO_UINT8 (chipverlen, p); memset (chipverstr, 0, NCI_SPD_HEADER_CHIPVER_LEN); STREAM_TO_ARRAY (chipverstr, p, chipverlen); if ((chipverlen == NFC_HAL_DM_BCM20791B3_STR_LEN) && (memcmp (NFC_HAL_DM_BCM20791B3_STR, chipverstr, NFC_HAL_DM_BCM20791B3_STR_LEN) == 0)) { /* BCM2079B3 FW - eSE restarted for patch download */ nfc_hal_cb.hci_cb.hci_fw_workaround = TRUE; nfc_hal_cb.hci_cb.hci_fw_validate_netwk_cmd = TRUE; } else if ( ((chipverlen == NFC_HAL_DM_BCM20791B4_STR_LEN) && (memcmp (NFC_HAL_DM_BCM20791B4_STR, chipverstr, NFC_HAL_DM_BCM20791B4_STR_LEN) == 0)) ||((chipverlen == NFC_HAL_DM_BCM43341B0_STR_LEN) && (memcmp (NFC_HAL_DM_BCM43341B0_STR, chipverstr, NFC_HAL_DM_BCM43341B0_STR_LEN) == 0)) ) { /* BCM43341B0/BCM2079B4 FW - eSE restarted for patch download */ nfc_hal_cb.hci_cb.hci_fw_workaround = TRUE; nfc_hal_cb.hci_cb.hci_fw_validate_netwk_cmd = FALSE; } else { /* BCM2079B5 FW - eSE not be restarted for patch download from UICC */ nfc_hal_cb.hci_cb.hci_fw_workaround = FALSE; nfc_hal_cb.hci_cb.hci_fw_validate_netwk_cmd = FALSE; } /* if NFCC needs to set Xtal frequency before getting patch version */ if (nfc_hal_dm_get_xtal_index (nfc_hal_cb.dev_cb.brcm_hw_id, &xtal_freq) < NFC_HAL_XTAL_INDEX_MAX) { { /* set Xtal index before getting patch version */ nfc_hal_dm_set_xtal_freq_index (); return; } } NFC_HAL_SET_INIT_STATE (NFC_HAL_INIT_STATE_W4_PATCH_INFO); nfc_hal_dm_send_nci_cmd (nfc_hal_dm_get_patch_version_cmd, NCI_MSG_HDR_SIZE, NULL); } else if ( (op_code == NFC_VS_GET_PATCH_VERSION_EVT) &&(nfc_hal_cb.dev_cb.initializing_state == NFC_HAL_INIT_STATE_W4_PATCH_INFO) ) { /* Store NVM info to control block */ /* Skip over rsp len */ p++; /* Get project id */ STREAM_TO_UINT16 (nfc_hal_cb.nvm_cb.project_id, p); /* RFU */ p++; /* Get chip version string */ STREAM_TO_UINT8 (u8, p); if (u8 > NFC_HAL_PRM_MAX_CHIP_VER_LEN) u8 = NFC_HAL_PRM_MAX_CHIP_VER_LEN; memcpy (nfc_hal_cb.nvm_cb.chip_ver, p, u8); p += NCI_PATCH_INFO_VERSION_LEN; /* Get major/minor version */ STREAM_TO_UINT16 (nfc_hal_cb.nvm_cb.ver_major, p); STREAM_TO_UINT16 (nfc_hal_cb.nvm_cb.ver_minor, p); /* Skip over max_size and patch_max_size */ p += 4; /* Get current lpm patch size */ STREAM_TO_UINT16 (nfc_hal_cb.nvm_cb.lpm_size, p); STREAM_TO_UINT16 (nfc_hal_cb.nvm_cb.fpm_size, p); /* clear all flags which may be set during previous initialization */ nfc_hal_cb.nvm_cb.flags = 0; /* Set patch present flag */ if ((nfc_hal_cb.nvm_cb.fpm_size) || (nfc_hal_cb.nvm_cb.lpm_size)) nfc_hal_cb.nvm_cb.flags |= NFC_HAL_NVM_FLAGS_PATCH_PRESENT; /* LPMPatchCodeHasBadCRC (if not bad crc, then indicate LPM patch is present in nvm) */ STREAM_TO_UINT8 (u8, p); if (u8) { /* LPM patch in NVM fails CRC check */ nfc_hal_cb.nvm_cb.flags |= NFC_HAL_NVM_FLAGS_LPM_BAD; } /* FPMPatchCodeHasBadCRC (if not bad crc, then indicate LPM patch is present in nvm) */ STREAM_TO_UINT8 (u8, p); if (u8) { /* FPM patch in NVM fails CRC check */ nfc_hal_cb.nvm_cb.flags |= NFC_HAL_NVM_FLAGS_FPM_BAD; } /* Check if downloading patch to RAM only (no NVM) */ STREAM_TO_UINT8 (nfc_hal_cb.nvm_cb.nvm_type, p); if (nfc_hal_cb.nvm_cb.nvm_type == NCI_SPD_NVM_TYPE_NONE) { nfc_hal_cb.nvm_cb.flags |= NFC_HAL_NVM_FLAGS_NO_NVM; } /* let platform update baudrate or download patch */ NFC_HAL_SET_INIT_STATE (NFC_HAL_INIT_STATE_W4_APP_COMPLETE); nfc_hal_post_reset_init (nfc_hal_cb.dev_cb.brcm_hw_id, nfc_hal_cb.nvm_cb.nvm_type); } else if (p_cback) { (*p_cback) ((tNFC_HAL_NCI_EVT) (op_code), p_msg->len, (UINT8 *) (p_msg + 1) + p_msg->offset); } else if (op_code == NFC_VS_SEC_PATCH_AUTH_EVT) { HAL_TRACE_DEBUG0 ("signature!!"); nfc_hal_prm_nci_command_complete_cback ((tNFC_HAL_NCI_EVT) (op_code), p_msg->len, (UINT8 *) (p_msg + 1) + p_msg->offset); } } }