int nios_legacy_vctcxo_trim_dac_write(struct bladerf *dev, uint16_t value)
{
int status;
struct uart_cmd cmd;
int base;
/* FPGA v0.0.4 introduced a change to the location of the DAC registers */
const bool legacy_location = !have_cap(dev, BLADERF_CAP_UPDATED_DAC_ADDR);
base = legacy_location ? 0 : 34;
cmd.addr = base;
cmd.data = value & 0xff;
status = nios_access(dev,
legacy_location ?
NIOS_PKT_LEGACY_DEV_VCTCXO :
NIOS_PKT_LEGACY_DEV_CONFIG,
USB_DIR_HOST_TO_DEVICE, &cmd, 1);
if (status < 0) {
return status;
}
cmd.addr = base + 1;
cmd.data = (value >> 8) & 0xff;
status = nios_access(dev,
legacy_location ?
NIOS_PKT_LEGACY_DEV_VCTCXO :
NIOS_PKT_LEGACY_DEV_CONFIG,
USB_DIR_HOST_TO_DEVICE, &cmd, 1);
return status;
}
int nios_legacy_get_timestamp(struct bladerf *dev, bladerf_module mod,
uint64_t *value)
{
int status = 0;
struct uart_cmd cmds[4];
uint8_t timestamp_bytes[8];
size_t i;
/* Offset 16 is the time tamer according to the Nios firmware */
cmds[0].addr = (mod == BLADERF_MODULE_RX ? 16 : 24);
cmds[1].addr = (mod == BLADERF_MODULE_RX ? 17 : 25);
cmds[2].addr = (mod == BLADERF_MODULE_RX ? 18 : 26);
cmds[3].addr = (mod == BLADERF_MODULE_RX ? 19 : 27);
cmds[0].data = cmds[1].data = cmds[2].data = cmds[3].data = 0xff;
status = nios_access(dev,
NIOS_PKT_LEGACY_DEV_CONFIG,
USB_DIR_DEVICE_TO_HOST,
cmds, ARRAY_SIZE(cmds));
if (status != 0) {
return status;
} else {
for (i = 0; i < 4; i++) {
timestamp_bytes[i] = cmds[i].data;
}
}
cmds[0].addr = (mod == BLADERF_MODULE_RX ? 20 : 28);
cmds[1].addr = (mod == BLADERF_MODULE_RX ? 21 : 29);
cmds[2].addr = (mod == BLADERF_MODULE_RX ? 22 : 30);
cmds[3].addr = (mod == BLADERF_MODULE_RX ? 23 : 31);
cmds[0].data = cmds[1].data = cmds[2].data = cmds[3].data = 0xff;
status = nios_access(dev,
NIOS_PKT_LEGACY_DEV_CONFIG,
USB_DIR_DEVICE_TO_HOST,
cmds, ARRAY_SIZE(cmds));
if (status) {
return status;
} else {
for (i = 0; i < 4; i++) {
timestamp_bytes[i + 4] = cmds[i].data;
}
}
memcpy(value, timestamp_bytes, sizeof(*value));
*value = LE64_TO_HOST(*value);
return 0;
}
static int nios_32x32_masked_read(struct bladerf *dev, uint8_t id,
uint32_t mask, uint32_t *val)
{
int status;
bool success;
uint8_t buf[NIOS_PKT_LEN];
/* The address is used as a mask of bits to read and return */
nios_pkt_32x32_pack(buf, id, false, mask, 0);
status = nios_access(dev, buf);
if (status != 0) {
return status;
}
nios_pkt_32x32_resp_unpack(buf, NULL, NULL, NULL, val, &success);
if (success) {
return 0;
} else {
*val = 0;
log_debug("%s: response packet reported failure.\n", __FUNCTION__);
return BLADERF_ERR_FPGA_OP;
}
}
int nios_8x16_read(struct bladerf *dev, uint8_t id,
uint8_t addr, uint16_t *data)
{
int status;
uint8_t buf[NIOS_PKT_LEN];
bool success;
uint16_t tmp;
nios_pkt_8x16_pack(buf, id, false, addr, 0);
status = nios_access(dev, buf);
if (status != 0) {
return status;
}
nios_pkt_8x16_resp_unpack(buf, NULL, NULL, NULL, &tmp, &success);
if (success) {
*data = tmp;
return 0;
} else {
*data = 0;
log_debug("%s: response packet reported failure.\n", __FUNCTION__);
return BLADERF_ERR_FPGA_OP;
}
}
int nios_legacy_pio_read(struct bladerf *dev, uint8_t addr, uint32_t *data)
{
int status;
size_t i;
struct uart_cmd cmd;
*data = 0;
for (i = 0; i < sizeof(*data); i++) {
assert((addr + i) <= UINT8_MAX);
cmd.addr = (uint8_t)(addr + i);
cmd.data = 0xff;
status = nios_access(dev, NIOS_PKT_LEGACY_DEV_CONFIG,
USB_DIR_DEVICE_TO_HOST, &cmd, 1);
if (status < 0) {
*data = 0;
return status;
}
*data |= (cmd.data << (i * 8));
}
return 0;
}
int nios_legacy_si5338_write(struct bladerf *dev, uint8_t addr, uint8_t data)
{
struct uart_cmd cmd;
cmd.addr = addr;
cmd.data = data;
log_verbose( "%s: 0x%2.2x 0x%2.2x\n", __FUNCTION__, addr, data );
return nios_access(dev, NIOS_PKT_LEGACY_DEV_SI5338,
USB_DIR_HOST_TO_DEVICE, &cmd, 1);
}
int nios_legacy_lms6_write(struct bladerf *dev, uint8_t addr, uint8_t data)
{
int status;
struct uart_cmd cmd;
cmd.addr = addr;
cmd.data = data;
log_verbose( "%s: 0x%2.2x 0x%2.2x\n", __FUNCTION__, addr, data );
status = nios_access(dev, NIOS_PKT_LEGACY_DEV_LMS,
USB_DIR_HOST_TO_DEVICE, &cmd, 1);
return status;
}
static int set_iq_correction(struct bladerf *dev, uint8_t addr, int16_t value)
{
int i;
int status;
struct uart_cmd cmd;
for (i = status = 0; status == 0 && i < 2; i++) {
cmd.addr = i + addr;
cmd.data = (value >> (i * 8)) & 0xff;
status = nios_access(dev, NIOS_PKT_LEGACY_DEV_CONFIG,
USB_DIR_HOST_TO_DEVICE, &cmd, 1);
}
return status;
}
int nios_legacy_lms6_read(struct bladerf *dev, uint8_t addr, uint8_t *data)
{
int status;
struct uart_cmd cmd;
cmd.addr = addr;
cmd.data = 0xff;
status = nios_access(dev, NIOS_PKT_LEGACY_DEV_LMS,
USB_DIR_DEVICE_TO_HOST, &cmd, 1);
if (status == 0) {
*data = cmd.data;
log_verbose( "%s: 0x%2.2x 0x%2.2x\n", __FUNCTION__, addr, *data );
}
return status;
}
int nios_legacy_get_fpga_version(struct bladerf *dev,
struct bladerf_version *ver)
{
int i, status;
struct uart_cmd cmd;
for (i = 0; i < 4; i++) {
cmd.addr = NIOS_PKT_LEGACY_DEV_FPGA_VERSION_ID + i;
cmd.data = 0xff;
status = nios_access(dev, NIOS_PKT_LEGACY_DEV_CONFIG,
USB_DIR_DEVICE_TO_HOST, &cmd, 1);
if (status != 0) {
memset(&dev->fpga_version, 0, sizeof(dev->fpga_version));
log_debug("Failed to read FPGA version[%d]: %s\n", i,
bladerf_strerror(status));
return status;
}
switch (i) {
case 0:
ver->major = cmd.data;
break;
case 1:
ver->minor = cmd.data;
break;
case 2:
ver->patch = cmd.data;
break;
case 3:
ver->patch |= (cmd.data << 8);
break;
default:
assert(!"Bug");
}
}
snprintf((char*)ver->describe, BLADERF_VERSION_STR_MAX,
"%d.%d.%d", ver->major, ver->minor, ver->patch);
return status;
}
int nios_legacy_pio_write(struct bladerf *dev, uint8_t addr, uint32_t data)
{
int status;
size_t i;
struct uart_cmd cmd;
for (i = 0; i < sizeof(data); i++) {
assert((addr + i) <= UINT8_MAX);
cmd.addr = (uint8_t)(addr + i);
cmd.data = (data >> (i * 8)) & 0xff;
status = nios_access(dev, NIOS_PKT_LEGACY_DEV_CONFIG,
USB_DIR_HOST_TO_DEVICE, &cmd, 1);
if (status < 0) {
return status;
}
}
return 0;
}
int nios_8x8_write(struct bladerf *dev, uint8_t id, uint8_t addr, uint8_t data)
{
int status;
uint8_t buf[NIOS_PKT_LEN];
bool success;
nios_pkt_8x8_pack(buf, id, true, addr, data);
status = nios_access(dev, buf);
if (status != 0) {
return status;
}
nios_pkt_8x8_resp_unpack(buf, NULL, NULL, NULL, NULL, &success);
if (success) {
return 0;
} else {
log_debug("%s: response packet reported failure.\n", __FUNCTION__);
return BLADERF_ERR_FPGA_OP;
}
}
