void __init exynos_pm_init(void) { const struct of_device_id *match; u32 tmp; of_find_matching_node_and_match(NULL, exynos_pmu_of_device_ids, &match); if (!match) { pr_err("Failed to find PMU node\n"); return; } pm_data = (struct exynos_pm_data *) match->data; /* Platform-specific GIC callback */ gic_arch_extn.irq_set_wake = exynos_irq_set_wake; /* All wakeup disable */ tmp = pmu_raw_readl(S5P_WAKEUP_MASK); tmp |= pm_data->wake_disable_mask; pmu_raw_writel(tmp, S5P_WAKEUP_MASK); exynos_pm_syscore_ops.suspend = pm_data->pm_suspend; exynos_pm_syscore_ops.resume = pm_data->pm_resume; register_syscore_ops(&exynos_pm_syscore_ops); suspend_set_ops(&exynos_suspend_ops); }
void __init exynos_pm_init(void) { const struct of_device_id *match; struct device_node *np; u32 tmp; np = of_find_matching_node_and_match(NULL, exynos_pmu_of_device_ids, &match); if (!np) { pr_err("Failed to find PMU node\n"); return; } if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL))) { pr_warn("Outdated DT detected, suspend/resume will NOT work\n"); return; } pm_data = (const struct exynos_pm_data *) match->data; /* All wakeup disable */ tmp = pmu_raw_readl(S5P_WAKEUP_MASK); tmp |= pm_data->wake_disable_mask; pmu_raw_writel(tmp, S5P_WAKEUP_MASK); exynos_pm_syscore_ops.suspend = pm_data->pm_suspend; exynos_pm_syscore_ops.resume = pm_data->pm_resume; register_syscore_ops(&exynos_pm_syscore_ops); suspend_set_ops(&exynos_suspend_ops); }
int of_flash_probe_versatile(struct platform_device *pdev, struct device_node *np, struct map_info *map) { struct device_node *sysnp; const struct of_device_id *devid; struct regmap *rmap; static enum versatile_flashprot versatile_flashprot; int ret; /* Not all flash chips use this protection line */ if (!of_device_is_compatible(np, "arm,versatile-flash")) return 0; /* For first chip probed, look up the syscon regmap */ if (!syscon_regmap) { sysnp = of_find_matching_node_and_match(NULL, syscon_match, &devid); if (!sysnp) return -ENODEV; versatile_flashprot = (enum versatile_flashprot)devid->data; rmap = syscon_node_to_regmap(sysnp); if (IS_ERR(rmap)) return PTR_ERR(rmap); syscon_regmap = rmap; } switch (versatile_flashprot) { case INTEGRATOR_AP_FLASHPROT: ret = ap_flash_init(pdev); if (ret) return ret; map->set_vpp = ap_flash_set_vpp; dev_info(&pdev->dev, "Integrator/AP flash protection\n"); break; case INTEGRATOR_CP_FLASHPROT: map->set_vpp = cp_flash_set_vpp; dev_info(&pdev->dev, "Integrator/CP flash protection\n"); break; case VERSATILE_FLASHPROT: case REALVIEW_FLASHPROT: map->set_vpp = versatile_flash_set_vpp; dev_info(&pdev->dev, "versatile/realview flash protection\n"); break; default: dev_info(&pdev->dev, "device marked as Versatile flash " "but no system controller was found\n"); break; } return 0; }
int __init psci_init(void) { struct device_node *np; const struct of_device_id *matched_np; psci_initcall_t init_fn; np = of_find_matching_node_and_match(NULL, psci_of_match, &matched_np); if (!np) return -ENODEV; init_fn = (psci_initcall_t)matched_np->data; return init_fn(np); }
/** * t1042rdb_set_pixel_clock: program the DIU's clock * * @pixclock: the wavelength, in picoseconds, of the clock */ static void corenet_set_pixel_clock(unsigned int pixclock) { struct device_node *scfg_np = NULL; void __iomem *scfg; unsigned long freq; u64 temp; u32 pxclk; /* Map the global utilities registers. */ scfg_np = of_find_matching_node_and_match(NULL, scfg_matches, NULL); if (!scfg_np) { freq = temp; pr_err("%s: Missing scfg node. Can not display video.\n", __func__); return; } scfg = of_iomap(scfg_np, 0); of_node_put(scfg_np); if (!scfg) { pr_err("%s: Could not map device. Can not display video.\n", __func__); return; } /* Convert pixclock from a wavelength to a frequency */ temp = 1000000000000ULL; do_div(temp, pixclock); freq = temp; /* * 'pxclk' is the ratio of the platform clock to the pixel clock. * This number is programmed into the PIXCLKCR register, and the valid * range of values is 2-255. */ pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq); pxclk = clamp_t(u32, pxclk, 2, 255); /* Disable the pixel clock, and set it to non-inverted and no delay */ clrbits32(scfg + CCSR_SCFG_PIXCLKCR, PIXCLKCR_PXCKEN | PIXCLKCR_PXCKDLY | PIXCLKCR_PXCLK_MASK); /* Enable the clock and set the pxclk */ setbits32(scfg + CCSR_SCFG_PIXCLKCR, PIXCLKCR_PXCKEN | (pxclk << 16)); iounmap(scfg); }
int __init psci_dt_init(void) { //SMP 아키텍처에서 psci 기능이 지원되는 경우 해당 초기화 함수를 동작시켜 //각 기능에 해당하는 핸들러 함수 연결 struct device_node *np; const struct of_device_id *matched_np; psci_initcall_t init_fn; //DT에서 psci_of_match에 있는 디바이스 중 하나라도 일치되는 노드를 찾아 리턴하고 출력인수 matched_up에 psci_of_match에 있는 of_device_id 구조체 엔트리 중 매치된 엔트리 포인터 저장. np = of_find_matching_node_and_match(NULL, psci_of_match, &matched_np); if (!np) return -ENODEV; init_fn = (psci_initcall_t)matched_np->data;//psci_of_match 각 엔트리에 있는 data 콜백 return init_fn(np);//찾은 노드를 초기화 하여 리턴 }
/** * t1042rdb_set_monitor_port: switch the output to a different monitor port */ static void t1042rdb_set_monitor_port(enum fsl_diu_monitor_port port) { struct device_node *cpld_node; static void __iomem *cpld_base; cpld_node = of_find_matching_node_and_match(NULL, corenet_cpld_matches, NULL); if (!cpld_node) { pr_err("%s: Missing CPLD node\n", __func__); return; } cpld_base = of_iomap(cpld_node, 0); if (!cpld_base) { pr_err("%s: Could not map cpld registers\n", __func__); goto exit; } switch (port) { case FSL_DIU_PORT_DVI: /* Enable the DVI(HDMI) port, disable the DFP and * the backlight */ clrbits8(cpld_base + CPLD_DIUCSR, CPLD_DIUCSR_DVIEN); break; case FSL_DIU_PORT_LVDS: /* * LVDS also needs backlight enabled, otherwise the display * will be blank. */ /* Enable the DFP port, disable the DVI*/ setbits8(cpld_base + CPLD_DIUCSR, 0x01 << 8); setbits8(cpld_base + CPLD_DIUCSR, 0x01 << 4); setbits8(cpld_base + CPLD_DIUCSR, CPLD_DIUCSR_BACKLIGHT); break; default: pr_err("%s: Unsupported monitor port %i\n", __func__, port); } iounmap(cpld_base); exit: of_node_put(cpld_node); }
static int __init corenet_diu_init(void) { struct device_node *np; np = of_find_compatible_node(NULL, NULL, "fsl,diu"); if (!np) return 0; if (of_find_matching_node_and_match(NULL, corenet_board_matches, NULL)) { t1042rdb_diu_init(); return 0; } /* T1024QDS board */ if (of_find_compatible_node(NULL, NULL, "fsl,T1024QDS")) t1024qds_diu_init(); return 0; }
void __init tegra30_init_fuse_early(void) { struct device_node *np; const struct of_device_id *of_match; np = of_find_matching_node_and_match(NULL, tegra30_fuse_of_match, &of_match); if (np) { fuse_base = of_iomap(np, 0); fuse_info = (struct tegra_fuse_info *)of_match->data; } else legacy_fuse_init(); if (!fuse_base) { pr_warn("fuse DT node missing and unknown chip id: 0x%02x\n", tegra_get_chip_id()); return; } tegra_init_revision(); speedo_tbl[fuse_info->speedo_idx](&tegra_sku_info); tegra30_fuse_add_randomness(); }
int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) { const struct of_device_id *clcd_id; enum versatile_clcd versatile_clcd_type; struct device_node *np; struct regmap *map; np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match, &clcd_id); if (!np) { /* Non-ARM reference designs, just bail out */ return 0; } versatile_clcd_type = (enum versatile_clcd)clcd_id->data; map = syscon_node_to_regmap(np); if (IS_ERR(map)) { dev_err(dev, "no Versatile syscon regmap\n"); return PTR_ERR(map); } switch (versatile_clcd_type) { case INTEGRATOR_CLCD_CM: versatile_syscon_map = map; priv->variant = &pl110_integrator; priv->variant_display_enable = pl111_integrator_enable; dev_info(dev, "set up callbacks for Integrator PL110\n"); break; case VERSATILE_CLCD: versatile_syscon_map = map; /* This can do RGB565 with external PLD */ priv->variant = &pl110_versatile; priv->variant_display_enable = pl111_versatile_enable; priv->variant_display_disable = pl111_versatile_disable; /* * The Versatile has a variant halfway between PL110 * and PL111 where these two registers have already been * swapped. */ priv->ienb = CLCD_PL111_IENB; priv->ctrl = CLCD_PL111_CNTL; dev_info(dev, "set up callbacks for Versatile PL110\n"); break; case REALVIEW_CLCD_EB: case REALVIEW_CLCD_PB1176: case REALVIEW_CLCD_PB11MP: case REALVIEW_CLCD_PBA8: case REALVIEW_CLCD_PBX: versatile_syscon_map = map; priv->variant = &pl111_realview; priv->variant_display_enable = pl111_realview_clcd_enable; priv->variant_display_disable = pl111_realview_clcd_disable; dev_info(dev, "set up callbacks for RealView PL111\n"); break; default: dev_info(dev, "unknown Versatile system controller\n"); break; } return 0; }