static void rfbi_display_disable(struct omap_dss_device *dssdev) { dssdev->driver->disable(dssdev); omap_dispc_unregister_isr(framedone_callback, NULL, DISPC_IRQ_FRAMEDONE); omap_dss_stop_device(dssdev); }
static void dpi_display_disable(struct omap_dss_device *dssdev) { if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED) return; if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED) dpi_display_resume(dssdev); dssdev->driver->disable(dssdev); dispc_enable_lcd_out(0); #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dss_select_clk_source(0, 0); dsi_pll_uninit(); enable_vpll2_power(0); dss_clk_disable(DSS_CLK_FCK2); #endif dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); dssdev->state = OMAP_DSS_DISPLAY_DISABLED; omap_dss_stop_device(dssdev); }
static int dpi_display_enable(struct omap_dss_device *dssdev) { int r; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { DSSERR("display already enabled\n"); r = -EINVAL; goto err1; } dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); r = dpi_basic_init(dssdev); if (r) goto err2; #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dss_clk_enable(DSS_CLK_FCK2); enable_vpll2_power(1); r = dsi_pll_init(1, 1); if (r) goto err3; #endif r = dpi_set_mode(dssdev); if (r) goto err4; mdelay(2); dispc_enable_lcd_out(1); r = dssdev->driver->enable(dssdev); if (r) goto err5; dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; return 0; err5: dispc_enable_lcd_out(0); err4: #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dsi_pll_uninit(); err3: dss_clk_disable(DSS_CLK_FCK2); #endif err2: dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); err1: omap_dss_stop_device(dssdev); err0: return r; }
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) { dssdev->manager->disable(dssdev->manager); if (dpi_use_dsi_pll(dssdev)) { dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); dsi_pll_uninit(dpi.dsidev, true); dsi_runtime_put(dpi.dsidev); } dispc_runtime_put(); dss_runtime_put(); #ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT if (dpi.fb_skip) { dssdev->dss_clks_disable(); dpi.fb_skip = false; } #endif if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); omap_dss_stop_device(dssdev); }
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) { if (dssdev->manager) dssdev->manager->disable(dssdev->manager); #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL { enum omap_dsi_index ix; ix = (dssdev->channel == OMAP_DSS_CHANNEL_LCD) ? DSI1 : DSI2; dss_select_dispc_clk_source(ix, DSS_SRC_DSS1_ALWON_FCLK); dsi_pll_uninit(ix); } #endif /* cut clock(s) */ dssdev->state = OMAP_DSS_DISPLAY_DISABLED; if (!cpu_is_omap44xx()) dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); dss_mainclk_state_disable(true); if (cpu_is_omap34xx() && !cpu_is_omap3630()) regulator_disable(dpi.vdds_dsi_reg); omap_dss_stop_device(dssdev); }
void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev) { omap_dispc_unregister_isr(framedone_callback, NULL, DISPC_IRQ_FRAMEDONE); omap_dss_stop_device(dssdev); rfbi_runtime_put(); }
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) { int r; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } if (cpu_is_omap34xx()) { r = regulator_enable(dpi.vdds_dsi_reg); if (r) goto err1; } dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); r = dpi_basic_init(dssdev); if (r) goto err2; if (dpi_use_dsi_pll(dssdev)) { dss_clk_enable(DSS_CLK_SYSCK); r = dsi_pll_init(dpi.dsidev, 0, 1); if (r) goto err3; } r = dpi_set_mode(dssdev); if (r) goto err4; mdelay(2); dssdev->manager->enable(dssdev->manager); return 0; err4: if (dpi_use_dsi_pll(dssdev)) dsi_pll_uninit(dpi.dsidev, true); err3: if (dpi_use_dsi_pll(dssdev)) dss_clk_disable(DSS_CLK_SYSCK); err2: dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); err1: omap_dss_stop_device(dssdev); err0: return r; }
void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev) { DSSDBG("Enter hdmi_display_disable\n"); mutex_lock(&hdmi.lock); hdmi_power_off_full(dssdev); omap_dss_stop_device(dssdev); mutex_unlock(&hdmi.lock); }
void omapdss_sdi_display_disable(struct omap_dss_device *dssdev) { dssdev->manager->disable(dssdev->manager); dss_sdi_disable(); dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); regulator_disable(sdi.vdds_sdi_reg); omap_dss_stop_device(dssdev); }
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) { int r; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } if (cpu_is_omap34xx()) { r = regulator_enable(dpi.vdds_dsi_reg); if (r) goto err1; } dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); r = dpi_basic_init(dssdev); if (r) goto err2; #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dss_clk_enable(DSS_CLK_SYSCK); r = dsi_pll_init(dssdev, 0, 1); if (r) goto err3; #endif r = dpi_set_mode(dssdev); if (r) goto err4; mdelay(2); dssdev->manager->enable(dssdev->manager); return 0; err4: #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dsi_pll_uninit(); err3: dss_clk_disable(DSS_CLK_SYSCK); #endif err2: dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); err1: omap_dss_stop_device(dssdev); err0: return r; }
void omapdss_sdi_display_disable(struct omap_dss_device *dssdev) { dss_mgr_disable(dssdev->manager); dss_sdi_disable(); dispc_runtime_put(); dss_runtime_put(); regulator_disable(sdi.vdds_sdi_reg); omap_dss_stop_device(dssdev); }
int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev) { struct omap_dss_hdmi_data *priv = dssdev->data; int r = 0; DSSDBG("ENTER hdmi_display_enable\n"); mutex_lock(&hdmi.lock); if (dssdev->manager == NULL) { DSSERR("failed to enable display: no manager\n"); r = -ENODEV; goto err0; } hdmi.ip_data.hpd_gpio = priv->hpd_gpio; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } if (dssdev->platform_enable) { r = dssdev->platform_enable(dssdev); if (r) { DSSERR("failed to enable GPIO's\n"); goto err1; } } r = hdmi_power_on(dssdev); if (r) { DSSERR("failed to power on device\n"); goto err2; } mutex_unlock(&hdmi.lock); return 0; err2: if (dssdev->platform_disable) dssdev->platform_disable(dssdev); err1: omap_dss_stop_device(dssdev); err0: mutex_unlock(&hdmi.lock); return r; }
int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev) { int r; if (dssdev->manager == NULL) { DSSERR("failed to enable display: no manager\n"); return -ENODEV; } r = rfbi_runtime_get(); if (r) return r; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } r = omap_dispc_register_isr(framedone_callback, NULL, DISPC_IRQ_FRAMEDONE); if (r) { DSSERR("can't get FRAMEDONE irq\n"); goto err1; } dispc_mgr_set_lcd_display_type(dssdev->manager->id, OMAP_DSS_LCD_DISPLAY_TFT); dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_RFBI); dispc_mgr_enable_stallmode(dssdev->manager->id, true); dispc_mgr_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size); rfbi_configure(dssdev->phy.rfbi.channel, dssdev->ctrl.pixel_size, dssdev->phy.rfbi.data_lines); rfbi_set_timings(dssdev->phy.rfbi.channel, &dssdev->ctrl.rfbi_timings); return 0; err1: omap_dss_stop_device(dssdev); err0: rfbi_runtime_put(); return r; }
static int rfbi_display_enable(struct omap_dss_device *dssdev) { int r; dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } r = omap_dispc_register_isr(framedone_callback, NULL, DISPC_IRQ_FRAMEDONE); if (r) { DSSERR("can't get FRAMEDONE irq\n"); goto err1; } dispc_set_lcd_display_type(OMAP_DSS_LCD_DISPLAY_TFT); dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_RFBI); dispc_set_tft_data_lines(dssdev->ctrl.pixel_size); rfbi_configure(dssdev->phy.rfbi.channel, dssdev->ctrl.pixel_size, dssdev->phy.rfbi.data_lines); rfbi_set_timings(dssdev->phy.rfbi.channel, &dssdev->ctrl.rfbi_timings); if (dssdev->driver->enable) { r = dssdev->driver->enable(dssdev); if (r) goto err2; } return 0; err2: omap_dispc_unregister_isr(framedone_callback, NULL, DISPC_IRQ_FRAMEDONE); err1: omap_dss_stop_device(dssdev); err0: return r; }
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) { dssdev->manager->disable(dssdev->manager); if (dpi_use_dsi_pll(dssdev)) { dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); dsi_pll_uninit(dpi.dsidev, true); dss_clk_disable(DSS_CLK_SYSCK); } dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); omap_dss_stop_device(dssdev); }
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) { dssdev->manager->disable(dssdev->manager); #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dss_select_dispc_clk_source(DSS_CLK_SRC_FCK); dsi_pll_uninit(); dss_clk_disable(DSS_CLK_SYSCK); #endif dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); omap_dss_stop_device(dssdev); }
static void dpi_display_disable(struct omap_dss_device *dssdev) { int lcd_channel_ix = 0; int use_dsi_for_hdmi = 0; if (strncmp("hdmi", dssdev->name, 4) == 0) use_dsi_for_hdmi = 1; if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) lcd_channel_ix = 1; if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED) return; if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED) dpi_display_resume(dssdev); dssdev->driver->disable(dssdev); if (use_dsi_for_hdmi) { dss_select_clk_source(0, 0); dispc_go(OMAP_DSS_CHANNEL_LCD); while (dispc_go_busy(OMAP_DSS_CHANNEL_LCD)) ; dsi_pll_uninit(lcd_channel_ix); enable_vpll2_power(0); dss_clk_disable(DSS_CLK_FCK2); } if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0); else dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0); dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); dssdev->state = OMAP_DSS_DISPLAY_DISABLED; omap_dss_stop_device(dssdev); }
int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev) { struct omap_dss_output *out = dssdev->output; int r = 0; DSSDBG("ENTER hdmi_display_enable\n"); mutex_lock(&hdmi.lock); if (out == NULL || out->manager == NULL) { DSSERR("failed to enable display: no output/manager\n"); r = -ENODEV; goto err0; } hdmi.ip_data.hpd_gpio = hdmi.hpd_gpio; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } r = hdmi_power_on_full(dssdev); if (r) { DSSERR("failed to power on device\n"); goto err1; } mutex_unlock(&hdmi.lock); return 0; err1: omap_dss_stop_device(dssdev); err0: mutex_unlock(&hdmi.lock); return r; }
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) { struct omap_overlay_manager *mgr = dssdev->output->manager; mutex_lock(&dpi.lock); dss_mgr_disable(mgr); if (dpi_use_dsi_pll(dssdev)) { dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); dsi_pll_uninit(dpi.dsidev, true); dsi_runtime_put(dpi.dsidev); } dispc_runtime_put(); if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) regulator_disable(dpi.vdds_dsi_reg); omap_dss_stop_device(dssdev); mutex_unlock(&dpi.lock); }
static void sdi_display_disable(struct omap_dss_device *dssdev) { if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED) return; if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED) if (sdi_display_resume(dssdev)) return; if (dssdev->driver->disable) dssdev->driver->disable(dssdev); /* TODO: change here if LCD2 support is needed */ dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0); dss_sdi_disable(); dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); dssdev->state = OMAP_DSS_DISPLAY_DISABLED; omap_dss_stop_device(dssdev); }
int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev) { int r; struct dispc_clock_info dispc_cinfo; struct omap_video_timings timings = { .hsw = 1, .hfp = 1, .hbp = 1, .vsw = 1, .vfp = 0, .vbp = 0, }; r = omap_dss_start_device(dssdev); if (r) { DSSERR("RFBI: failed to start device\n"); return r; } r = rfbi_runtime_get(); if (r) { DSSERR("RFBI: failed to get runtime\n"); goto err0; } r = omap_dispc_register_isr(framedone_callback, NULL, DISPC_IRQ_FRAMEDONE); if (r) { DSSERR("RFBI: can't get FRAMEDONE irq\n"); goto err1; } dispc_set_parallel_interface_mode(dssdev->manager->id, OMAP_DSS_PARALLELMODE_RFBI); dispc_enable_fifohandcheck(dssdev->manager->id, 1); dispc_set_lcd_display_type(dssdev->manager->id, OMAP_DSS_LCD_DISPLAY_TFT); dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size); dispc_set_lcd_timings(dssdev->manager->id, &timings); r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo); if (r) { DSSERR("RFBI: Failed to set dispc clocks\n"); goto err1; } rfbi_configure(dssdev->phy.rfbi.channel, dssdev->ctrl.pixel_size, dssdev->phy.rfbi.data_lines); rfbi_set_timings(dssdev->phy.rfbi.channel, &dssdev->ctrl.rfbi_timings); return 0; err1: rfbi_runtime_put(); err0: omap_dss_stop_device(dssdev); return r; } EXPORT_SYMBOL(omapdss_rfbi_display_enable); void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev) { omap_dispc_unregister_isr(framedone_callback, NULL, DISPC_IRQ_FRAMEDONE); omap_dss_stop_device(dssdev); rfbi_runtime_put(); }
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) { struct omap_dss_output *out = dssdev->output; int r; mutex_lock(&dpi.lock); if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi.vdds_dsi_reg) { DSSERR("no VDSS_DSI regulator\n"); r = -ENODEV; goto err_no_reg; } if (out == NULL || out->manager == NULL) { DSSERR("failed to enable display: no output/manager\n"); r = -ENODEV; goto err_no_out_mgr; } r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err_start_dev; } if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) { r = regulator_enable(dpi.vdds_dsi_reg); if (r) goto err_reg_enable; } r = dispc_runtime_get(); if (r) goto err_get_dispc; r = dss_dpi_select_source(dssdev->channel); if (r) goto err_src_sel; if (dpi_use_dsi_pll(dssdev)) { r = dsi_runtime_get(dpi.dsidev); if (r) goto err_get_dsi; r = dsi_pll_init(dpi.dsidev, 0, 1); if (r) goto err_dsi_pll_init; } r = dpi_set_mode(dssdev); if (r) goto err_set_mode; dpi_config_lcd_manager(dssdev); mdelay(2); r = dss_mgr_enable(out->manager); if (r) goto err_mgr_enable; mutex_unlock(&dpi.lock); return 0; err_mgr_enable: err_set_mode: if (dpi_use_dsi_pll(dssdev)) dsi_pll_uninit(dpi.dsidev, true); err_dsi_pll_init: if (dpi_use_dsi_pll(dssdev)) dsi_runtime_put(dpi.dsidev); err_get_dsi: err_src_sel: dispc_runtime_put(); err_get_dispc: if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) regulator_disable(dpi.vdds_dsi_reg); err_reg_enable: omap_dss_stop_device(dssdev); err_start_dev: err_no_out_mgr: err_no_reg: mutex_unlock(&dpi.lock); return r; }
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) { int r; if (cpu_is_omap44xx() && dssdev->channel != OMAP_DSS_CHANNEL_LCD2) { /* Only LCD2 channel is connected to DPI on OMAP4 */ return -EINVAL; } r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); return r; } if (cpu_is_omap34xx() && !cpu_is_omap3630()) { r = regulator_enable(dpi.vdds_dsi_reg); if (r) goto err0; } /* turn on clock(s) */ dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; if (!cpu_is_omap44xx()) dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL /*Should need only FCK2 (38.4MHz)*/ dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2); #endif dss_mainclk_state_enable(); dpi_basic_init(dssdev); #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL if (!cpu_is_omap44xx()) r = dsi_pll_init(dssdev, 0, 1); else { r = dsi_pll_init(dssdev, 1, 1); } if (r) goto err1; #endif /* CONFIG_OMAP2_DSS_USE_DSI_PLL */ r = dpi_set_mode(dssdev); if (r) goto err2; mdelay(2); if (dssdev->manager) { if (cpu_is_omap44xx()) dpi_start_auto_update(dssdev); dssdev->manager->enable(dssdev->manager); } return 0; err2: #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dsi_pll_uninit(dssdev->channel == OMAP_DSS_CHANNEL_LCD ? DSI1 : DSI2); err1: #endif dssdev->state = OMAP_DSS_DISPLAY_DISABLED; if (!cpu_is_omap44xx()) dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); dss_mainclk_state_disable(true); if (cpu_is_omap34xx() && !cpu_is_omap3630()) regulator_disable(dpi.vdds_dsi_reg); err0: omap_dss_stop_device(dssdev); return r; }
static int dpi_display_enable(struct omap_dss_device *dssdev) { int r; int lcd_channel_ix = 1; int use_dsi_for_hdmi = 0; if (strncmp("hdmi", dssdev->name, 4) == 0) use_dsi_for_hdmi = 1; if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) { DSSINFO("Lcd channel index 1"); dpi2_base = ioremap(DPI2_BASE, 2000); lcd_channel_ix = 1; } else lcd_channel_ix = 0; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { DSSERR("display already enabled\n"); r = -EINVAL; goto err1; } dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); r = dpi_basic_init(dssdev); if (r) goto err2; if (use_dsi_for_hdmi) { dss_clk_enable(DSS_CLK_FCK2); enable_vpll2_power(1); if (cpu_is_omap3630()) r = dsi_pll_init(lcd_channel_ix, dssdev, 1, 1); else /*check param 2*/ r = dsi_pll_init(lcd_channel_ix, dssdev, 0, 1); if (r) goto err3; } r = dpi_set_mode(dssdev); if (r) goto err4; mdelay(2); if (cpu_is_omap44xx()) dpi_start_auto_update(dssdev); if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 1); else dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 1); r = dssdev->driver->enable(dssdev); if (r) goto err5; dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; /* This is done specifically for HDMI panel * Default HDMI panel timings may not work for all monitors * Reset HDMI panel timings after enabling HDMI. */ if (use_dsi_for_hdmi) dpi_set_timings(dssdev, &dssdev->panel.timings); return 0; err5: if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0); else dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0); err4: if (use_dsi_for_hdmi) { dsi_pll_uninit(lcd_channel_ix); enable_vpll2_power(0); err3: dss_clk_disable(DSS_CLK_FCK2); } err2: dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); err1: omap_dss_stop_device(dssdev); err0: return r; }
int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) { struct omap_video_timings *t = &dssdev->panel.timings; struct dss_clock_info dss_cinfo; struct dispc_clock_info dispc_cinfo; u16 lck_div, pck_div; unsigned long fck; unsigned long pck; int r; if (dssdev->manager == NULL) { DSSERR("failed to enable display: no manager\n"); return -ENODEV; } r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err_start_dev; } r = regulator_enable(sdi.vdds_sdi_reg); if (r) goto err_reg_enable; r = dss_runtime_get(); if (r) goto err_get_dss; r = dispc_runtime_get(); if (r) goto err_get_dispc; sdi_basic_init(dssdev); /* */ dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF; dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config, dssdev->panel.acbi, dssdev->panel.acb); r = dss_calc_clock_div(1, t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo); if (r) goto err_calc_clock_div; fck = dss_cinfo.fck; lck_div = dispc_cinfo.lck_div; pck_div = dispc_cinfo.pck_div; pck = fck / lck_div / pck_div / 1000; if (pck != t->pixel_clock) { DSSWARN("Could not find exact pixel clock. Requested %d kHz, " "got %lu kHz\n", t->pixel_clock, pck); t->pixel_clock = pck; } dispc_mgr_set_lcd_timings(dssdev->manager->id, t); r = dss_set_clock_div(&dss_cinfo); if (r) goto err_set_dss_clock_div; r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo); if (r) goto err_set_dispc_clock_div; dss_sdi_init(dssdev->phy.sdi.datapairs); r = dss_sdi_enable(); if (r) goto err_sdi_enable; mdelay(2); r = dss_mgr_enable(dssdev->manager); if (r) goto err_mgr_enable; return 0; err_mgr_enable: dss_sdi_disable(); err_sdi_enable: err_set_dispc_clock_div: err_set_dss_clock_div: err_calc_clock_div: dispc_runtime_put(); err_get_dispc: dss_runtime_put(); err_get_dss: regulator_disable(sdi.vdds_sdi_reg); err_reg_enable: omap_dss_stop_device(dssdev); err_start_dev: return r; }
int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) { struct omap_video_timings *t = &dssdev->panel.timings; struct dss_clock_info dss_cinfo; struct dispc_clock_info dispc_cinfo; u16 lck_div, pck_div; unsigned long fck; unsigned long pck; int r; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } r = regulator_enable(sdi.vdds_sdi_reg); if (r) goto err1; /* In case of skip_init sdi_init has already enabled the clocks */ if (!sdi.skip_init) dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); sdi_basic_init(); /* 15.5.9.1.2 */ dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF; dispc_set_pol_freq(dssdev->panel.config, dssdev->panel.acbi, dssdev->panel.acb); if (!sdi.skip_init) { r = dss_calc_clock_div(1, t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo); } else { r = dss_get_clock_div(&dss_cinfo); r = dispc_get_clock_div(&dispc_cinfo); } if (r) goto err2; fck = dss_cinfo.fck; lck_div = dispc_cinfo.lck_div; pck_div = dispc_cinfo.pck_div; pck = fck / lck_div / pck_div / 1000; if (pck != t->pixel_clock) { DSSWARN("Could not find exact pixel clock. Requested %d kHz, " "got %lu kHz\n", t->pixel_clock, pck); t->pixel_clock = pck; } dispc_set_lcd_timings(t); r = dss_set_clock_div(&dss_cinfo); if (r) goto err2; r = dispc_set_clock_div(&dispc_cinfo); if (r) goto err2; if (!sdi.skip_init) { dss_sdi_init(dssdev->phy.sdi.datapairs); r = dss_sdi_enable(); if (r) goto err1; mdelay(2); } dssdev->manager->enable(dssdev->manager); sdi.skip_init = 0; return 0; err2: dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); regulator_disable(sdi.vdds_sdi_reg); err1: omap_dss_stop_device(dssdev); err0: return r; }
static int sdi_display_enable(struct omap_dss_device *dssdev) { struct omap_video_timings *t = &dssdev->panel.timings; struct dss_clock_info dss_cinfo; struct dispc_clock_info dispc_cinfo; u16 lck_div, pck_div; unsigned long fck; unsigned long pck; int r; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err0; } if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { DSSERR("dssdev already enabled\n"); r = -EINVAL; goto err1; } /* In case of skip_init sdi_init has already enabled the clocks */ if (!sdi.skip_init) dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); sdi_basic_init(); /* 15.5.9.1.2 */ dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF; /* TODO: update for LCD2 here */ dispc_set_pol_freq(OMAP_DSS_CHANNEL_LCD, dssdev->panel.config, dssdev->panel.acbi, dssdev->panel.acb); if (!sdi.skip_init) { r = dss_calc_clock_div(1, t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo); } else { r = dss_get_clock_div(&dss_cinfo); r = dispc_get_clock_div(&dispc_cinfo); } if (r) goto err2; fck = dss_cinfo.fck; lck_div = dispc_cinfo.lck_div; pck_div = dispc_cinfo.pck_div; pck = fck / lck_div / pck_div / 1000; if (pck != t->pixel_clock) { DSSWARN("Could not find exact pixel clock. Requested %d kHz, " "got %lu kHz\n", t->pixel_clock, pck); t->pixel_clock = pck; } /* TODO: if needed, add LCD2 support here*/ dispc_set_lcd_timings(OMAP_DSS_CHANNEL_LCD, t); r = dss_set_clock_div(&dss_cinfo); if (r) goto err2; r = dispc_set_clock_div(&dispc_cinfo); if (r) goto err2; if (!sdi.skip_init) { dss_sdi_init(dssdev->phy.sdi.datapairs); r = dss_sdi_enable(); if (r) goto err1; mdelay(2); } /* TODO: change here if LCD2 support is needed */ dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 1); if (dssdev->driver->enable) { r = dssdev->driver->enable(dssdev); if (r) goto err3; } dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; sdi.skip_init = 0; return 0; err3: /* TODO: change here if LCD2 support is needed */ dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0); err2: dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); err1: omap_dss_stop_device(dssdev); err0: return r; }
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) { int r; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err_start_dev; } if (cpu_is_omap34xx()) { r = regulator_enable(dpi.vdds_dsi_reg); if (r) goto err_reg_enable; } r = dss_runtime_get(); if (r) goto err_get_dss; if (!dssdev->skip_init) { r = dispc_runtime_get(); if (r) goto err_get_dispc; } dpi_basic_init(dssdev); if (dpi_use_dsi_pll(dssdev)) { r = dsi_runtime_get(dpi.dsidev); if (r) goto err_get_dsi; if (!dssdev->skip_init) { r = dsi_pll_init(dpi.dsidev, 0, 1); if (r) goto err_dsi_pll_init; } } r = dpi_set_mode(dssdev); if (r) goto err_set_mode; mdelay(2); dssdev->manager->enable(dssdev->manager); if (dssdev->skip_init) dssdev->skip_init = false; return 0; err_set_mode: if (dpi_use_dsi_pll(dssdev)) dsi_pll_uninit(dpi.dsidev, true); err_dsi_pll_init: if (dpi_use_dsi_pll(dssdev)) dsi_runtime_put(dpi.dsidev); err_get_dsi: dispc_runtime_put(); err_get_dispc: dss_runtime_put(); err_get_dss: if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); err_reg_enable: omap_dss_stop_device(dssdev); err_start_dev: return r; }
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) { int r; if (cpu_is_omap34xx() && !dpi.vdds_dsi_reg) { DSSERR("no VDSS_DSI regulator\n"); return -ENODEV; } if (dssdev->manager == NULL) { DSSERR("failed to enable display: no manager\n"); return -ENODEV; } r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err_start_dev; } if (cpu_is_omap34xx()) { r = regulator_enable(dpi.vdds_dsi_reg); if (r) goto err_reg_enable; } r = dispc_runtime_get(); if (r) goto err_get_dispc; dpi_basic_init(dssdev); if (dpi_use_dsi_pll(dssdev)) { r = dsi_runtime_get(dpi.dsidev); if (r) goto err_get_dsi; r = dsi_pll_init(dpi.dsidev, 0, 1); if (r) goto err_dsi_pll_init; } r = dpi_set_mode(dssdev); if (r) goto err_set_mode; mdelay(2); r = dss_mgr_enable(dssdev->manager); if (r) goto err_mgr_enable; return 0; err_mgr_enable: err_set_mode: if (dpi_use_dsi_pll(dssdev)) dsi_pll_uninit(dpi.dsidev, true); err_dsi_pll_init: if (dpi_use_dsi_pll(dssdev)) dsi_runtime_put(dpi.dsidev); err_get_dsi: dispc_runtime_put(); err_get_dispc: if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); err_reg_enable: omap_dss_stop_device(dssdev); err_start_dev: return r; }