u8 omap_pm_get_max_vdd1_opp() { if (cpu_is_omap3630()) { switch (omap_rev_id()) { case OMAP_3630: default: if (sr_read_efuse_nvalues(VDD1_OPP5) != 0) return VDD1_OPP5; else case OMAP_3630_600: return VDD1_OPP5; case OMAP_3630_800: return VDD1_OPP6; case OMAP_3630_1000: return VDD1_OPP6; } } else { if (omap_rev() < OMAP3430_REV_ES3_1) return VDD1_OPP5; else { switch (omap_rev_id()) { case OMAP_3420: case OMAP_3430: return VDD1_OPP5; case OMAP_3440: return VDD1_OPP6; default: return VDD1_OPP5; } } } }
u8 omap_pm_get_max_vdd1_opp() { if (cpu_is_omap3630()) { return VDD1_OPP5; } else { if (omap_rev() < OMAP3430_REV_ES3_1) return VDD1_OPP5; else { switch (omap_rev_id()) { case OMAP_3420: case OMAP_3430: return VDD1_OPP5; case OMAP_3440: return VDD1_OPP6; default: return VDD1_OPP5; } } } }
static void __init omap_zoom2_init_irq(void) { if (cpu_is_omap3630()) { omap2_init_common_hw(mt46h32m32lf6_sdrc_params, omap3630_mpu_rate_table, omap3630_dsp_rate_table, omap3630_l3_rate_table); } else { switch (omap_rev_id()) { case OMAP_3420: omap2_init_common_hw(mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table, omap3_dsp_rate_table_3420, omap3_l3_rate_table); break; case OMAP_3430: omap2_init_common_hw(mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table, omap3_dsp_rate_table, omap3_l3_rate_table); break; case OMAP_3440: omap2_init_common_hw(mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table, omap3_dsp_rate_table_3440, omap3_l3_rate_table); break; default: omap2_init_common_hw(mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table, omap3_dsp_rate_table, omap3_l3_rate_table); break; } } omap_init_irq(); omap_gpio_init(); zoom2_init_smc911x(); }