int main(int argc, char const * argv[]) { struct list_head * events; struct list_head * pos; char const * pretty; char title[10 * MAX_LINE]; char const * event_doc = ""; atexit(cleanup); get_options(argc, argv); /* usefull for testing purpose to allow to force the cpu type * with --cpu-type */ if (cpu_string) { cpu_type = op_get_cpu_number(cpu_string); } else { cpu_type = op_get_cpu_type(); } if (cpu_type == CPU_NO_GOOD) { fprintf(stderr, "cpu_type '%s' is not valid\n", cpu_string ? cpu_string : "unset"); fprintf(stderr, "you should upgrade oprofile or force the " "use of timer mode\n"); exit(EXIT_FAILURE); } parsed_events = (struct parsed_event *)xcalloc(num_chosen_events, sizeof(struct parsed_event)); pretty = op_get_cpu_type_str(cpu_type); if (get_cpu_type) { printf("%s\n", pretty); exit(EXIT_SUCCESS); } if (get_default_event) { show_default_event(); exit(EXIT_SUCCESS); } if (cpu_type == CPU_TIMER_INT) { if (!check_events) printf("Using timer interrupt.\n"); exit(EXIT_SUCCESS); } events = op_events(cpu_type); if (!chosen_events && (unit_mask || check_events || extra_mask)) { fprintf(stderr, "No events given.\n"); exit(EXIT_FAILURE); } if (unit_mask) { show_unit_mask(); exit(EXIT_SUCCESS); } if (extra_mask) { show_extra_mask(); exit(EXIT_SUCCESS); } if (check_events) { resolve_events(); exit(EXIT_SUCCESS); } /* without --check-events, the only argument must be an event name */ if (chosen_events && chosen_events[0]) { if (chosen_events[1]) { fprintf(stderr, "Too many arguments.\n"); exit(EXIT_FAILURE); } list_for_each(pos, events) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (strcmp(event->name, chosen_events[0]) == 0) { char const * map = find_mapping_for_event(event->val, cpu_type); if (map) { printf("%d %s\n", event->val, map); } else { printf("%d\n", event->val); } exit(EXIT_SUCCESS); } } fprintf(stderr, "No such event \"%s\"\n", chosen_events[0]); exit(EXIT_FAILURE); } /* default: list all events */ switch (cpu_type) { case CPU_HAMMER: event_doc = "See BIOS and Kernel Developer's Guide for AMD Athlon and AMD Opteron Processors\n" "(26094.pdf), Section 10.2\n\n"; break; case CPU_FAMILY10: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 10h Processors\n" "(31116.pdf), Section 3.14\n\n"; break; case CPU_FAMILY11H: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 11h Processors\n" "(41256.pdf), Section 3.14\n\n"; break; case CPU_FAMILY12H: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 12h Processors\n"; break; case CPU_FAMILY14H: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 14h Processors\n"; break; case CPU_FAMILY15H: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 15h Processors\n"; break; case CPU_AMD64_GENERIC: event_doc = "See BIOS and Kernel Developer's Guide for AMD Processors\n"; break; case CPU_ATHLON: event_doc = "See AMD Athlon Processor x86 Code Optimization Guide\n" "(22007.pdf), Appendix D\n\n"; break; case CPU_PPRO: case CPU_PII: case CPU_PIII: case CPU_P6_MOBILE: case CPU_P4: case CPU_P4_HT2: case CPU_CORE: case CPU_CORE_2: case CPU_CORE_I7: case CPU_NEHALEM: case CPU_HASWELL: case CPU_WESTMERE: case CPU_SANDYBRIDGE: case CPU_IVYBRIDGE: case CPU_ATOM: event_doc = "See Intel Architecture Developer's Manual Volume 3B, Appendix A and\n" "Intel Architecture Optimization Reference Manual (730795-001)\n\n"; break; case CPU_ARCH_PERFMON: event_doc = "See Intel 64 and IA-32 Architectures Software Developer's Manual\n" "Volume 3B (Document 253669) Chapter 18 for architectural perfmon events\n" "This is a limited set of fallback events because oprofile doesn't know your CPU\n"; break; case CPU_IA64: case CPU_IA64_1: case CPU_IA64_2: event_doc = "See Intel Itanium Processor Reference Manual\n" "for Software Development (Document 245320-003),\n" "Intel Itanium Processor Reference Manual\n" "for Software Optimization (Document 245473-003),\n" "Intel Itanium 2 Processor Reference Manual\n" "for Software Development and Optimization (Document 251110-001)\n\n"; break; case CPU_AXP_EV4: case CPU_AXP_EV5: case CPU_AXP_PCA56: case CPU_AXP_EV6: case CPU_AXP_EV67: event_doc = "See Alpha Architecture Reference Manual\n" "http://download.majix.org/dec/alpha_arch_ref.pdf\n"; break; case CPU_ARM_XSCALE1: case CPU_ARM_XSCALE2: event_doc = "See Intel XScale Core Developer's Manual\n" "Chapter 8 Performance Monitoring\n"; break; case CPU_ARM_MPCORE: event_doc = "See ARM11 MPCore Processor Technical Reference Manual r1p0\n" "Page 3-70, performance counters\n"; break; case CPU_ARM_V6: event_doc = "See ARM11 Technical Reference Manual\n"; break; case CPU_ARM_V7: event_doc = "See Cortex-A8 Technical Reference Manual\n" "Cortex A8 DDI (ARM DDI 0344B, revision r1p1)\n"; break; case CPU_ARM_SCORPION: event_doc = "See ARM Architecture Reference Manual ARMv7-A and ARMv7-R Edition\n" "Scorpion Processor Family Programmer's Reference Manual (PRM)\n"; break; case CPU_ARM_SCORPIONMP: event_doc = "See ARM Architecture Reference Manual ARMv7-A and ARMv7-R Edition\n" "Scorpion Processor Family Programmer's Reference Manual (PRM)\n"; break; case CPU_ARM_V7_CA9: event_doc = "See Cortex-A9 Technical Reference Manual\n" "Cortex A9 DDI (ARM DDI 0388E, revision r2p0)\n"; break; case CPU_ARM_V7_CA5: event_doc = "See Cortex-A5 Technical Reference Manual\n" "Cortex A5 DDI (ARM DDI 0433B, revision r0p1)\n"; break; case CPU_ARM_V7_CA7: event_doc = "See Cortex-A7 MPCore Technical Reference Manual\n" "Cortex A7 DDI (ARM DDI 0464D, revision r0p3)\n"; break; case CPU_ARM_V7_CA15: event_doc = "See Cortex-A15 MPCore Technical Reference Manual\n" "Cortex A15 DDI (ARM DDI 0438F, revision r3p1)\n"; break; case CPU_ARM_V8: event_doc = "See Cortex-A57 MPCore Technical Reference Manual\n" "Cortex A57 \n"; break; case CPU_PPC64_PA6T: event_doc = "See PA6T Power Implementation Features Book IV\n" "Chapter 7 Performance Counters\n"; break; case CPU_PPC64_POWER4: case CPU_PPC64_POWER5: case CPU_PPC64_POWER6: case CPU_PPC64_POWER5p: case CPU_PPC64_POWER5pp: case CPU_PPC64_970: case CPU_PPC64_970MP: case CPU_PPC64_POWER7: case CPU_PPC64_IBM_COMPAT_V1: event_doc = "When using operf, events may be specified without a '_GRP<n>' suffix.\n" "If _GRP<n> (i.e., group number) is not specified, one will be automatically\n" "selected for use by the profiler. OProfile post-processing tools will\n" "always show real event names that include the group number suffix.\n\n" "Documentation for IBM POWER7 can be obtained at:\n" "http://www.power.org/events/Power7/\n" "No public performance monitoring doc available for older processors.\n"; break; case CPU_PPC64_ARCH_V1: case CPU_PPC64_POWER8: event_doc = "This processor type is fully supported with operf; opcontrol timer mode may be available.\n" "See Power ISA 2.07 at https://www.power.org/\n\n"; break; case CPU_PPC64_CELL: event_doc = "Obtain Cell Broadband Engine documentation at:\n" "http://www-306.ibm.com/chips/techlib/techlib.nsf/products/Cell_Broadband_Engine\n"; break; case CPU_MIPS_20K: event_doc = "See Programming the MIPS64 20Kc Processor Core User's " "manual available from www.mips.com\n"; break; case CPU_MIPS_24K: event_doc = "See Programming the MIPS32 24K Core " "available from www.mips.com\n"; break; case CPU_MIPS_25K: event_doc = "See Programming the MIPS64 25Kf Processor Core User's " "manual available from www.mips.com\n"; break; case CPU_MIPS_34K: event_doc = "See Programming the MIPS32 34K Core Family " "available from www.mips.com\n"; break; case CPU_MIPS_74K: event_doc = "See Programming the MIPS32 74K Core Family " "available from www.mips.com\n"; break; case CPU_MIPS_1004K: event_doc = "See Programming the MIPS32 1004K Core Family " "available from www.mips.com\n"; break; case CPU_MIPS_5K: event_doc = "See Programming the MIPS64 5K Processor Core Family " "Software User's manual available from www.mips.com\n"; break; case CPU_MIPS_R10000: case CPU_MIPS_R12000: event_doc = "See NEC R10000 / R12000 User's Manual\n" "http://www.necelam.com/docs/files/U10278EJ3V0UM00.pdf\n"; break; case CPU_MIPS_RM7000: event_doc = "See RM7000 Family User Manual " "available from www.pmc-sierra.com\n"; break; case CPU_MIPS_RM9000: event_doc = "See RM9000x2 Family User Manual " "available from www.pmc-sierra.com\n"; break; case CPU_MIPS_SB1: case CPU_MIPS_VR5432: event_doc = "See NEC VR5443 User's Manual, Volume 1\n" "http://www.necelam.com/docs/files/1375_V1.pdf\n"; break; case CPU_MIPS_VR5500: event_doc = "See NEC R10000 / R12000 User's Manual\n" "http://www.necel.com/nesdis/image/U16677EJ3V0UM00.pdf\n"; break; case CPU_MIPS_LOONGSON2: event_doc = "See loongson2 RISC Microprocessor Family Reference Manual\n"; break; case CPU_PPC_E500: case CPU_PPC_E500_2: event_doc = "See PowerPC e500 Core Complex Reference Manual\n" "Chapter 7: Performance Monitor\n" "Downloadable from http://www.freescale.com\n"; break; case CPU_PPC_E300: event_doc = "See PowerPC e300 Core Reference Manual\n" "Downloadable from http://www.freescale.com\n"; break; case CPU_PPC_7450: event_doc = "See MPC7450 RISC Microprocessor Family Reference " "Manual\n" "Chapter 11: Performance Monitor\n" "Downloadable from http://www.freescale.com\n"; break; case CPU_AVR32: event_doc = "See AVR32 Architecture Manual\n" "Chapter 6: Performance Counters\n" "http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf\n"; break; case CPU_TILE_TILE64: case CPU_TILE_TILEPRO: case CPU_TILE_TILEGX: event_doc = "See Tilera development doc: Multicore Development " "Environment Optimization Guide.\n" "Contact Tilera Corporation or visit " "http://www.tilera.com for more information.\n"; break; case CPU_S390_Z10: case CPU_S390_Z196: case CPU_S390_ZEC12: event_doc = "IBM System z CPU Measurement Facility\n" "http://www-01.ibm.com/support/docview.wss" "?uid=isg26fcd1cc32246f4c8852574ce0044734a\n"; break; case CPU_RTC: break; // don't use default, if someone add a cpu he wants a compiler warning // if he forgets to handle it here. case CPU_TIMER_INT: case CPU_NO_GOOD: case MAX_CPU_TYPE: printf("%d is not a valid processor type.\n", cpu_type); exit(EXIT_FAILURE); } sprintf(title, "oprofile: available events for CPU type \"%s\"\n\n", pretty); if (want_xml) open_xml_events(title, event_doc, cpu_type); else { printf("%s%s", title, event_doc); printf("For architectures using unit masks, you may be able to specify\n" "unit masks by name. See 'opcontrol' or 'operf' man page for more details.\n\n"); } list_for_each(pos, events) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (want_xml) xml_help_for_event(event); else help_for_event(event); } if (want_xml) close_xml_events(); return EXIT_SUCCESS; }
int main(int argc, char const * argv[]) { struct list_head * events; struct list_head * pos; char const * pretty; size_t nr_counter; atexit(cleanup); get_options(argc, argv); /* usefull for testing purpose to allow to force the cpu type * with --cpu-type */ if (cpu_string) { cpu_type = op_get_cpu_number(cpu_string); } else { cpu_type = op_get_cpu_type(); } if (cpu_type == CPU_NO_GOOD) { fprintf(stderr, "cpu_type '%s' is not valid\n", cpu_string ? cpu_string : "unset"); exit(EXIT_FAILURE); } nr_counter = op_get_nr_counters(cpu_type); parsed_events = xcalloc(nr_counter, sizeof(struct parsed_event)); pretty = op_get_cpu_type_str(cpu_type); if (get_cpu_type) { printf("%s\n", pretty); exit(EXIT_SUCCESS); } if (get_default_event) { show_default_event(); exit(EXIT_SUCCESS); } if (cpu_type == CPU_TIMER_INT) { if (!check_events) printf("Using timer interrupt.\n"); exit(EXIT_SUCCESS); } events = op_events(cpu_type); if (!chosen_events && (unit_mask || check_events)) { fprintf(stderr, "No events given.\n"); exit(EXIT_FAILURE); } if (unit_mask) { show_unit_mask(); exit(EXIT_SUCCESS); } if (check_events) { resolve_events(); exit(EXIT_SUCCESS); } /* without --check-events, the only argument must be an event name */ if (chosen_events && chosen_events[0]) { if (chosen_events[1]) { fprintf(stderr, "Too many arguments.\n"); exit(EXIT_FAILURE); } list_for_each(pos, events) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (strcmp(event->name, chosen_events[0]) == 0) { char const * map = find_mapping_for_event(event->val, cpu_type); if (map) { printf("%d %s\n", event->val, map); } else { printf("%d\n", event->val); } exit(EXIT_SUCCESS); } } fprintf(stderr, "No such event \"%s\"\n", chosen_events[0]); exit(EXIT_FAILURE); } /* default: list all events */ printf("oprofile: available events for CPU type \"%s\"\n\n", pretty); switch (cpu_type) { case CPU_HAMMER: break; case CPU_ATHLON: printf ("See AMD document x86 optimisation guide (22007.pdf), Appendix D\n\n"); break; case CPU_PPRO: case CPU_PII: case CPU_PIII: case CPU_P6_MOBILE: case CPU_P4: case CPU_P4_HT2: printf("See Intel Architecture Developer's Manual Volume 3, Appendix A and\n" "Intel Architecture Optimization Reference Manual (730795-001)\n\n"); break; case CPU_IA64: case CPU_IA64_1: case CPU_IA64_2: printf("See Intel Itanium Processor Reference Manual\n" "for Software Development (Document 245320-003),\n" "Intel Itanium Processor Reference Manual\n" "for Software Optimization (Document 245473-003),\n" "Intel Itanium 2 Processor Reference Manual\n" "for Software Development and Optimization (Document 251110-001)\n\n"); break; case CPU_AXP_EV4: case CPU_AXP_EV5: case CPU_AXP_PCA56: case CPU_AXP_EV6: case CPU_AXP_EV67: printf("See Alpha Architecture Reference Manual\n" "ftp://ftp.compaq.com/pub/products/alphaCPUdocs/alpha_arch_ref.pdf\n"); break; case CPU_ARM_XSCALE1: case CPU_ARM_XSCALE2: printf("See Intel XScale Core Developer's Manual\n" "Chapter 8 Performance Monitoring\n"); break; break; case CPU_PPC64_POWER4: case CPU_PPC64_POWER5: case CPU_PPC64_970: printf("Obtain PowerPC64 processor documentation at:\n" "http://www-306.ibm.com/chips/techlib/techlib.nsf/productfamilies/PowerPC\n"); break; case CPU_MIPS_24K: printf("See Programming the MIPS32 24K Core " "available from www.mips.com\n"); break; case CPU_MIPS_R10000: case CPU_MIPS_R12000: printf("See NEC R10000 / R12000 User's Manual\n" "http://www.necelam.com/docs/files/U10278EJ3V0UM00.pdf\n"); break; case CPU_MIPS_RM7000: printf("See RM7000 Family User Manual " "available from www.pmc-sierra.com\n"); break; case CPU_MIPS_RM9000: printf("See RM9000x2 Family User Manual " "available from www.pmc-sierra.com\n"); break; case CPU_MIPS_SB1: case CPU_MIPS_VR5432: printf("See NEC VR5443 User's Manual, Volume 1\n" "http://www.necelam.com/docs/files/1375_V1.pdf\n"); break; case CPU_MIPS_VR5500: printf("See NEC R10000 / R12000 User's Manual\n" "http://www.necel.com/nesdis/image/U16677EJ3V0UM00.pdf\n"); break; case CPU_PPC_E500: printf("See PowerPC e500 Core Complex Reference Manual\n" "Chapter 7: Performance Monitor\n" "Downloadable from http://www.freescale.com\n"); break; case CPU_RTC: break; // don't use default, if someone add a cpu he wants a compiler warning // if he forgets to handle it here. case CPU_TIMER_INT: case CPU_NO_GOOD: case MAX_CPU_TYPE: printf("%d is not a valid processor type.\n", cpu_type); break; } list_for_each(pos, events) { struct op_event * event = list_entry(pos, struct op_event, event_next); help_for_event(event); } return EXIT_SUCCESS; }