void __init
tqm85xx_init_IRQ(void)
{
bd_t *binfo = (bd_t *) __res;
/* Determine the Physical Address of the OpenPIC regs */
phys_addr_t OpenPIC_PAddr =
binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
OpenPIC_InitSenses = tqm85xx_openpic_initsenses;
OpenPIC_NumInitSenses = sizeof (tqm85xx_openpic_initsenses);
/* Skip reserved space and internal sources */
openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
/* Map PIC IRQs 0-11 */
openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
/* we let openpic interrupts starting from an offset, to
* leave space for cascading interrupts underneath.
*/
openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
#ifdef CONFIG_MPC8560
/* Setup CPM2 PIC */
cpm2_init_IRQ();
setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
#endif /* CONFIG_MPC8560 */
return;
}
/*
* Interrupt setup and service.
* Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
*/
static void __init
mvme5100_init_IRQ(void)
{
#ifdef CONFIG_MVME5100_IPMC761_PRESENT
int i;
#endif
if ( ppc_md.progress )
ppc_md.progress("init_irq: enter", 0);
openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
#ifdef CONFIG_MVME5100_IPMC761_PRESENT
openpic_init(NUM_8259_INTERRUPTS);
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
&i8259_irq);
/* Map i8259 interrupts. */
for (i = 0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic;
i8259_init(0);
#else
openpic_init(0);
#endif
if ( ppc_md.progress )
ppc_md.progress("init_irq: exit", 0);
return;
}
/*
* Interrupt setup and service. The i8259 is cascaded from EPIC IRQ0,
* IRQ1-4 map to PCI slots 1-4, IDE is on EPIC 7 and 8.
*/
static void __init
sandpoint_init_IRQ(void)
{
int i;
OpenPIC_InitSenses = sandpoint_openpic_initsenses;
OpenPIC_NumInitSenses = sizeof (sandpoint_openpic_initsenses);
/*
* We need to tell openpic_set_sources where things actually are.
* mpc10x_common will setup OpenPIC_Addr at ioremap(EUMB phys base +
* EPIC offset (0x40000)); The EPIC IRQ Register Address Map -
* Interrupt Source Configuration Registers gives these numbers
* as offsets starting at 0x50200, we need to adjust occordinly.
*/
/* Map serial interrupt 0 */
openpic_set_sources(0, 1, OpenPIC_Addr + 0x10200);
/* Map serial interrupts 2-5 */
openpic_set_sources(1, 4, OpenPIC_Addr + 0x10240);
/* Map serial interrupts 8-9 */
openpic_set_sources(5, 2, OpenPIC_Addr + 0x10300);
/* Skip reserved space and map i2c and DMA Ch[01] */
openpic_set_sources(7, 3, OpenPIC_Addr + 0x11020);
/* Skip reserved space and map Message Unit Interrupt (I2O) */
openpic_set_sources(10, 1, OpenPIC_Addr + 0x110C0);
openpic_init(NUM_8259_INTERRUPTS);
/* The cascade is on EPIC IRQ 0 (Linux IRQ 16). */
openpic_hookup_cascade(16, "8259 cascade to EPIC", &i8259_irq);
/*
* openpic_init() has set up irq_desc[0-23] to be openpic
* interrupts. We need to set irq_desc[0-15] to be 8259 interrupts.
* We then need to request and enable the 8259 irq.
*/
for (i = 0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic;
/*
* The EPIC allows for a read in the range of 0xFEF00000 ->
* 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
*/
i8259_init(0xfef00000);
}
void __init
mpc85xx_ads_init_IRQ(void)
{
bd_t *binfo = (bd_t *) __res;
/* Determine the Physical Address of the OpenPIC regs */
phys_addr_t OpenPIC_PAddr =
binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
OpenPIC_InitSenses = mpc85xx_ads_openpic_initsenses;
OpenPIC_NumInitSenses = sizeof (mpc85xx_ads_openpic_initsenses);
/* Skip reserved space and internal sources */
openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
/* Map PIC IRQs 0-11 */
openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
/* we let openpic interrupts starting from an offset, to
* leave space for cascading interrupts underneath.
*/
openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
return;
}
static void __init pplus_init_IRQ(void)
{
int i;
if (ppc_md.progress)
ppc_md.progress("init_irq: enter", 0);
OpenPIC_InitSenses = pplus_openpic_initsenses;
OpenPIC_NumInitSenses = sizeof(pplus_openpic_initsenses);
if (OpenPIC_Addr != NULL) {
openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
openpic_init(NUM_8259_INTERRUPTS);
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
ppc_md.get_irq = openpic_get_irq;
}
i8259_init(0, 0);
if (ppc_md.progress)
ppc_md.progress("init_irq: exit", 0);
}