static void
grackle_write_config(device_t dev, u_int bus, u_int slot, u_int func,
u_int reg, u_int32_t val, int width)
{
struct grackle_softc *sc;
vm_offset_t caoff;
sc = device_get_softc(dev);
caoff = sc->sc_data + (reg & 0x03);
if (grackle_enable_config(sc, bus, slot, func, reg)) {
switch (width) {
case 1:
out8rb(caoff, val);
(void)in8rb(caoff);
break;
case 2:
out16rb(caoff, val);
(void)in16rb(caoff);
break;
case 4:
out32rb(caoff, val);
(void)in32rb(caoff);
break;
}
}
grackle_disable_config(sc);
}
static status_t
grackle_write_pci_config(void *cookie, uint8 bus, uint8 device, uint8 function,
uint8 offset, uint8 size, uint32 value)
{
grackle_host_bridge *bridge = (grackle_host_bridge*)cookie;
TRACE("grackle_write_pci_config(bus=%u, dev=%u, func=%u, offset=%u, "
"size=%u, value=%lu)\n", (int)bus, (int)device, (int)function,
(int)offset, (int)size, value);
out32rb(bridge->address_registers, (1 << 31)
| (bus << 16) | ((device & 0x1f) << 11) | ((function & 0x7) << 8)
| (offset & 0xfc));
addr_t dataAddress = bridge->data_registers + (offset & 0x3);
switch (size) {
case 1:
out8rb(dataAddress, (uint8)value);
break;
case 2:
out16rb(dataAddress, (uint16)value);
break;
case 4:
out32rb(dataAddress, value);
break;
}
out32rb(bridge->address_registers, 0);
return B_OK;
}
void
macobio_write(int offset, uint8_t bits)
{
struct macobio_softc *sc = macobio_cd.cd_devs[0];
if (sc->obiomem == 0)
return;
out8rb(sc->obiomem + offset, bits);
}
static void
uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func,
u_int reg, u_int32_t val, int width)
{
struct uninorth_softc *sc;
vm_offset_t caoff;
sc = device_get_softc(dev);
caoff = sc->sc_data + (reg & 0x07);
if (uninorth_enable_config(sc, bus, slot, func, reg)) {
switch (width) {
case 1:
out8rb(caoff, val);
break;
case 2:
out16rb(caoff, val);
break;
case 4:
out32rb(caoff, val);
break;
}
}
}
void
mc_init(struct mc_softc *sc)
{
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
u_int8_t maccc, ladrf[8];
int s, i;
s = splnet();
NIC_PUT(sc, MACE_BIUCC, sc->sc_biucc);
NIC_PUT(sc, MACE_FIFOCC, sc->sc_fifocc);
NIC_PUT(sc, MACE_IMR, ~0); /* disable all interrupts */
NIC_PUT(sc, MACE_PLSCC, sc->sc_plscc);
NIC_PUT(sc, MACE_UTR, RTRD); /* disable reserved test registers */
/* set MAC address */
NIC_PUT(sc, MACE_IAC, ADDRCHG);
while (NIC_GET(sc, MACE_IAC) & ADDRCHG)
;
NIC_PUT(sc, MACE_IAC, PHYADDR);
for (i = 0; i < ETHER_ADDR_LEN; i++)
out8rb(sc->sc_reg + MACE_REG(MACE_PADR) + i,
sc->sc_enaddr[i]);
/* set logical address filter */
mace_calcladrf(sc, ladrf);
NIC_PUT(sc, MACE_IAC, ADDRCHG);
while (NIC_GET(sc, MACE_IAC) & ADDRCHG)
;
NIC_PUT(sc, MACE_IAC, LOGADDR);
for (i = 0; i < 8; i++)
out8rb(sc->sc_reg + MACE_REG(MACE_LADRF) + i,
ladrf[i]);
NIC_PUT(sc, MACE_XMTFC, APADXMT);
/*
* No need to autostrip padding on receive... Ethernet frames
* don't have a length field, unlike 802.3 frames, so the MACE
* can't figure out the length of the packet anyways.
*/
NIC_PUT(sc, MACE_RCVFC, 0);
maccc = ENXMT | ENRCV;
if (ifp->if_flags & IFF_PROMISC)
maccc |= PROM;
NIC_PUT(sc, MACE_MACCC, maccc);
mc_reset_rxdma(sc);
mc_reset_txdma(sc);
/*
* Enable all interrupts except receive, since we use the DMA
* completion interrupt for that.
*/
NIC_PUT(sc, MACE_IMR, RCVINTM);
/* flag interface as "running" */
ifp->if_flags |= IFF_RUNNING;
ifp->if_flags &= ~IFF_OACTIVE;
splx(s);
}
