void VGA_map_color(char index, char r, char g, char b)
{
outport(0x3c8,index);
outport(0x3c9,r);
outport(0x3c9,g);
outport(0x3c9,b);
}
beg_main()
{
char far *vram=MK_FP(0x0a000,0);
int a,b,c,y;
unsigned char al;
dis_partstart();
outp(0x3c4,2);
outp(0x3c5,15);
memset(vram,15,32768);
memset(vram+32768,15,32768);
//_asm mov ax,80h+13h
//_asm int 10h
for(a=0;a<32;a++) dis_waitb();
outp(0x3c8,0);
for(a=0;a<255;a++)
{
outp(0x3c9,63);
outp(0x3c9,63);
outp(0x3c9,63);
}
outp(0x3c9,0);
outp(0x3c9,0);
outp(0x3c9,0);
inp(0x3da);
outp(0x3c0,0x11);
outp(0x3c0,255);
outp(0x3c0,0x20);
//inittwk();
outport(0x3D4, 0x000C);
outport(0x3D4, 0x000D);
outp(0x3D4, 9);
al = inp(0x3D5);
al &= ~0x80;
al &= ~31;
outp(0x3D5, al);
outp(0x3C0, 0x11);
outp(0x3C0, 0);
outp(0x3C0, 32);
outp(0x3C0, 0x11);
outp(0x3C0, 255);
outp(0x3C0, 0x20);
readp(palette,-1,pic);
for(y=0;y<400;y++)
{
readp(rowbuf,y,pic);
lineblit(vram+(unsigned)y*80U,rowbuf);
}
for(c=0;c<=128;c++)
{
for(a=0;a<768-3;a++) pal2[a]=((128-c)*63+palette[a]*c)/128;
dis_waitb();
setpalarea(pal2,0,254);
}
setpalarea(palette,0,254);
}
void dc_w32(unsigned char reg_no, unsigned long data2write)
{
unsigned int low_word;
unsigned int hi_word;
low_word=(data2write)&0x0000FFFF;
hi_word=((data2write)&0xFFFF0000)>>16;
outport(dc_com,reg_no|0x80);
uSDelay(10);
outport(dc_data,low_word);
outport(dc_data,hi_word);
}
void pam_tw_opengraph(void)
{
int10h(0x13);
outport(0x03c4, 0x0604); // chain4 off
outport(0x03c4, 0x0f02);
memset(MK_FP(0xa000, 0), 0, 0x10000); // clear vmem
outport(0x03d4, 0x0014); // crtc long off
outport(0x03d4, 0xe317); // crtc byte on
}
static void set_plane(unsigned p)
{
unsigned char pmask;
p &= 3;
pmask = 1 << p;
/* set read plane */
outport(VGA_GC_INDEX, 4);
outport(VGA_GC_DATA, p);
/* set write plane */
outport(VGA_SEQ_INDEX, 2);
outport(VGA_SEQ_DATA, pmask);
}
static void setvisual(int n)
{
register int a,b;
long ptr;
ptr=pt_ecran_actif=0xa0000000L+n*0x00008000L;
a=(int)(ptr>>8)&255;
b=(int)ptr&255;
a=(a<<8)+12;
b=(b<<8)+13;
outport(0x3d4,b);
outport(0x3d4,a);
}
void main(void) {
while (1) {
wert=inport(DIP_SWITCH_LOW_ADDR);
outport(LED_LOW_ADDR,~wert);
}
}
void PutImageX(int x,int y,ImagePtr pbm,int page)
{
int plane;
int width,height;
int i;
ImagePtr scr_addr;
ImagePtr tmpPBM=pbm+4;
ImagePtr tmpSCR;
memcpy(&width,pbm,2);
memcpy(&height,pbm+2,2);
tmpSCR=scr_addr=SetActPage(page)+y*SCR_WIDTH4+x/4;
for(plane=0;plane<4;plane++)
{
tmpSCR=scr_addr;
outport(SC_INDEX, (0x0100 << (plane & 3)) | MAP_MASK);
// select one plane to write
for(i=0;i<height;i++)
{
movedata(FP_SEG(tmpPBM),FP_OFF(tmpPBM),
FP_SEG(tmpSCR),FP_OFF(tmpSCR),width/4);
tmpSCR+=SCR_WIDTH4;
tmpPBM+=(width/4);
}
}
}
// 1=sunday
int rtc_getWeekday()
{
outport(0x70, 0x06);
//sleep(1);
int year = inport(0x71);
return year;
}
void spopen(unsigned baud,char parity,unsigned bits,unsigned stopbits)
{
unsigned char x;
x=(stopbits-1)*4+(3&(bits-1));
switch(parity)
{
case 'n':
break;
case 'o':
x+=8;
break;
case 'e':
x+=24;
}
spnew=0;
spold=0;
disable();
outportb(0x21,inportb(0x21)|amask);
spvect=*airqveca;
*airqveca=(unsigned long)spirqhdl;
outportb(a8250+3,128+x);
outport(a8250,115200/baud);
outportb(a8250+4,11);
outportb(a8250+3,x);
outportb(0x21,inportb(0x21)&(255-amask));
outportb(a8250+1,1);
enable();
}
int rtc_getMinute()
{
outport(0x70, 0x02);
//sleep(1);
int year = inport(0x71);
return year;
}
void interrupt handler(void)
{
ch=inportb(0x60);
outport(0x3c0,ct);
screen = MK_FP(0xB800,0);
screen[0][76] = m + '0' + ATTR;
screen[0][77] = c + '0' + ATTR;
screen[0][78] = d + '0' + ATTR;
screen[0][79] = u + '0' + ATTR;
//if(ch!=chant){
//ct++;
//u++; }
if(u>9){
u=0;
d++;}
if(d>9){
d=0;
c++;}
if(c>9){
c=0;
m++;}
if(m>9){
m=0;
ct=0;}
oldhandler();
chant=ch;
}
int rtc_getHour()
{
outport(0x70, 0x04);
//sleep(1);
int year = inport(0x71);
return year;
}
int rtc_getDayOfMonth()
{
outport(0x70, 0x07);
//sleep(1);
int year = inport(0x71);
return year;
}
static void __interrupt __far prvDummyISR( void )
{
/* The timer initialisation functions leave interrupts enabled,
which is not what we want. This ISR is installed temporarily in case
the timer fires before we get a change to disable interrupts again. */
outport( portEIO_REGISTER, portCLEAR_INTERRUPT );
}
int rtc_getSecond()
{
outport(0x70, 0x00);
//sleep(1);
int year = inport(0x71);
return year;
}
static void __interrupt __far prvNonPreemptiveTick( void )
{
/* Same as preemptive tick, but the cooperative scheduler is being used
so we don't have to switch in the context of the next task. */
vTaskIncrementTick();
/* Reset interrupt. */
outport( portEIO_REGISTER, portCLEAR_INTERRUPT );
}
/*!
* @brief profile(), id(), name(), setEndian(), isLittleEndian() メソッドのテスト
*
*/
void test_case0()
{
InPortMock inport("OutPortConnectorTest1", toTypename<RTC::TimedFloat>());
RTC::PortService_var port_ref1= inport.get_port_profile()->port_ref;
OutPortMock outport("OutPortConnectorTest2", toTypename<RTC::TimedFloat>());
RTC::PortService_var port_ref2= outport.get_port_profile()->port_ref;
RTC::PortAdmin portAdmin(m_pORB,m_pPOA);
portAdmin.registerPort(inport);
portAdmin.registerPort(outport);
RTC::ConnectorProfile cprof;
cprof.connector_id = "id";
cprof.name = CORBA::string_dup("OutPortConnectorTest");
CORBA_SeqUtil::push_back(cprof.properties,
NVUtil::newNV("dataport.interface_type",
"corba_cdr"));
CORBA_SeqUtil::push_back(cprof.properties,
NVUtil::newNV("dataport.dataflow_type",
"push"));
CORBA_SeqUtil::push_back(cprof.properties,
NVUtil::newNV("dataport.subscription_type",
"new"));
cprof.ports.length(2);
cprof.ports[0] = port_ref1;
cprof.ports[1] = port_ref2;
coil::Properties prop;
NVUtil::copyToProperties(prop, cprof.properties);
RTC::ConnectorInfo info(cprof.name, cprof.connector_id,
CORBA_SeqUtil::refToVstring(cprof.ports), prop);
OutPortConnectorMock connector(info);
CPPUNIT_ASSERT_EQUAL(std::string(cprof.connector_id), std::string(connector.id()));
CPPUNIT_ASSERT_EQUAL(std::string(cprof.name), std::string(connector.name()));
connector.setEndian(false);
CPPUNIT_ASSERT(!connector.isLittleEndian());
connector.setEndian(true);
CPPUNIT_ASSERT(connector.isLittleEndian());
RTC::ConnectorInfo info2 = connector.profile();
CPPUNIT_ASSERT_EQUAL(info.name,info2.name);
CPPUNIT_ASSERT_EQUAL(info.id,info2.id);
CPPUNIT_ASSERT(info.ports==info2.ports);
CPPUNIT_ASSERT_EQUAL(info.properties.size(),
info2.properties.size());
CPPUNIT_ASSERT_EQUAL(info.properties["dataport.interface_type"],
info2.properties["dataport.interface_type"]);
CPPUNIT_ASSERT_EQUAL(info.properties["dataport.dataflow_type"],
info2.properties["dataport.dataflow_type"]);
CPPUNIT_ASSERT_EQUAL(info.properties["dataport.subscription_type"],
info2.properties["dataport.subscription_type"]);
portAdmin.deletePort(inport);
portAdmin.deletePort(outport);
}
void stop_motors(const int ltp_port_address)
{
#ifdef WINDOWS
outport(ltp_port_address, TURN_OFF_SIGNAL);
#endif
#ifdef LINUX
printl("MOTORS TURNED OFF");
#endif
}
void i86_irq_initialize(uint16_t codeSel) {
for(uint8_t i = 0; i < IRQ_COUNT; i++)
{
irq_routines[i] = 0;
}
// Remap IRQ 0-15 to interrupts 32-47
outport(IRQ_PRIMARY_PIC_COMMAND_PORT, IRQ_ICW1);
outport(IRQ_SECONDARY_PIC_COMMAND_PORT, IRQ_ICW1);
outport(IRQ_PRIMARY_PIC_DATA_PORT, IRQ_ICW2_PRIMARY_PIC);
outport(IRQ_SECONDARY_PIC_DATA_PORT, IRQ_ICW2_SECONDARY_PIC);
outport(IRQ_PRIMARY_PIC_DATA_PORT, IRQ_ICW3_PRIMARY_PIC);
outport(IRQ_SECONDARY_PIC_DATA_PORT, IRQ_ICW3_SECONDARY_PIC);
outport(IRQ_PRIMARY_PIC_DATA_PORT, IRQ_ICW4);
outport(IRQ_SECONDARY_PIC_DATA_PORT, IRQ_ICW4);
// Zero data port
outport(IRQ_PRIMARY_PIC_DATA_PORT, 0);
outport(IRQ_SECONDARY_PIC_DATA_PORT, 0);
uint16_t _flags = I86_IDT_DESC_PRESENT + I86_IDT_DESC_RING0 + I86_IDT_DESC_INT32;
// Set up default IDT for IRQs
i86_install_ir(32, _flags, codeSel, (I86_IRQ_HANDLER) irq0);
i86_install_ir(33, _flags, codeSel, (I86_IRQ_HANDLER) irq1);
i86_install_ir(34, _flags, codeSel, (I86_IRQ_HANDLER) irq2);
i86_install_ir(35, _flags, codeSel, (I86_IRQ_HANDLER) irq3);
i86_install_ir(36, _flags, codeSel, (I86_IRQ_HANDLER) irq4);
i86_install_ir(37, _flags, codeSel, (I86_IRQ_HANDLER) irq5);
i86_install_ir(38, _flags, codeSel, (I86_IRQ_HANDLER) irq6);
i86_install_ir(39, _flags, codeSel, (I86_IRQ_HANDLER) irq7);
i86_install_ir(40, _flags, codeSel, (I86_IRQ_HANDLER) irq8);
i86_install_ir(41, _flags, codeSel, (I86_IRQ_HANDLER) irq9);
i86_install_ir(42, _flags, codeSel, (I86_IRQ_HANDLER) irq10);
i86_install_ir(43, _flags, codeSel, (I86_IRQ_HANDLER) irq11);
i86_install_ir(44, _flags, codeSel, (I86_IRQ_HANDLER) irq12);
i86_install_ir(45, _flags, codeSel, (I86_IRQ_HANDLER) irq13);
i86_install_ir(46, _flags, codeSel, (I86_IRQ_HANDLER) irq14);
i86_install_ir(47, _flags, codeSel, (I86_IRQ_HANDLER) irq15);
}
unsigned int dc_r16(unsigned char reg_no)
{
unsigned int result;
outport(dc_com, reg_no);
uSDelay(10);
result=inport(dc_data);
return(result);
}
void savePalette(palette_entry* p)
{
outport(0x3C7, 0x00);
for(int i = 0; i < 256; i++)
{
p[i].R = inport(0x3C9);
p[i].G = inport(0x3C9);
p[i].B = inport(0x3C9);
}
}
static void __interrupt __far prvPreemptiveTick( void )
{
/* Get the scheduler to update the task states following the tick. */
vTaskIncrementTick();
/* Switch in the context of the next task to be run. */
portSWITCH_CONTEXT();
/* Reset interrupt. */
outport( portEIO_REGISTER, portCLEAR_INTERRUPT );
}
void read_registers(unsigned char* regs)
{
unsigned i;
/* read MISCELLANEOUS reg */
*regs = inport(VGA_MISC_READ);
regs++;
/* read SEQUENCER regs */
for(i = 0; i < VGA_NUM_SEQ_REGS; i++)
{
outport(VGA_SEQ_INDEX, i);
*regs = inport(VGA_SEQ_DATA);
regs++;
}
/* read CRTC regs */
for(i = 0; i < VGA_NUM_CRTC_REGS; i++)
{
outport(VGA_CRTC_INDEX, i);
*regs = inport(VGA_CRTC_DATA);
regs++;
}
/* read GRAPHICS CONTROLLER regs */
for(i = 0; i < VGA_NUM_GC_REGS; i++)
{
outport(VGA_GC_INDEX, i);
*regs = inport(VGA_GC_DATA);
regs++;
}
/* read ATTRIBUTE CONTROLLER regs */
for(i = 0; i < VGA_NUM_AC_REGS; i++)
{
(void)inport(VGA_INSTAT_READ);
outport(VGA_AC_INDEX, i);
*regs = inport(VGA_AC_READ);
regs++;
}
/* lock 16-color palette and unblank display */
(void)inport(VGA_INSTAT_READ);
outport(VGA_AC_INDEX, 0x20);
}
void irq_handler(struct isrregs *r) {
uint8_t irq_no = r->int_no - 32;
//initialize function pointer
void (*handler)(struct isrregs *r);
if (irq_no < IRQ_COUNT)
{
handler = irq_routines[irq_no];
if ((uint32_t) handler != 0)
{
handler(r);
}
else
{
// Default handler
DisplayString((uint8_t*) "Handler for IRQ ");
DisplayInteger(irq_no);
DisplayString((uint8_t*) " not set.");
}
// Send end of interrupt, EOI
outport(IRQ_PRIMARY_PIC_COMMAND_PORT, 0x20);
if(irq_no > 7)
{ outport(IRQ_SECONDARY_PIC_COMMAND_PORT, 0x20);}
// END of EOI
}
else
{
DisplayString((uint8_t*) "IRQ ");
DisplayInteger(irq_no);
DisplayString((uint8_t*) " is an invalid IRQ number.");
}
}
void VGA320x200x4(void)
{
union REGS r;
// push the CX because some BIOS don't preserve CX
_asm push cx
r.x.ax = 0x13;
int86(0x10, &r,&r); // initial mode 13h from BIOS
_asm pop cx
outport(SC_INDEX, 0x604); // Disable 'Chain 4' bit from Sequencer reg
_asm {
mov ax,0100h
out dx,ax // synchronous reset while setting Misc Output
// for safety, even though clock unchanged
// disable the operation of EGA VGA
}
outport(CRTC_INDEX, 0xe317); // CRTC -- Select "byte mode"
// and then the VRAM is scaned just as
// in mode 12h
outport(CRTC_INDEX, 0x0014); // Turn off "double word mode"
// allow CRTC to scan the VRAM beyond
// 64K
_asm {
mov dx,SC_INDEX
mov ax,0300h
out dx,ax // undo reset (restart sequencer)
// restart EGA VGA
}
// clear the screen
outport(SC_INDEX, 0x0f00 | MAP_MASK);
memset(MK_FP(DEF_VGA_SEGMENT, 0),0, 0xffff);
}
unsigned long dc_r32(unsigned char reg_no)
{
unsigned int result_l,result_h;
unsigned long result;
outport(dc_com, reg_no);
uSDelay(10);
result_l=inport(dc_data);
result_h=inport(dc_data);
result = result_h;
result = result<<16;
result = result+result_l;
return(result);
}
void interrupt handler(void)
{
ch=inportb(0x60);
outport(0x3c0,ct);
screen = MK_FP(0xB800,0);
screen[0][75] = m[0] + ATTR;
screen[0][76] = m[1] + ATTR;
screen[0][77] = m[2] + ATTR;
screen[0][78] = m[3] + ATTR;
screen[0][79] = m[4] + ATTR;
itoa(ct,m,10);
//if(ch!=chant && ch<100)
// ct++;
oldhandler();
chant=ch;
}
void send_signal(const int signal)
{
if (signal <= MAX_SIGNAL_VALUE)
{
#ifdef WINDOWS
outport(LTP_PORT_ADDRESS, signal);
#endif
#ifdef LINUX
printf("%i\n", signal);
#endif
}
else
{
printf("ERROR: Signal %i is too high to be sended\n", signal);
}
}
// faster keyhit detector than kbhit()
unsigned short *translateInput()
{
unsigned char c, al, ah;
// get last key
c = inportb(0x60);
if (c >= 0x80) keys[c - 0x80] = 0;
if (c < 0x80) keys[c] = 1;
al = ah = inportb(0x61);
al |= 0x80;
outportb(0x61, al);
outportb(0x61, ah);
outportb(0x20, 0x20);
outport(0x20, 0x20);
return &keys[0];
}