BOOL LLDataPacker::packFixed(const F32 value, const char *name,
const BOOL is_signed, const U32 int_bits, const U32 frac_bits)
{
BOOL success = TRUE;
S32 unsigned_bits = int_bits + frac_bits;
S32 total_bits = unsigned_bits;
if (is_signed)
{
total_bits++;
}
S32 min_val;
U32 max_val;
if (is_signed)
{
min_val = 1 << int_bits;
min_val *= -1;
}
else
{
min_val = 0;
}
max_val = 1 << int_bits;
// Clamp to be within range
F32 fixed_val = llclamp(value, (F32)min_val, (F32)max_val);
if (is_signed)
{
fixed_val += max_val;
}
fixed_val *= 1 << frac_bits;
if (total_bits <= 8)
{
packU8((U8)fixed_val, name);
}
else if (total_bits <= 16)
{
packU16((U16)fixed_val, name);
}
else if (total_bits <= 31)
{
packU32((U32)fixed_val, name);
}
else
{
llerrs << "Using fixed-point packing of " << total_bits << " bits, why?!" << llendl;
}
return success;
}
int triple_encrypt_fpga_ecb(unsigned char *plaintext, int plaintext_len,
unsigned char *key, unsigned char *key1, unsigned char *key2,
unsigned char *ciphertext){
clock_t begin, end;
memmgr_assert(plaintext);
memmgr_assert(ciphertext);
unsigned src = lookupBufferPhysicalAddress(plaintext);
unsigned dest = lookupBufferPhysicalAddress(ciphertext);
XTriple_aes_Key_in_v key_in;
key_in.word_0 = packU32(key[0], key[1], key[2], key[3]);
key_in.word_1 = packU32(key[4], key[5], key[6], key[7]);
key_in.word_2 = packU32(key[8], key[9], key[10], key[11]);
key_in.word_3 = packU32(key[12], key[13], key[14], key[15]);
XTriple_aes_Key_in1_v key_in1;
key_in1.word_0 = packU32(key1[0], key1[1], key1[2], key1[3]);
key_in1.word_1 = packU32(key1[4], key1[5], key1[6], key1[7]);
key_in1.word_2 = packU32(key1[8], key1[9], key1[10], key1[11]);
key_in1.word_3 = packU32(key1[12], key1[13], key1[14], key1[15]);
XTriple_aes_Key_in2_v key_in2;
key_in2.word_0 = packU32(key2[0], key2[1], key2[2], key2[3]);
key_in2.word_1 = packU32(key2[4], key2[5], key2[6], key2[7]);
key_in2.word_2 = packU32(key2[8], key2[9], key2[10], key2[11]);
key_in2.word_3 = packU32(key2[12], key2[13], key2[14], key2[15]);
XTriple_aes_Iv_v iv_in;
iv_in.word_0 = 0;
iv_in.word_1 = 0;
iv_in.word_2 = 0;
iv_in.word_3 = 0;
XTriple_aes_Iv1_v iv_in1;
iv_in1.word_0 = 0;
iv_in1.word_1 = 0;
iv_in1.word_2 = 0;
iv_in1.word_3 = 0;
XTriple_aes_Iv2_v iv_in2;
iv_in2.word_0 = 0;
iv_in2.word_1 = 0;
iv_in2.word_2 = 0;
iv_in2.word_3 = 0;
XTriple_aes triple_aes;
XTriple_aes_Initialize(&triple_aes, "triple-aes");
XTriple_aes_Start(&triple_aes);
XTriple_aes_Set_sourceAddress(&triple_aes, src);
XTriple_aes_Set_key_in_V(&triple_aes, key_in);
XTriple_aes_Set_key_in1_V(&triple_aes, key_in1);
XTriple_aes_Set_key_in2_V(&triple_aes, key_in2);
XTriple_aes_Set_iv_V(&triple_aes, iv_in);
XTriple_aes_Set_iv1_V(&triple_aes, iv_in1);
XTriple_aes_Set_iv2_V(&triple_aes, iv_in2);
XTriple_aes_Set_destinationAddress(&triple_aes, dest);
XTriple_aes_Set_numBytes(&triple_aes, plaintext_len);
XTriple_aes_Set_mode(&triple_aes, 0);
XTriple_aes_Set_sourceAddress_vld(&triple_aes);
XTriple_aes_Set_key_in_V_vld(&triple_aes);
XTriple_aes_Set_key_in1_V_vld(&triple_aes);
XTriple_aes_Set_key_in2_V_vld(&triple_aes);
XTriple_aes_Set_iv_V_vld(&triple_aes);
XTriple_aes_Set_iv1_V_vld(&triple_aes);
XTriple_aes_Set_iv2_V_vld(&triple_aes);
XTriple_aes_Set_destinationAddress_vld(&triple_aes);
XTriple_aes_Set_numBytes_vld(&triple_aes);
XTriple_aes_Set_mode_vld(&triple_aes);
begin = clock();
printf("\nWaiting for FPGA");
while(XTriple_aes_IsDone(&triple_aes) != 1){}
end = clock();
double ticks = (double)(end-begin);
double seconds = ticks/CLOCKS_PER_SEC;
printf("It took %f clicks (%f seconds) in FPGA.\n", ticks, seconds);
XTriple_aes_Release(&triple_aes);
}